/* Target-dependent code for Renesas M32R, for GDB.
- Copyright (C) 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
- Free Software Foundation, Inc.
+ Copyright (C) 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007,
+ 2008 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor,
- Boston, MA 02110-1301, USA. */
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
#include "frame.h"
The following functions take care of this behavior. */
static int
-m32r_memory_insert_breakpoint (struct bp_target_info *bp_tgt)
+m32r_memory_insert_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
{
CORE_ADDR addr = bp_tgt->placed_address;
int val;
bp_tgt->placed_size = bp_tgt->shadow_len = 4;
/* Determine appropriate breakpoint contents and size for this address. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
{
if ((addr & 3) == 0)
{
}
static int
-m32r_memory_remove_breakpoint (struct bp_target_info *bp_tgt)
+m32r_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
{
CORE_ADDR addr = bp_tgt->placed_address;
int val;
buf[3] = contents_cache[3];
/* Remove parallel bit. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
{
if ((buf[0] & 0x80) == 0 && (buf[2] & 0x80) != 0)
buf[2] &= 0x7f;
}
static const gdb_byte *
-m32r_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
+m32r_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
{
static gdb_byte be_bp_entry[] = { 0x10, 0xf1, 0x70, 0x00 }; /* dpt -> nop */
static gdb_byte le_bp_entry[] = { 0x00, 0x70, 0xf1, 0x10 }; /* dpt -> nop */
gdb_byte *bp;
/* Determine appropriate breakpoint. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
{
if ((*pcptr & 3) == 0)
{
};
static const char *
-m32r_register_name (int reg_nr)
+m32r_register_name (struct gdbarch *gdbarch, int reg_nr)
{
if (reg_nr < 0)
return NULL;
if ((insn >> 8) == 0x4f) /* addi sp, xx */
/* add 8 bit sign-extended offset */
{
- int stack_adjust = (gdb_byte) (insn & 0xff);
+ int stack_adjust = (signed char) (insn & 0xff);
/* there are probably two of these stack adjustments:
1) A negative one in the prologue, and
#define DEFAULT_SEARCH_LIMIT 128
CORE_ADDR
-m32r_skip_prologue (CORE_ADDR pc)
+m32r_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
{
CORE_ADDR func_addr, func_end;
struct symtab_and_line sal;
else if ((op & 0xff00) == 0x4f00)
{
/* addi sp, xx */
- int n = (gdb_byte) (op & 0xff);
+ int n = (signed char) (op & 0xff);
info->sp_offset += n;
}
else if (op == 0x1d8f)
/* Adjust all the saved registers so that they contain addresses and
not offsets. */
- for (i = 0; i < NUM_REGS - 1; i++)
+ for (i = 0; i < gdbarch_num_regs (get_frame_arch (next_frame)) - 1; i++)
if (trad_frame_addr_p (info->saved_regs, i))
info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr);
}
static CORE_ADDR
-m32r_read_pc (ptid_t ptid)
+m32r_read_pc (struct regcache *regcache)
{
- ptid_t save_ptid;
ULONGEST pc;
-
- save_ptid = inferior_ptid;
- inferior_ptid = ptid;
- regcache_cooked_read_unsigned (current_regcache, M32R_PC_REGNUM, &pc);
- inferior_ptid = save_ptid;
+ regcache_cooked_read_unsigned (regcache, M32R_PC_REGNUM, &pc);
return pc;
}
static void
-m32r_write_pc (CORE_ADDR val, ptid_t ptid)
+m32r_write_pc (struct regcache *regcache, CORE_ADDR val)
{
- ptid_t save_ptid;
-
- save_ptid = inferior_ptid;
- inferior_ptid = ptid;
- write_register (M32R_PC_REGNUM, val);
- inferior_ptid = save_ptid;
+ regcache_cooked_write_unsigned (regcache, M32R_PC_REGNUM, val);
}
static CORE_ADDR
}
enum return_value_convention
-m32r_return_value (struct gdbarch *gdbarch, struct type *valtype,
- struct regcache *regcache, gdb_byte *readbuf,
- const gdb_byte *writebuf)
+m32r_return_value (struct gdbarch *gdbarch, struct type *func_type,
+ struct type *valtype, struct regcache *regcache,
+ gdb_byte *readbuf, const gdb_byte *writebuf)
{
if (TYPE_LENGTH (valtype) > 8)
return RETURN_VALUE_STRUCT_CONVENTION;
/* Hook in the default unwinders. */
frame_unwind_append_sniffer (gdbarch, m32r_frame_sniffer);
+ /* Support simple overlay manager. */
+ set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
+
return gdbarch;
}