/* Target-dependent code for Motorola 68HC11 & 68HC12
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software
- Foundation, Inc.
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
+ Free Software Foundation, Inc.
Contributed by Stephane Carrez, stcarrez@nerim.fr
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+Foundation, Inc., 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA. */
#include "defs.h"
};
-/* Register numbers of various important registers.
- Note that some of these values are "real" register numbers,
- and correspond to the general registers of the machine,
- and some are "phony" register numbers which are too large
- to be actual register numbers as far as the user is concerned
- but do serve to get the desired values when passed to read_register. */
+/* Register numbers of various important registers. */
#define HARD_X_REGNUM 0
#define HARD_D_REGNUM 1
/* 68HC12 page number register.
Note: to keep a compatibility with gcc register naming, we must
not have to rename FP and other soft registers. The page register
- is a real hard register and must therefore be counted by NUM_REGS.
+ is a real hard register and must therefore be counted by gdbarch_num_regs.
For this it has the same number as Z register (which is not used). */
#define HARD_PAGE_REGNUM 8
#define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
}
if (soft_regs[SOFT_FP_REGNUM].name == 0)
- {
- warning ("No frame soft register found in the symbol table.\n");
- warning ("Stack backtrace will not work.\n");
- }
+ warning (_("No frame soft register found in the symbol table.\n"
+ "Stack backtrace will not work."));
soft_reg_initialized = 1;
}
static void
m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
struct regcache *regcache,
- int regno, void *buf)
+ int regno, gdb_byte *buf)
{
/* The PC is a pseudo reg only for 68HC12 with the memory bank
addressing mode. */
static void
m68hc11_pseudo_register_write (struct gdbarch *gdbarch,
struct regcache *regcache,
- int regno, const void *buf)
+ int regno, const gdb_byte *buf)
{
/* The PC is a pseudo reg only for 68HC12 with the memory bank
addressing mode. */
break;
save_addr -= 2;
- info->saved_regs[saved_reg].addr = save_addr;
+ if (info->saved_regs)
+ info->saved_regs[saved_reg].addr = save_addr;
}
else
{
(*this_prologue_cache) = info;
info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
- info->pc = frame_func_unwind (next_frame);
+ info->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
info->size = 0;
info->return_kind = m68hc11_get_return_insn (info->pc);
/* Adjust all the saved registers so that they contain addresses and not
offsets. */
- for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS - 1; i++)
+ for (i = 0;
+ i < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch) - 1;
+ i++)
if (trad_frame_addr_p (info->saved_regs, i))
{
info->saved_regs[i].addr += this_base;
struct frame_id id;
/* The FUNC is easy. */
- func = frame_func_unwind (next_frame);
+ func = frame_func_unwind (next_frame, NORMAL_FRAME);
/* Hopefully the prologue analysis either correctly determined the
frame's base (which is the SP from the previous frame), or set
void **this_prologue_cache,
int regnum, int *optimizedp,
enum lval_type *lvalp, CORE_ADDR *addrp,
- int *realnump, void *bufferp)
+ int *realnump, gdb_byte *bufferp)
{
struct m68hc11_unwind_cache *info
= m68hc11_frame_unwind_cache (next_frame, this_prologue_cache);
}
}
-static CORE_ADDR
-m68hc11_stack_align (CORE_ADDR addr)
-{
- return ((addr + 1) & -2);
-}
-
static CORE_ADDR
m68hc11_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
first_stack_argnum = 0;
if (struct_return)
{
- /* The struct is allocated on the stack and gdb used the stack
- pointer for the address of that struct. We must apply the
- stack offset on the address. */
- regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM,
- struct_addr + STACK_CORRECTION);
+ regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, struct_addr);
}
else if (nargs > 0)
{
regcache_raw_write (regcache, HARD_D_REGNUM, (char*) valbuf + (len - 2));
}
else
- error ("return of value > 4 is not supported.");
+ error (_("return of value > 4 is not supported."));
}
break;
default:
- error ("bad size for return value");
+ error (_("bad size for return value"));
}
}
enum return_value_convention
m68hc11_return_value (struct gdbarch *gdbarch, struct type *valtype,
- struct regcache *regcache, void *readbuf,
- const void *writebuf)
+ struct regcache *regcache, gdb_byte *readbuf,
+ const gdb_byte *writebuf)
{
if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
|| TYPE_CODE (valtype) == TYPE_CODE_UNION
static int
gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
{
- if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
+ if (gdbarch_bfd_arch_info (current_gdbarch)->arch == bfd_arch_m68hc11)
return print_insn_m68hc11 (memaddr, info);
else
return print_insn_m68hc12 (memaddr, info);
/* Set register info. */
set_gdbarch_fp0_regnum (gdbarch, -1);
- set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
-
set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
set_gdbarch_register_name (gdbarch, m68hc11_register_name);
set_gdbarch_register_type (gdbarch, m68hc11_register_type);
set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
- set_gdbarch_deprecated_stack_align (gdbarch, m68hc11_stack_align);
set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
m68hc11_add_reggroups (gdbarch);