/* Target-dependent code for Motorola 68HC11 & 68HC12
- Copyright (C) 1999-2005, 2007-2012 Free Software Foundation, Inc.
+ Copyright (C) 1999-2017 Free Software Foundation, Inc.
Contributed by Stephane Carrez, stcarrez@nerim.fr
#include "gdbtypes.h"
#include "gdbcmd.h"
#include "gdbcore.h"
-#include "gdb_string.h"
#include "value.h"
#include "inferior.h"
#include "dis-asm.h"
/* Table of registers for 68HC11. This includes the hard registers
and the soft registers used by GCC. */
-static char *
+static const char *
m68hc11_register_names[] =
{
"x", "d", "y", "sp", "pc", "a", "b",
static void
m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
{
- struct minimal_symbol *msymbol;
+ struct bound_minimal_symbol msymbol;
msymbol = lookup_minimal_symbol (name, NULL, NULL);
- if (msymbol)
+ if (msymbol.minsym)
{
- reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
+ reg->addr = BMSYMBOL_VALUE_ADDRESS (msymbol);
reg->name = xstrdup (name);
/* Keep track of the address range for soft registers. */
if (regno == M68HC12_HARD_PC_REGNUM)
{
const int regsize = 4;
- char *tmp = alloca (regsize);
+ gdb_byte *tmp = (gdb_byte *) alloca (regsize);
CORE_ADDR pc;
memcpy (tmp, buf, regsize);
if (soft_regs[regno].name)
{
const int regsize = 2;
- char *tmp = alloca (regsize);
+ gdb_byte *tmp = (gdb_byte *) alloca (regsize);
memcpy (tmp, buf, regsize);
target_write_memory (soft_regs[regno].addr, tmp, regsize);
}
return m68hc11_register_names[reg_nr];
}
-static const unsigned char *
-m68hc11_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
- int *lenptr)
-{
- static unsigned char breakpoint[] = {0x0};
-
- *lenptr = sizeof (breakpoint);
- return breakpoint;
-}
+constexpr gdb_byte m68hc11_break_insn[] = {0x0};
+typedef BP_MANIPULATION (m68hc11_break_insn) m68hc11_breakpoint;
\f
/* 68HC11 & 68HC12 prologue analysis. */
static enum insn_return_kind
m68hc11_get_return_insn (CORE_ADDR pc)
{
- struct minimal_symbol *sym;
+ struct bound_minimal_symbol sym;
/* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
function is stored by elfread.c in the high bit of the info field.
Use this to decide which instruction the function uses to return. */
sym = lookup_minimal_symbol_by_pc (pc);
- if (sym == 0)
+ if (sym.minsym == 0)
return RETURN_RTS;
- if (MSYMBOL_IS_RTC (sym))
+ if (MSYMBOL_IS_RTC (sym.minsym))
return RETURN_RTC;
- else if (MSYMBOL_IS_RTI (sym))
+ else if (MSYMBOL_IS_RTI (sym.minsym))
return RETURN_RTI;
else
return RETURN_RTS;
int i;
if ((*this_prologue_cache))
- return (*this_prologue_cache);
+ return (struct m68hc11_unwind_cache *) (*this_prologue_cache);
info = FRAME_OBSTACK_ZALLOC (struct m68hc11_unwind_cache);
(*this_prologue_cache) = info;
int argnum;
int first_stack_argnum;
struct type *type;
- char *val;
- char buf[2];
+ const gdb_byte *val;
+ gdb_byte buf[2];
first_stack_argnum = 0;
if (struct_return)
if (TYPE_LENGTH (type) & 1)
{
- static char zero = 0;
+ static gdb_byte zero = 0;
sp--;
write_memory (sp, &zero, 1);
}
- val = (char*) value_contents (args[argnum]);
+ val = value_contents (args[argnum]);
sp -= TYPE_LENGTH (type);
write_memory (sp, val, TYPE_LENGTH (type));
}
static void
m68hc11_store_return_value (struct type *type, struct regcache *regcache,
- const void *valbuf)
+ const gdb_byte *valbuf)
{
int len;
{
regcache_raw_write_part (regcache, HARD_X_REGNUM, 4 - len,
len - 2, valbuf);
- regcache_raw_write (regcache, HARD_D_REGNUM, (char*) valbuf + (len - 2));
+ regcache_raw_write (regcache, HARD_D_REGNUM, valbuf + (len - 2));
}
else
error (_("return of value > 4 is not supported."));
m68hc11_extract_return_value (struct type *type, struct regcache *regcache,
void *valbuf)
{
- char buf[M68HC11_REG_SIZE];
+ gdb_byte buf[M68HC11_REG_SIZE];
regcache_raw_read (regcache, HARD_D_REGNUM, buf);
switch (TYPE_LENGTH (type))
if (flags & STO_M68HC12_INTERRUPT)
MSYMBOL_SET_RTI (msym);
}
-
-static int
-gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
-{
- if (info->arch == bfd_arch_m68hc11)
- return print_insn_m68hc11 (memaddr, info);
- else
- return print_insn_m68hc12 (memaddr, info);
-}
-
\f
/* 68HC11/68HC12 register groups.
}
/* Need a new architecture. Fill in a target specific vector. */
- tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
+ tdep = XCNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
tdep->elf_flags = elf_flags;
set_gdbarch_return_value (gdbarch, m68hc11_return_value);
set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
- set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
- set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
+ set_gdbarch_breakpoint_kind_from_pc (gdbarch,
+ m68hc11_breakpoint::kind_from_pc);
+ set_gdbarch_sw_breakpoint_from_kind (gdbarch,
+ m68hc11_breakpoint::bp_from_kind);
m68hc11_add_reggroups (gdbarch);
set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p);