/* Target dependent code for the Motorola 68000 series.
- Copyright (C) 1990 Free Software Foundation, Inc.
+ Copyright (C) 1990, 1992 Free Software Foundation, Inc.
This file is part of GDB.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
-Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "defs.h"
-#include "ieee-float.h"
-#include "param.h"
#include "frame.h"
#include "symtab.h"
-
-const struct ext_format ext_format_68881 = {
-/* tot sbyte smask expbyte manbyte */
- 12, 0, 0x80, 0,1, 4,8 /* mc68881 */
-};
+#include "gdbcore.h"
+#include "value.h"
+#include "gdb_string.h"
+#include "inferior.h"
\f
-/* Things needed for making the inferior call functions.
- It seems like every m68k based machine has almost identical definitions
- in the individual machine's configuration files. Most other cpu types
- (mips, i386, etc) have routines in their *-tdep.c files to handle this
- for most configurations. The m68k family should be able to do this as
- well. These macros can still be overridden when necessary. */
+/* The only reason this is here is the tm-altos.h reference below. It
+ was moved back here from tm-m68k.h. FIXME? */
+
+extern CORE_ADDR
+altos_skip_prologue (pc)
+ CORE_ADDR pc;
+{
+ register int op = read_memory_integer (pc, 2);
+ if (op == 0047126)
+ pc += 4; /* Skip link #word */
+ else if (op == 0044016)
+ pc += 6; /* Skip link #long */
+ /* Not sure why branches are here. */
+ /* From tm-isi.h, tm-altos.h */
+ else if (op == 0060000)
+ pc += 4; /* Skip bra #word */
+ else if (op == 00600377)
+ pc += 6; /* skip bra #long */
+ else if ((op & 0177400) == 0060000)
+ pc += 2; /* skip bra #char */
+ return pc;
+}
+
+/* The only reason this is here is the tm-isi.h reference below. It
+ was moved back here from tm-m68k.h. FIXME? */
+
+extern CORE_ADDR
+isi_skip_prologue (pc)
+ CORE_ADDR pc;
+{
+ register int op = read_memory_integer (pc, 2);
+ if (op == 0047126)
+ pc += 4; /* Skip link #word */
+ else if (op == 0044016)
+ pc += 6; /* Skip link #long */
+ /* Not sure why branches are here. */
+ /* From tm-isi.h, tm-altos.h */
+ else if (op == 0060000)
+ pc += 4; /* Skip bra #word */
+ else if (op == 00600377)
+ pc += 6; /* skip bra #long */
+ else if ((op & 0177400) == 0060000)
+ pc += 2; /* skip bra #char */
+ return pc;
+}
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+int
+isi_frame_num_args (fi)
+ struct frame_info *fi;
+{
+ int val;
+ CORE_ADDR pc = FRAME_SAVED_PC (fi);
+ int insn = 0177777 & read_memory_integer (pc, 2);
+ val = 0;
+ if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */
+ val = read_memory_integer (pc + 2, 2);
+ else if ((insn & 0170777) == 0050217 /* addql #N, sp */
+ || (insn & 0170777) == 0050117) /* addqw */
+ {
+ val = (insn >> 9) & 7;
+ if (val == 0)
+ val = 8;
+ }
+ else if (insn == 0157774) /* addal #WW, sp */
+ val = read_memory_integer (pc + 2, 4);
+ val >>= 2;
+ return val;
+}
+
+int
+delta68_frame_num_args (fi)
+ struct frame_info *fi;
+{
+ int val;
+ CORE_ADDR pc = FRAME_SAVED_PC (fi);
+ int insn = 0177777 & read_memory_integer (pc, 2);
+ val = 0;
+ if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */
+ val = read_memory_integer (pc + 2, 2);
+ else if ((insn & 0170777) == 0050217 /* addql #N, sp */
+ || (insn & 0170777) == 0050117) /* addqw */
+ {
+ val = (insn >> 9) & 7;
+ if (val == 0)
+ val = 8;
+ }
+ else if (insn == 0157774) /* addal #WW, sp */
+ val = read_memory_integer (pc + 2, 4);
+ val >>= 2;
+ return val;
+}
+
+int
+news_frame_num_args (fi)
+ struct frame_info *fi;
+{
+ int val;
+ CORE_ADDR pc = FRAME_SAVED_PC (fi);
+ int insn = 0177777 & read_memory_integer (pc, 2);
+ val = 0;
+ if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */
+ val = read_memory_integer (pc + 2, 2);
+ else if ((insn & 0170777) == 0050217 /* addql #N, sp */
+ || (insn & 0170777) == 0050117) /* addqw */
+ {
+ val = (insn >> 9) & 7;
+ if (val == 0)
+ val = 8;
+ }
+ else if (insn == 0157774) /* addal #WW, sp */
+ val = read_memory_integer (pc + 2, 4);
+ val >>= 2;
+ return val;
+}
/* Push an empty stack frame, to record the current PC, etc. */
sp = push_word (sp, read_register (PC_REGNUM));
sp = push_word (sp, read_register (FP_REGNUM));
write_register (FP_REGNUM, sp);
-#if defined (HAVE_68881)
+
+ /* Always save the floating-point registers, whether they exist on
+ this target or not. */
for (regnum = FP0_REGNUM + 7; regnum >= FP0_REGNUM; regnum--)
{
read_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 12);
sp = push_bytes (sp, raw_buffer, 12);
}
-#endif
+
for (regnum = FP_REGNUM - 1; regnum >= 0; regnum--)
{
sp = push_word (sp, read_register (regnum));
void
m68k_pop_frame ()
{
- register FRAME frame = get_current_frame ();
+ register struct frame_info *frame = get_current_frame ();
register CORE_ADDR fp;
register int regnum;
struct frame_saved_regs fsr;
- struct frame_info *fi;
char raw_buffer[12];
- fi = get_frame_info (frame);
- fp = fi -> frame;
- get_frame_saved_regs (fi, &fsr);
-#if defined (HAVE_68881)
+ fp = FRAME_FP (frame);
+ get_frame_saved_regs (frame, &fsr);
for (regnum = FP0_REGNUM + 7 ; regnum >= FP0_REGNUM ; regnum--)
{
if (fsr.regs[regnum])
write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 12);
}
}
-#endif
for (regnum = FP_REGNUM - 1 ; regnum >= 0 ; regnum--)
{
if (fsr.regs[regnum])
write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
write_register (SP_REGNUM, fp + 8);
flush_cached_frames ();
- set_current_frame (create_new_frame (read_register (FP_REGNUM),
- read_pc ()));
}
\f
#define P_LEA_L 0x43fb
#define P_MOVM_L 0x48ef
#define P_FMOVM 0xf237
+#define P_TRAP 0x4e40
CORE_ADDR
m68k_skip_prologue (ip)
{
ip += 4; /* Skip link.w */
}
+ else if (op == 0x4856)
+ ip += 2; /* Skip pea %fp */
+ else if (op == 0x2c4f)
+ ip += 2; /* Skip move.l %sp, %fp */
else if (op == P_LINK_L)
{
ip += 6; /* Skip link.l */
return (ip);
}
+void
+m68k_find_saved_regs (frame_info, saved_regs)
+ struct frame_info *frame_info;
+ struct frame_saved_regs *saved_regs;
+{
+ register int regnum;
+ register int regmask;
+ register CORE_ADDR next_addr;
+ register CORE_ADDR pc;
+
+ /* First possible address for a pc in a call dummy for this frame. */
+ CORE_ADDR possible_call_dummy_start =
+ (frame_info)->frame - CALL_DUMMY_LENGTH - FP_REGNUM*4 - 4 - 8*12;
+
+ int nextinsn;
+ memset (saved_regs, 0, sizeof (*saved_regs));
+ if ((frame_info)->pc >= possible_call_dummy_start
+ && (frame_info)->pc <= (frame_info)->frame)
+ {
+
+ /* It is a call dummy. We could just stop now, since we know
+ what the call dummy saves and where. But this code proceeds
+ to parse the "prologue" which is part of the call dummy.
+ This is needlessly complex and confusing. FIXME. */
+
+ next_addr = (frame_info)->frame;
+ pc = possible_call_dummy_start;
+ }
+ else
+ {
+ pc = get_pc_function_start ((frame_info)->pc);
+
+ if (0x4856 == read_memory_integer (pc, 2)
+ && 0x2c4f == read_memory_integer (pc + 2, 2))
+ {
+ /*
+ pea %fp
+ move.l %sp, %fp */
+
+ pc += 4;
+ next_addr = frame_info->frame;
+ }
+ else if (044016 == read_memory_integer (pc, 2))
+ /* link.l %fp */
+ /* Find the address above the saved
+ regs using the amount of storage from the link instruction. */
+ next_addr = (frame_info)->frame + read_memory_integer (pc += 2, 4), pc+=4;
+ else if (047126 == read_memory_integer (pc, 2))
+ /* link.w %fp */
+ /* Find the address above the saved
+ regs using the amount of storage from the link instruction. */
+ next_addr = (frame_info)->frame + read_memory_integer (pc += 2, 2), pc+=2;
+ else goto lose;
+
+ /* If have an addal #-n, sp next, adjust next_addr. */
+ if ((0177777 & read_memory_integer (pc, 2)) == 0157774)
+ next_addr += read_memory_integer (pc += 2, 4), pc += 4;
+ }
+ regmask = read_memory_integer (pc + 2, 2);
+
+ /* Here can come an fmovem. Check for it. */
+ nextinsn = 0xffff & read_memory_integer (pc, 2);
+ if (0xf227 == nextinsn
+ && (regmask & 0xff00) == 0xe000)
+ { pc += 4; /* Regmask's low bit is for register fp7, the first pushed */
+ for (regnum = FP0_REGNUM + 7; regnum >= FP0_REGNUM; regnum--, regmask >>= 1)
+ if (regmask & 1)
+ saved_regs->regs[regnum] = (next_addr -= 12);
+ regmask = read_memory_integer (pc + 2, 2); }
+
+ /* next should be a moveml to (sp) or -(sp) or a movl r,-(sp) */
+ if (0044327 == read_memory_integer (pc, 2))
+ { pc += 4; /* Regmask's low bit is for register 0, the first written */
+ for (regnum = 0; regnum < 16; regnum++, regmask >>= 1)
+ if (regmask & 1)
+ saved_regs->regs[regnum] = (next_addr += 4) - 4; }
+ else if (0044347 == read_memory_integer (pc, 2))
+ {
+ pc += 4; /* Regmask's low bit is for register 15, the first pushed */
+ for (regnum = 15; regnum >= 0; regnum--, regmask >>= 1)
+ if (regmask & 1)
+ saved_regs->regs[regnum] = (next_addr -= 4);
+ }
+ else if (0x2f00 == (0xfff0 & read_memory_integer (pc, 2)))
+ {
+ regnum = 0xf & read_memory_integer (pc, 2); pc += 2;
+ saved_regs->regs[regnum] = (next_addr -= 4);
+ /* gcc, at least, may use a pair of movel instructions when saving
+ exactly 2 registers. */
+ if (0x2f00 == (0xfff0 & read_memory_integer (pc, 2)))
+ {
+ regnum = 0xf & read_memory_integer (pc, 2);
+ pc += 2;
+ saved_regs->regs[regnum] = (next_addr -= 4);
+ }
+ }
+
+ /* fmovemx to index of sp may follow. */
+ regmask = read_memory_integer (pc + 2, 2);
+ nextinsn = 0xffff & read_memory_integer (pc, 2);
+ if (0xf236 == nextinsn
+ && (regmask & 0xff00) == 0xf000)
+ { pc += 10; /* Regmask's low bit is for register fp0, the first written */
+ for (regnum = FP0_REGNUM + 7; regnum >= FP0_REGNUM; regnum--, regmask >>= 1)
+ if (regmask & 1)
+ saved_regs->regs[regnum] = (next_addr += 12) - 12;
+ regmask = read_memory_integer (pc + 2, 2); }
+
+ /* clrw -(sp); movw ccr,-(sp) may follow. */
+ if (0x426742e7 == read_memory_integer (pc, 4))
+ saved_regs->regs[PS_REGNUM] = (next_addr -= 4);
+ lose: ;
+ saved_regs->regs[SP_REGNUM] = (frame_info)->frame + 8;
+ saved_regs->regs[FP_REGNUM] = (frame_info)->frame;
+ saved_regs->regs[PC_REGNUM] = (frame_info)->frame + 4;
+#ifdef SIG_SP_FP_OFFSET
+ /* Adjust saved SP_REGNUM for fake _sigtramp frames. */
+ if (frame_info->signal_handler_caller && frame_info->next)
+ saved_regs->regs[SP_REGNUM] = frame_info->next->frame + SIG_SP_FP_OFFSET;
+#endif
+}
+
+
#ifdef USE_PROC_FS /* Target dependent support for /proc */
#include <sys/procfs.h>
*/
+/* Atari SVR4 has R_SR but not R_PS */
+
+#if !defined (R_PS) && defined (R_SR)
+#define R_PS R_SR
+#endif
/* Given a pointer to a general register set in /proc format (gregset_t *),
unpack the register contents and supply them as gdb's idea of the current
supply_gregset (gregsetp)
gregset_t *gregsetp;
{
- register int regno;
+ register int regi;
register greg_t *regp = (greg_t *) gregsetp;
- for (regno = 0 ; regno < R_PC ; regno++)
+ for (regi = 0 ; regi < R_PC ; regi++)
{
- supply_register (regno, (char *) (regp + regno));
+ supply_register (regi, (char *) (regp + regi));
}
supply_register (PS_REGNUM, (char *) (regp + R_PS));
supply_register (PC_REGNUM, (char *) (regp + R_PC));
gregset_t *gregsetp;
int regno;
{
- int regi;
+ register int regi;
register greg_t *regp = (greg_t *) gregsetp;
- extern char registers[];
for (regi = 0 ; regi < R_PC ; regi++)
{
if ((regno == -1) || (regno == regi))
{
- *(regp + regno) = *(int *) ®isters[REGISTER_BYTE (regi)];
+ *(regp + regi) = *(int *) ®isters[REGISTER_BYTE (regi)];
}
}
if ((regno == -1) || (regno == PS_REGNUM))
supply_fpregset (fpregsetp)
fpregset_t *fpregsetp;
{
- register int regno;
+ register int regi;
+ char *from;
- for (regno = FP0_REGNUM ; regno < FPC_REGNUM ; regno++)
+ for (regi = FP0_REGNUM ; regi < FPC_REGNUM ; regi++)
{
- supply_register (regno, (char *) &(fpregsetp -> f_fpregs[regno][0]));
+ from = (char *) &(fpregsetp -> f_fpregs[regi-FP0_REGNUM][0]);
+ supply_register (regi, from);
}
supply_register (FPC_REGNUM, (char *) &(fpregsetp -> f_pcr));
supply_register (FPS_REGNUM, (char *) &(fpregsetp -> f_psr));
int regi;
char *to;
char *from;
- extern char registers[];
for (regi = FP0_REGNUM ; regi < FPC_REGNUM ; regi++)
{
if ((regno == -1) || (regno == regi))
{
from = (char *) ®isters[REGISTER_BYTE (regi)];
- to = (char *) &(fpregsetp -> f_fpregs[regi][0]);
- bcopy (from, to, REGISTER_RAW_SIZE (regno));
+ to = (char *) &(fpregsetp -> f_fpregs[regi-FP0_REGNUM][0]);
+ memcpy (to, from, REGISTER_RAW_SIZE (regi));
}
}
if ((regno == -1) || (regno == FPC_REGNUM))
#endif /* defined (FP0_REGNUM) */
#endif /* USE_PROC_FS */
+
+#ifdef GET_LONGJMP_TARGET
+/* Figure out where the longjmp will land. Slurp the args out of the stack.
+ We expect the first arg to be a pointer to the jmp_buf structure from which
+ we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
+ This routine returns true on success. */
+
+int
+get_longjmp_target(pc)
+ CORE_ADDR *pc;
+{
+ char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
+ CORE_ADDR sp, jb_addr;
+
+ sp = read_register(SP_REGNUM);
+
+ if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
+ buf,
+ TARGET_PTR_BIT / TARGET_CHAR_BIT))
+ return 0;
+
+ jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
+
+ if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
+ TARGET_PTR_BIT / TARGET_CHAR_BIT))
+ return 0;
+
+ *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
+
+ return 1;
+}
+#endif /* GET_LONGJMP_TARGET */
+
+/* Immediately after a function call, return the saved pc before the frame
+ is setup. For sun3's, we check for the common case of being inside of a
+ system call, and if so, we know that Sun pushes the call # on the stack
+ prior to doing the trap. */
+
+CORE_ADDR
+m68k_saved_pc_after_call(frame)
+ struct frame_info *frame;
+{
+#ifdef SYSCALL_TRAP
+ int op;
+
+ op = read_memory_integer (frame->pc - SYSCALL_TRAP_OFFSET, 2);
+
+ if (op == SYSCALL_TRAP)
+ return read_memory_integer (read_register (SP_REGNUM) + 4, 4);
+ else
+#endif /* SYSCALL_TRAP */
+ return read_memory_integer (read_register (SP_REGNUM), 4);
+}
+
+void
+_initialize_m68k_tdep ()
+{
+ tm_print_insn = print_insn_m68k;
+}