-/* Target dependent code for the Motorola 68000 series.
- Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000, 2001
- Free Software Foundation, Inc.
+/* Target-dependent code for the Motorola 68000 series.
+
+ Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000,
+ 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
This file is part of GDB.
Boston, MA 02111-1307, USA. */
#include "defs.h"
+#include "dwarf2-frame.h"
#include "frame.h"
+#include "frame-base.h"
+#include "frame-unwind.h"
+#include "floatformat.h"
#include "symtab.h"
#include "gdbcore.h"
#include "value.h"
#include "gdb_string.h"
+#include "gdb_assert.h"
#include "inferior.h"
#include "regcache.h"
+#include "arch-utils.h"
+#include "osabi.h"
+#include "dis-asm.h"
+
+#include "m68k-tdep.h"
\f
#define P_LINKL_FP 0x480e
#define P_LINKW_FP 0x4e56
#define P_PEA_FP 0x4856
-#define P_MOVL_SP_FP 0x2c4f
-#define P_MOVL 0x207c
-#define P_JSR 0x4eb9
-#define P_BSR 0x61ff
-#define P_LEAL 0x43fb
-#define P_MOVML 0x48ef
-#define P_FMOVM 0xf237
-#define P_TRAP 0x4e40
-
-/* The only reason this is here is the tm-altos.h reference below. It
- was moved back here from tm-m68k.h. FIXME? */
-
-extern CORE_ADDR
-altos_skip_prologue (CORE_ADDR pc)
-{
- register int op = read_memory_integer (pc, 2);
- if (op == P_LINKW_FP)
- pc += 4; /* Skip link #word */
- else if (op == P_LINKL_FP)
- pc += 6; /* Skip link #long */
- /* Not sure why branches are here. */
- /* From tm-altos.h */
- else if (op == 0060000)
- pc += 4; /* Skip bra #word */
- else if (op == 00600377)
- pc += 6; /* skip bra #long */
- else if ((op & 0177400) == 0060000)
- pc += 2; /* skip bra #char */
- return pc;
+#define P_MOVEAL_SP_FP 0x2c4f
+#define P_ADDAW_SP 0xdefc
+#define P_ADDAL_SP 0xdffc
+#define P_SUBQW_SP 0x514f
+#define P_SUBQL_SP 0x518f
+#define P_LEA_SP_SP 0x4fef
+#define P_LEA_PC_A5 0x4bfb0170
+#define P_FMOVEMX_SP 0xf227
+#define P_MOVEL_SP 0x2f00
+#define P_MOVEML_SP 0x48e7
+
+
+#define REGISTER_BYTES_FP (16*4 + 8 + 8*12 + 3*4)
+#define REGISTER_BYTES_NOFP (16*4 + 8)
+
+/* Offset from SP to first arg on stack at first instruction of a function */
+#define SP_ARG0 (1 * 4)
+
+#if !defined (BPT_VECTOR)
+#define BPT_VECTOR 0xf
+#endif
+
+static const unsigned char *
+m68k_local_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
+{
+ static unsigned char break_insn[] = {0x4e, (0x40 | BPT_VECTOR)};
+ *lenptr = sizeof (break_insn);
+ return break_insn;
+}
+
+
+static int
+m68k_register_bytes_ok (long numbytes)
+{
+ return ((numbytes == REGISTER_BYTES_FP)
+ || (numbytes == REGISTER_BYTES_NOFP));
+}
+
+/* Return the GDB type object for the "standard" data type of data in
+ register N. This should be int for D0-D7, SR, FPCONTROL and
+ FPSTATUS, long double for FP0-FP7, and void pointer for all others
+ (A0-A7, PC, FPIADDR). Note, for registers which contain
+ addresses return pointer to void, not pointer to char, because we
+ don't want to attempt to print the string after printing the
+ address. */
+
+static struct type *
+m68k_register_type (struct gdbarch *gdbarch, int regnum)
+{
+ if (regnum >= FP0_REGNUM && regnum <= FP0_REGNUM + 7)
+ return builtin_type_m68881_ext;
+
+ if (regnum == M68K_FPI_REGNUM || regnum == PC_REGNUM)
+ return builtin_type_void_func_ptr;
+
+ if (regnum == M68K_FPC_REGNUM || regnum == M68K_FPS_REGNUM
+ || regnum == PS_REGNUM)
+ return builtin_type_int32;
+
+ if (regnum >= M68K_A0_REGNUM && regnum <= M68K_A0_REGNUM + 7)
+ return builtin_type_void_data_ptr;
+
+ return builtin_type_int32;
}
-int
-delta68_in_sigtramp (CORE_ADDR pc, char *name)
+/* Function: m68k_register_name
+ Returns the name of the standard m68k register regnum. */
+
+static const char *
+m68k_register_name (int regnum)
{
- if (name != NULL)
- return strcmp (name, "_sigcode") == 0;
+ static char *register_names[] = {
+ "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
+ "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp",
+ "ps", "pc",
+ "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7",
+ "fpcontrol", "fpstatus", "fpiaddr", "fpcode", "fpflags"
+ };
+
+ if (regnum < 0 ||
+ regnum >= sizeof (register_names) / sizeof (register_names[0]))
+ internal_error (__FILE__, __LINE__,
+ _("m68k_register_name: illegal register number %d"), regnum);
else
- return 0;
+ return register_names[regnum];
}
+\f
+/* Return nonzero if a value of type TYPE stored in register REGNUM
+ needs any special handling. */
-CORE_ADDR
-delta68_frame_args_address (struct frame_info *frame_info)
+static int
+m68k_convert_register_p (int regnum, struct type *type)
{
- /* we assume here that the only frameless functions are the system calls
- or other functions who do not put anything on the stack. */
- if (frame_info->signal_handler_caller)
- return frame_info->frame + 12;
- else if (frameless_look_for_prologue (frame_info))
+ return (regnum >= M68K_FP0_REGNUM && regnum <= M68K_FP0_REGNUM + 7);
+}
+
+/* Read a value of type TYPE from register REGNUM in frame FRAME, and
+ return its contents in TO. */
+
+static void
+m68k_register_to_value (struct frame_info *frame, int regnum,
+ struct type *type, void *to)
+{
+ char from[M68K_MAX_REGISTER_SIZE];
+
+ /* We only support floating-point values. */
+ if (TYPE_CODE (type) != TYPE_CODE_FLT)
{
- /* Check for an interrupted system call */
- if (frame_info->next && frame_info->next->signal_handler_caller)
- return frame_info->next->frame + 16;
- else
- return frame_info->frame + 4;
+ warning (_("Cannot convert floating-point register value "
+ "to non-floating-point type."));
+ return;
}
- else
- return frame_info->frame;
+
+ /* Convert to TYPE. This should be a no-op if TYPE is equivalent to
+ the extended floating-point format used by the FPU. */
+ get_frame_register (frame, regnum, from);
+ convert_typed_floating (from, builtin_type_m68881_ext, to, type);
}
-CORE_ADDR
-delta68_frame_saved_pc (struct frame_info *frame_info)
+/* Write the contents FROM of a value of type TYPE into register
+ REGNUM in frame FRAME. */
+
+static void
+m68k_value_to_register (struct frame_info *frame, int regnum,
+ struct type *type, const void *from)
{
- return read_memory_integer (delta68_frame_args_address (frame_info) + 4, 4);
-}
+ char to[M68K_MAX_REGISTER_SIZE];
-/* Return number of args passed to a frame.
- Can return -1, meaning no way to tell. */
+ /* We only support floating-point values. */
+ if (TYPE_CODE (type) != TYPE_CODE_FLT)
+ {
+ warning (_("Cannot convert non-floating-point type "
+ "to floating-point register value."));
+ return;
+ }
-int
-isi_frame_num_args (struct frame_info *fi)
+ /* Convert from TYPE. This should be a no-op if TYPE is equivalent
+ to the extended floating-point format used by the FPU. */
+ convert_typed_floating (from, type, to, builtin_type_m68881_ext);
+ put_frame_register (frame, regnum, to);
+}
+
+\f
+/* There is a fair number of calling conventions that are in somewhat
+ wide use. The 68000/08/10 don't support an FPU, not even as a
+ coprocessor. All function return values are stored in %d0/%d1.
+ Structures are returned in a static buffer, a pointer to which is
+ returned in %d0. This means that functions returning a structure
+ are not re-entrant. To avoid this problem some systems use a
+ convention where the caller passes a pointer to a buffer in %a1
+ where the return values is to be stored. This convention is the
+ default, and is implemented in the function m68k_return_value.
+
+ The 68020/030/040/060 do support an FPU, either as a coprocessor
+ (68881/2) or built-in (68040/68060). That's why System V release 4
+ (SVR4) instroduces a new calling convention specified by the SVR4
+ psABI. Integer values are returned in %d0/%d1, pointer return
+ values in %a0 and floating values in %fp0. When calling functions
+ returning a structure the caller should pass a pointer to a buffer
+ for the return value in %a0. This convention is implemented in the
+ function m68k_svr4_return_value, and by appropriately setting the
+ struct_value_regnum member of `struct gdbarch_tdep'.
+
+ GNU/Linux returns values in the same way as SVR4 does, but uses %a1
+ for passing the structure return value buffer.
+
+ GCC can also generate code where small structures are returned in
+ %d0/%d1 instead of in memory by using -freg-struct-return. This is
+ the default on NetBSD a.out, OpenBSD and GNU/Linux and several
+ embedded systems. This convention is implemented by setting the
+ struct_return member of `struct gdbarch_tdep' to reg_struct_return. */
+
+/* Read a function return value of TYPE from REGCACHE, and copy that
+ into VALBUF. */
+
+static void
+m68k_extract_return_value (struct type *type, struct regcache *regcache,
+ void *valbuf)
{
- int val;
- CORE_ADDR pc = FRAME_SAVED_PC (fi);
- int insn = 0177777 & read_memory_integer (pc, 2);
- val = 0;
- if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */
- val = read_memory_integer (pc + 2, 2);
- else if ((insn & 0170777) == 0050217 /* addql #N, sp */
- || (insn & 0170777) == 0050117) /* addqw */
+ int len = TYPE_LENGTH (type);
+ char buf[M68K_MAX_REGISTER_SIZE];
+
+ if (len <= 4)
{
- val = (insn >> 9) & 7;
- if (val == 0)
- val = 8;
+ regcache_raw_read (regcache, M68K_D0_REGNUM, buf);
+ memcpy (valbuf, buf + (4 - len), len);
}
- else if (insn == 0157774) /* addal #WW, sp */
- val = read_memory_integer (pc + 2, 4);
- val >>= 2;
- return val;
-}
-
-int
-delta68_frame_num_args (struct frame_info *fi)
-{
- int val;
- CORE_ADDR pc = FRAME_SAVED_PC (fi);
- int insn = 0177777 & read_memory_integer (pc, 2);
- val = 0;
- if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */
- val = read_memory_integer (pc + 2, 2);
- else if ((insn & 0170777) == 0050217 /* addql #N, sp */
- || (insn & 0170777) == 0050117) /* addqw */
+ else if (len <= 8)
{
- val = (insn >> 9) & 7;
- if (val == 0)
- val = 8;
+ regcache_raw_read (regcache, M68K_D0_REGNUM, buf);
+ memcpy (valbuf, buf + (8 - len), len - 4);
+ regcache_raw_read (regcache, M68K_D1_REGNUM,
+ (char *) valbuf + (len - 4));
}
- else if (insn == 0157774) /* addal #WW, sp */
- val = read_memory_integer (pc + 2, 4);
- val >>= 2;
- return val;
-}
-
-int
-news_frame_num_args (struct frame_info *fi)
-{
- int val;
- CORE_ADDR pc = FRAME_SAVED_PC (fi);
- int insn = 0177777 & read_memory_integer (pc, 2);
- val = 0;
- if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */
- val = read_memory_integer (pc + 2, 2);
- else if ((insn & 0170777) == 0050217 /* addql #N, sp */
- || (insn & 0170777) == 0050117) /* addqw */
+ else
+ internal_error (__FILE__, __LINE__,
+ _("Cannot extract return value of %d bytes long."), len);
+}
+
+static void
+m68k_svr4_extract_return_value (struct type *type, struct regcache *regcache,
+ void *valbuf)
+{
+ int len = TYPE_LENGTH (type);
+ char buf[M68K_MAX_REGISTER_SIZE];
+
+ if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
- val = (insn >> 9) & 7;
- if (val == 0)
- val = 8;
+ regcache_raw_read (regcache, M68K_FP0_REGNUM, buf);
+ convert_typed_floating (buf, builtin_type_m68881_ext, valbuf, type);
}
- else if (insn == 0157774) /* addal #WW, sp */
- val = read_memory_integer (pc + 2, 4);
- val >>= 2;
- return val;
+ else if (TYPE_CODE (type) == TYPE_CODE_PTR && len == 4)
+ regcache_raw_read (regcache, M68K_A0_REGNUM, valbuf);
+ else
+ m68k_extract_return_value (type, regcache, valbuf);
}
-/* Push an empty stack frame, to record the current PC, etc. */
+/* Write a function return value of TYPE from VALBUF into REGCACHE. */
-void
-m68k_push_dummy_frame (void)
+static void
+m68k_store_return_value (struct type *type, struct regcache *regcache,
+ const void *valbuf)
{
- register CORE_ADDR sp = read_register (SP_REGNUM);
- register int regnum;
- char raw_buffer[12];
-
- sp = push_word (sp, read_register (PC_REGNUM));
- sp = push_word (sp, read_register (FP_REGNUM));
- write_register (FP_REGNUM, sp);
+ int len = TYPE_LENGTH (type);
- /* Always save the floating-point registers, whether they exist on
- this target or not. */
- for (regnum = FP0_REGNUM + 7; regnum >= FP0_REGNUM; regnum--)
+ if (len <= 4)
+ regcache_raw_write_part (regcache, M68K_D0_REGNUM, 4 - len, len, valbuf);
+ else if (len <= 8)
{
- read_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 12);
- sp = push_bytes (sp, raw_buffer, 12);
+ regcache_raw_write_part (regcache, M68K_D0_REGNUM, 8 - len,
+ len - 4, valbuf);
+ regcache_raw_write (regcache, M68K_D1_REGNUM,
+ (char *) valbuf + (len - 4));
}
+ else
+ internal_error (__FILE__, __LINE__,
+ _("Cannot store return value of %d bytes long."), len);
+}
- for (regnum = FP_REGNUM - 1; regnum >= 0; regnum--)
+static void
+m68k_svr4_store_return_value (struct type *type, struct regcache *regcache,
+ const void *valbuf)
+{
+ int len = TYPE_LENGTH (type);
+
+ if (TYPE_CODE (type) == TYPE_CODE_FLT)
+ {
+ char buf[M68K_MAX_REGISTER_SIZE];
+ convert_typed_floating (valbuf, type, buf, builtin_type_m68881_ext);
+ regcache_raw_write (regcache, M68K_FP0_REGNUM, buf);
+ }
+ else if (TYPE_CODE (type) == TYPE_CODE_PTR && len == 4)
{
- sp = push_word (sp, read_register (regnum));
+ regcache_raw_write (regcache, M68K_A0_REGNUM, valbuf);
+ regcache_raw_write (regcache, M68K_D0_REGNUM, valbuf);
}
- sp = push_word (sp, read_register (PS_REGNUM));
- write_register (SP_REGNUM, sp);
+ else
+ m68k_store_return_value (type, regcache, valbuf);
}
-/* Discard from the stack the innermost frame,
- restoring all saved registers. */
+/* Return non-zero if TYPE, which is assumed to be a structure or
+ union type, should be returned in registers for architecture
+ GDBARCH. */
-void
-m68k_pop_frame (void)
+static int
+m68k_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type)
{
- register struct frame_info *frame = get_current_frame ();
- register CORE_ADDR fp;
- register int regnum;
- struct frame_saved_regs fsr;
- char raw_buffer[12];
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ enum type_code code = TYPE_CODE (type);
+ int len = TYPE_LENGTH (type);
- fp = FRAME_FP (frame);
- get_frame_saved_regs (frame, &fsr);
- for (regnum = FP0_REGNUM + 7; regnum >= FP0_REGNUM; regnum--)
- {
- if (fsr.regs[regnum])
- {
- read_memory (fsr.regs[regnum], raw_buffer, 12);
- write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 12);
- }
- }
- for (regnum = FP_REGNUM - 1; regnum >= 0; regnum--)
+ gdb_assert (code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION);
+
+ if (tdep->struct_return == pcc_struct_return)
+ return 0;
+
+ return (len == 1 || len == 2 || len == 4 || len == 8);
+}
+
+/* Determine, for architecture GDBARCH, how a return value of TYPE
+ should be returned. If it is supposed to be returned in registers,
+ and READBUF is non-zero, read the appropriate value from REGCACHE,
+ and copy it into READBUF. If WRITEBUF is non-zero, write the value
+ from WRITEBUF into REGCACHE. */
+
+static enum return_value_convention
+m68k_return_value (struct gdbarch *gdbarch, struct type *type,
+ struct regcache *regcache, void *readbuf,
+ const void *writebuf)
+{
+ enum type_code code = TYPE_CODE (type);
+
+ if ((code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION)
+ && !m68k_reg_struct_return_p (gdbarch, type))
+ return RETURN_VALUE_STRUCT_CONVENTION;
+
+ /* GCC returns a `long double' in memory. */
+ if (code == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12)
+ return RETURN_VALUE_STRUCT_CONVENTION;
+
+ if (readbuf)
+ m68k_extract_return_value (type, regcache, readbuf);
+ if (writebuf)
+ m68k_store_return_value (type, regcache, writebuf);
+
+ return RETURN_VALUE_REGISTER_CONVENTION;
+}
+
+static enum return_value_convention
+m68k_svr4_return_value (struct gdbarch *gdbarch, struct type *type,
+ struct regcache *regcache, void *readbuf,
+ const void *writebuf)
+{
+ enum type_code code = TYPE_CODE (type);
+
+ if ((code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION)
+ && !m68k_reg_struct_return_p (gdbarch, type))
{
- if (fsr.regs[regnum])
+ /* The System V ABI says that:
+
+ "A function returning a structure or union also sets %a0 to
+ the value it finds in %a0. Thus when the caller receives
+ control again, the address of the returned object resides in
+ register %a0."
+
+ So the ABI guarantees that we can always find the return
+ value just after the function has returned. */
+
+ if (readbuf)
{
- write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
+ ULONGEST addr;
+
+ regcache_raw_read_unsigned (regcache, M68K_A0_REGNUM, &addr);
+ read_memory (addr, readbuf, TYPE_LENGTH (type));
}
+
+ return RETURN_VALUE_ABI_RETURNS_ADDRESS;
}
- if (fsr.regs[PS_REGNUM])
+
+ /* This special case is for structures consisting of a single
+ `float' or `double' member. These structures are returned in
+ %fp0. For these structures, we call ourselves recursively,
+ changing TYPE into the type of the first member of the structure.
+ Since that should work for all structures that have only one
+ member, we don't bother to check the member's type here. */
+ if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
{
- write_register (PS_REGNUM,
- read_memory_integer (fsr.regs[PS_REGNUM], 4));
+ type = check_typedef (TYPE_FIELD_TYPE (type, 0));
+ return m68k_svr4_return_value (gdbarch, type, regcache,
+ readbuf, writebuf);
}
- write_register (FP_REGNUM, read_memory_integer (fp, 4));
- write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
- write_register (SP_REGNUM, fp + 8);
- flush_cached_frames ();
+
+ if (readbuf)
+ m68k_svr4_extract_return_value (type, regcache, readbuf);
+ if (writebuf)
+ m68k_svr4_store_return_value (type, regcache, writebuf);
+
+ return RETURN_VALUE_REGISTER_CONVENTION;
}
\f
-/* Given an ip value corresponding to the start of a function,
- return the ip of the first instruction after the function
- prologue. This is the generic m68k support. Machines which
- require something different can override the SKIP_PROLOGUE
- macro to point elsewhere.
+static CORE_ADDR
+m68k_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
+ struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
+ struct value **args, CORE_ADDR sp, int struct_return,
+ CORE_ADDR struct_addr)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ char buf[4];
+ int i;
- Some instructions which typically may appear in a function
- prologue include:
+ /* Push arguments in reverse order. */
+ for (i = nargs - 1; i >= 0; i--)
+ {
+ struct type *value_type = value_enclosing_type (args[i]);
+ int len = TYPE_LENGTH (value_type);
+ int container_len = (len + 3) & ~3;
+ int offset;
+
+ /* Non-scalars bigger than 4 bytes are left aligned, others are
+ right aligned. */
+ if ((TYPE_CODE (value_type) == TYPE_CODE_STRUCT
+ || TYPE_CODE (value_type) == TYPE_CODE_UNION
+ || TYPE_CODE (value_type) == TYPE_CODE_ARRAY)
+ && len > 4)
+ offset = 0;
+ else
+ offset = container_len - len;
+ sp -= container_len;
+ write_memory (sp + offset, value_contents_all (args[i]), len);
+ }
- A link instruction, word form:
+ /* Store struct value address. */
+ if (struct_return)
+ {
+ store_unsigned_integer (buf, 4, struct_addr);
+ regcache_cooked_write (regcache, tdep->struct_value_regnum, buf);
+ }
- link.w %a6,&0 4e56 XXXX
+ /* Store return address. */
+ sp -= 4;
+ store_unsigned_integer (buf, 4, bp_addr);
+ write_memory (sp, buf, 4);
- A link instruction, long form:
+ /* Finally, update the stack pointer... */
+ store_unsigned_integer (buf, 4, sp);
+ regcache_cooked_write (regcache, M68K_SP_REGNUM, buf);
- link.l %fp,&F%1 480e XXXX XXXX
+ /* ...and fake a frame pointer. */
+ regcache_cooked_write (regcache, M68K_FP_REGNUM, buf);
+
+ /* DWARF2/GCC uses the stack address *before* the function call as a
+ frame's CFA. */
+ return sp + 8;
+}
+\f
+struct m68k_frame_cache
+{
+ /* Base address. */
+ CORE_ADDR base;
+ CORE_ADDR sp_offset;
+ CORE_ADDR pc;
- A movm instruction to preserve integer regs:
+ /* Saved registers. */
+ CORE_ADDR saved_regs[M68K_NUM_REGS];
+ CORE_ADDR saved_sp;
- movm.l &M%1,(4,%sp) 48ef XXXX XXXX
+ /* Stack space reserved for local variables. */
+ long locals;
+};
- A fmovm instruction to preserve float regs:
+/* Allocate and initialize a frame cache. */
- fmovm &FPM%1,(FPO%1,%sp) f237 XXXX XXXX XXXX XXXX
+static struct m68k_frame_cache *
+m68k_alloc_frame_cache (void)
+{
+ struct m68k_frame_cache *cache;
+ int i;
- Some profiling setup code (FIXME, not recognized yet):
+ cache = FRAME_OBSTACK_ZALLOC (struct m68k_frame_cache);
- lea.l (.L3,%pc),%a1 43fb XXXX XXXX XXXX
- bsr _mcount 61ff XXXX XXXX
+ /* Base address. */
+ cache->base = 0;
+ cache->sp_offset = -4;
+ cache->pc = 0;
- */
+ /* Saved registers. We initialize these to -1 since zero is a valid
+ offset (that's where %fp is supposed to be stored). */
+ for (i = 0; i < M68K_NUM_REGS; i++)
+ cache->saved_regs[i] = -1;
-CORE_ADDR
-m68k_skip_prologue (CORE_ADDR ip)
+ /* Frameless until proven otherwise. */
+ cache->locals = -1;
+
+ return cache;
+}
+
+/* Check whether PC points at a code that sets up a new stack frame.
+ If so, it updates CACHE and returns the address of the first
+ instruction after the sequence that sets removes the "hidden"
+ argument from the stack or CURRENT_PC, whichever is smaller.
+ Otherwise, return PC. */
+
+static CORE_ADDR
+m68k_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc,
+ struct m68k_frame_cache *cache)
{
- register CORE_ADDR limit;
- struct symtab_and_line sal;
- register int op;
+ int op;
- /* Find out if there is a known limit for the extent of the prologue.
- If so, ensure we don't go past it. If not, assume "infinity". */
+ if (pc >= current_pc)
+ return current_pc;
- sal = find_pc_line (ip, 0);
- limit = (sal.end) ? sal.end : (CORE_ADDR) ~0;
+ op = read_memory_unsigned_integer (pc, 2);
- while (ip < limit)
+ if (op == P_LINKW_FP || op == P_LINKL_FP || op == P_PEA_FP)
{
- op = read_memory_integer (ip, 2);
- op &= 0xFFFF;
-
+ cache->saved_regs[M68K_FP_REGNUM] = 0;
+ cache->sp_offset += 4;
if (op == P_LINKW_FP)
- ip += 4; /* Skip link.w */
- else if (op == P_PEA_FP)
- ip += 2; /* Skip pea %fp */
- else if (op == P_MOVL_SP_FP)
- ip += 2; /* Skip move.l %sp, %fp */
+ {
+ /* link.w %fp, #-N */
+ /* link.w %fp, #0; adda.l #-N, %sp */
+ cache->locals = -read_memory_integer (pc + 2, 2);
+
+ if (pc + 4 < current_pc && cache->locals == 0)
+ {
+ op = read_memory_unsigned_integer (pc + 4, 2);
+ if (op == P_ADDAL_SP)
+ {
+ cache->locals = read_memory_integer (pc + 6, 4);
+ return pc + 10;
+ }
+ }
+
+ return pc + 4;
+ }
else if (op == P_LINKL_FP)
- ip += 6; /* Skip link.l */
- else if (op == P_MOVML)
- ip += 6; /* Skip movm.l */
- else if (op == P_FMOVM)
- ip += 10; /* Skip fmovm */
+ {
+ /* link.l %fp, #-N */
+ cache->locals = -read_memory_integer (pc + 2, 4);
+ return pc + 6;
+ }
else
- break; /* Found unknown code, bail out. */
- }
- return (ip);
-}
+ {
+ /* pea (%fp); movea.l %sp, %fp */
+ cache->locals = 0;
-void
-m68k_find_saved_regs (struct frame_info *frame_info,
- struct frame_saved_regs *saved_regs)
-{
- register int regnum;
- register int regmask;
- register CORE_ADDR next_addr;
- register CORE_ADDR pc;
-
- /* First possible address for a pc in a call dummy for this frame. */
- CORE_ADDR possible_call_dummy_start =
- (frame_info)->frame - CALL_DUMMY_LENGTH - FP_REGNUM * 4 - 4 - 8 * 12;
-
- int nextinsn;
- memset (saved_regs, 0, sizeof (*saved_regs));
- if ((frame_info)->pc >= possible_call_dummy_start
- && (frame_info)->pc <= (frame_info)->frame)
- {
+ if (pc + 2 < current_pc)
+ {
+ op = read_memory_unsigned_integer (pc + 2, 2);
- /* It is a call dummy. We could just stop now, since we know
- what the call dummy saves and where. But this code proceeds
- to parse the "prologue" which is part of the call dummy.
- This is needlessly complex and confusing. FIXME. */
+ if (op == P_MOVEAL_SP_FP)
+ {
+ /* move.l %sp, %fp */
+ return pc + 4;
+ }
+ }
- next_addr = (frame_info)->frame;
- pc = possible_call_dummy_start;
+ return pc + 2;
+ }
}
- else
+ else if ((op & 0170777) == P_SUBQW_SP || (op & 0170777) == P_SUBQL_SP)
{
- pc = get_pc_function_start ((frame_info)->pc);
-
- nextinsn = read_memory_integer (pc, 2);
- if (P_PEA_FP == nextinsn
- && P_MOVL_SP_FP == read_memory_integer (pc + 2, 2))
- {
- /* pea %fp
- move.l %sp, %fp */
- next_addr = frame_info->frame;
- pc += 4;
- }
- else if (P_LINKL_FP == nextinsn)
- /* link.l %fp */
- /* Find the address above the saved
- regs using the amount of storage from the link instruction. */
+ /* subq.[wl] #N,%sp */
+ /* subq.[wl] #8,%sp; subq.[wl] #N,%sp */
+ cache->locals = (op & 07000) == 0 ? 8 : (op & 07000) >> 9;
+ if (pc + 2 < current_pc)
{
- next_addr = (frame_info)->frame + read_memory_integer (pc + 2, 4);
- pc += 6;
+ op = read_memory_unsigned_integer (pc + 2, 2);
+ if ((op & 0170777) == P_SUBQW_SP || (op & 0170777) == P_SUBQL_SP)
+ {
+ cache->locals += (op & 07000) == 0 ? 8 : (op & 07000) >> 9;
+ return pc + 4;
+ }
}
- else if (P_LINKW_FP == nextinsn)
- /* link.w %fp */
- /* Find the address above the saved
- regs using the amount of storage from the link instruction. */
+ return pc + 2;
+ }
+ else if (op == P_ADDAW_SP || op == P_LEA_SP_SP)
+ {
+ /* adda.w #-N,%sp */
+ /* lea (-N,%sp),%sp */
+ cache->locals = -read_memory_integer (pc + 2, 2);
+ return pc + 4;
+ }
+ else if (op == P_ADDAL_SP)
+ {
+ /* adda.l #-N,%sp */
+ cache->locals = -read_memory_integer (pc + 2, 4);
+ return pc + 6;
+ }
+
+ return pc;
+}
+
+/* Check whether PC points at code that saves registers on the stack.
+ If so, it updates CACHE and returns the address of the first
+ instruction after the register saves or CURRENT_PC, whichever is
+ smaller. Otherwise, return PC. */
+
+static CORE_ADDR
+m68k_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
+ struct m68k_frame_cache *cache)
+{
+ if (cache->locals >= 0)
+ {
+ CORE_ADDR offset;
+ int op;
+ int i, mask, regno;
+
+ offset = -4 - cache->locals;
+ while (pc < current_pc)
{
- next_addr = (frame_info)->frame + read_memory_integer (pc + 2, 2);
- pc += 4;
+ op = read_memory_unsigned_integer (pc, 2);
+ if (op == P_FMOVEMX_SP)
+ {
+ /* fmovem.x REGS,-(%sp) */
+ op = read_memory_unsigned_integer (pc + 2, 2);
+ if ((op & 0xff00) == 0xe000)
+ {
+ mask = op & 0xff;
+ for (i = 0; i < 16; i++, mask >>= 1)
+ {
+ if (mask & 1)
+ {
+ cache->saved_regs[i + M68K_FP0_REGNUM] = offset;
+ offset -= 12;
+ }
+ }
+ pc += 4;
+ }
+ else
+ break;
+ }
+ else if ((op & 0170677) == P_MOVEL_SP)
+ {
+ /* move.l %R,-(%sp) */
+ regno = ((op & 07000) >> 9) | ((op & 0100) >> 3);
+ cache->saved_regs[regno] = offset;
+ offset -= 4;
+ pc += 2;
+ }
+ else if (op == P_MOVEML_SP)
+ {
+ /* movem.l REGS,-(%sp) */
+ mask = read_memory_unsigned_integer (pc + 2, 2);
+ for (i = 0; i < 16; i++, mask >>= 1)
+ {
+ if (mask & 1)
+ {
+ cache->saved_regs[15 - i] = offset;
+ offset -= 4;
+ }
+ }
+ pc += 4;
+ }
+ else
+ break;
}
- else
- goto lose;
+ }
+
+ return pc;
+}
+
+
+/* Do a full analysis of the prologue at PC and update CACHE
+ accordingly. Bail out early if CURRENT_PC is reached. Return the
+ address where the analysis stopped.
+
+ We handle all cases that can be generated by gcc.
- /* If have an addal #-n, sp next, adjust next_addr. */
- if ((0177777 & read_memory_integer (pc, 2)) == 0157774)
- next_addr += read_memory_integer (pc += 2, 4), pc += 4;
+ For allocating a stack frame:
+
+ link.w %a6,#-N
+ link.l %a6,#-N
+ pea (%fp); move.l %sp,%fp
+ link.w %a6,#0; add.l #-N,%sp
+ subq.l #N,%sp
+ subq.w #N,%sp
+ subq.w #8,%sp; subq.w #N-8,%sp
+ add.w #-N,%sp
+ lea (-N,%sp),%sp
+ add.l #-N,%sp
+
+ For saving registers:
+
+ fmovem.x REGS,-(%sp)
+ move.l R1,-(%sp)
+ move.l R1,-(%sp); move.l R2,-(%sp)
+ movem.l REGS,-(%sp)
+
+ For setting up the PIC register:
+
+ lea (%pc,N),%a5
+
+ */
+
+static CORE_ADDR
+m68k_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
+ struct m68k_frame_cache *cache)
+{
+ unsigned int op;
+
+ pc = m68k_analyze_frame_setup (pc, current_pc, cache);
+ pc = m68k_analyze_register_saves (pc, current_pc, cache);
+ if (pc >= current_pc)
+ return current_pc;
+
+ /* Check for GOT setup. */
+ op = read_memory_unsigned_integer (pc, 4);
+ if (op == P_LEA_PC_A5)
+ {
+ /* lea (%pc,N),%a5 */
+ return pc + 6;
}
- for (;;)
+ return pc;
+}
+
+/* Return PC of first real instruction. */
+
+static CORE_ADDR
+m68k_skip_prologue (CORE_ADDR start_pc)
+{
+ struct m68k_frame_cache cache;
+ CORE_ADDR pc;
+ int op;
+
+ cache.locals = -1;
+ pc = m68k_analyze_prologue (start_pc, (CORE_ADDR) -1, &cache);
+ if (cache.locals < 0)
+ return start_pc;
+ return pc;
+}
+
+static CORE_ADDR
+m68k_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
+{
+ char buf[8];
+
+ frame_unwind_register (next_frame, PC_REGNUM, buf);
+ return extract_typed_address (buf, builtin_type_void_func_ptr);
+}
+\f
+/* Normal frames. */
+
+static struct m68k_frame_cache *
+m68k_frame_cache (struct frame_info *next_frame, void **this_cache)
+{
+ struct m68k_frame_cache *cache;
+ char buf[4];
+ int i;
+
+ if (*this_cache)
+ return *this_cache;
+
+ cache = m68k_alloc_frame_cache ();
+ *this_cache = cache;
+
+ /* In principle, for normal frames, %fp holds the frame pointer,
+ which holds the base address for the current stack frame.
+ However, for functions that don't need it, the frame pointer is
+ optional. For these "frameless" functions the frame pointer is
+ actually the frame pointer of the calling frame. Signal
+ trampolines are just a special case of a "frameless" function.
+ They (usually) share their frame pointer with the frame that was
+ in progress when the signal occurred. */
+
+ frame_unwind_register (next_frame, M68K_FP_REGNUM, buf);
+ cache->base = extract_unsigned_integer (buf, 4);
+ if (cache->base == 0)
+ return cache;
+
+ /* For normal frames, %pc is stored at 4(%fp). */
+ cache->saved_regs[M68K_PC_REGNUM] = 4;
+
+ cache->pc = frame_func_unwind (next_frame);
+ if (cache->pc != 0)
+ m68k_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
+
+ if (cache->locals < 0)
{
- nextinsn = 0xffff & read_memory_integer (pc, 2);
- regmask = read_memory_integer (pc + 2, 2);
- /* fmovemx to -(sp) */
- if (0xf227 == nextinsn && (regmask & 0xff00) == 0xe000)
- {
- /* Regmask's low bit is for register fp7, the first pushed */
- for (regnum = FP0_REGNUM + 8; --regnum >= FP0_REGNUM; regmask >>= 1)
- if (regmask & 1)
- saved_regs->regs[regnum] = (next_addr -= 12);
- pc += 4;
- }
- /* fmovemx to (fp + displacement) */
- else if (0171056 == nextinsn && (regmask & 0xff00) == 0xf000)
- {
- register CORE_ADDR addr;
-
- addr = (frame_info)->frame + read_memory_integer (pc + 4, 2);
- /* Regmask's low bit is for register fp7, the first pushed */
- for (regnum = FP0_REGNUM + 8; --regnum >= FP0_REGNUM; regmask >>= 1)
- if (regmask & 1)
- {
- saved_regs->regs[regnum] = addr;
- addr += 12;
- }
- pc += 6;
- }
- /* moveml to (sp) */
- else if (0044327 == nextinsn)
- {
- /* Regmask's low bit is for register 0, the first written */
- for (regnum = 0; regnum < 16; regnum++, regmask >>= 1)
- if (regmask & 1)
- {
- saved_regs->regs[regnum] = next_addr;
- next_addr += 4;
- }
- pc += 4;
- }
- /* moveml to (fp + displacement) */
- else if (0044356 == nextinsn)
- {
- register CORE_ADDR addr;
-
- addr = (frame_info)->frame + read_memory_integer (pc + 4, 2);
- /* Regmask's low bit is for register 0, the first written */
- for (regnum = 0; regnum < 16; regnum++, regmask >>= 1)
- if (regmask & 1)
- {
- saved_regs->regs[regnum] = addr;
- addr += 4;
- }
- pc += 6;
- }
- /* moveml to -(sp) */
- else if (0044347 == nextinsn)
- {
- /* Regmask's low bit is for register 15, the first pushed */
- for (regnum = 16; --regnum >= 0; regmask >>= 1)
- if (regmask & 1)
- saved_regs->regs[regnum] = (next_addr -= 4);
- pc += 4;
- }
- /* movl r,-(sp) */
- else if (0x2f00 == (0xfff0 & nextinsn))
- {
- regnum = 0xf & nextinsn;
- saved_regs->regs[regnum] = (next_addr -= 4);
- pc += 2;
- }
- /* fmovemx to index of sp */
- else if (0xf236 == nextinsn && (regmask & 0xff00) == 0xf000)
+ /* We didn't find a valid frame, which means that CACHE->base
+ currently holds the frame pointer for our calling frame. If
+ we're at the start of a function, or somewhere half-way its
+ prologue, the function's frame probably hasn't been fully
+ setup yet. Try to reconstruct the base address for the stack
+ frame by looking at the stack pointer. For truly "frameless"
+ functions this might work too. */
+
+ frame_unwind_register (next_frame, M68K_SP_REGNUM, buf);
+ cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset;
+ }
+
+ /* Now that we have the base address for the stack frame we can
+ calculate the value of %sp in the calling frame. */
+ cache->saved_sp = cache->base + 8;
+
+ /* Adjust all the saved registers such that they contain addresses
+ instead of offsets. */
+ for (i = 0; i < M68K_NUM_REGS; i++)
+ if (cache->saved_regs[i] != -1)
+ cache->saved_regs[i] += cache->base;
+
+ return cache;
+}
+
+static void
+m68k_frame_this_id (struct frame_info *next_frame, void **this_cache,
+ struct frame_id *this_id)
+{
+ struct m68k_frame_cache *cache = m68k_frame_cache (next_frame, this_cache);
+
+ /* This marks the outermost frame. */
+ if (cache->base == 0)
+ return;
+
+ /* See the end of m68k_push_dummy_call. */
+ *this_id = frame_id_build (cache->base + 8, cache->pc);
+}
+
+static void
+m68k_frame_prev_register (struct frame_info *next_frame, void **this_cache,
+ int regnum, int *optimizedp,
+ enum lval_type *lvalp, CORE_ADDR *addrp,
+ int *realnump, void *valuep)
+{
+ struct m68k_frame_cache *cache = m68k_frame_cache (next_frame, this_cache);
+
+ gdb_assert (regnum >= 0);
+
+ if (regnum == M68K_SP_REGNUM && cache->saved_sp)
+ {
+ *optimizedp = 0;
+ *lvalp = not_lval;
+ *addrp = 0;
+ *realnump = -1;
+ if (valuep)
{
- /* Regmask's low bit is for register fp0, the first written */
- for (regnum = FP0_REGNUM + 8; --regnum >= FP0_REGNUM; regmask >>= 1)
- if (regmask & 1)
- {
- saved_regs->regs[regnum] = next_addr;
- next_addr += 12;
- }
- pc += 10;
+ /* Store the value. */
+ store_unsigned_integer (valuep, 4, cache->saved_sp);
}
- /* clrw -(sp); movw ccr,-(sp) */
- else if (0x4267 == nextinsn && 0x42e7 == regmask)
+ return;
+ }
+
+ if (regnum < M68K_NUM_REGS && cache->saved_regs[regnum] != -1)
+ {
+ *optimizedp = 0;
+ *lvalp = lval_memory;
+ *addrp = cache->saved_regs[regnum];
+ *realnump = -1;
+ if (valuep)
{
- saved_regs->regs[PS_REGNUM] = (next_addr -= 4);
- pc += 4;
+ /* Read the value in from memory. */
+ read_memory (*addrp, valuep,
+ register_size (current_gdbarch, regnum));
}
- else
- break;
+ return;
}
-lose:;
- saved_regs->regs[SP_REGNUM] = (frame_info)->frame + 8;
- saved_regs->regs[FP_REGNUM] = (frame_info)->frame;
- saved_regs->regs[PC_REGNUM] = (frame_info)->frame + 4;
-#ifdef SIG_SP_FP_OFFSET
- /* Adjust saved SP_REGNUM for fake _sigtramp frames. */
- if (frame_info->signal_handler_caller && frame_info->next)
- saved_regs->regs[SP_REGNUM] = frame_info->next->frame + SIG_SP_FP_OFFSET;
-#endif
+
+ *optimizedp = 0;
+ *lvalp = lval_register;
+ *addrp = 0;
+ *realnump = regnum;
+ if (valuep)
+ frame_unwind_register (next_frame, (*realnump), valuep);
+}
+
+static const struct frame_unwind m68k_frame_unwind =
+{
+ NORMAL_FRAME,
+ m68k_frame_this_id,
+ m68k_frame_prev_register
+};
+
+static const struct frame_unwind *
+m68k_frame_sniffer (struct frame_info *next_frame)
+{
+ return &m68k_frame_unwind;
+}
+\f
+static CORE_ADDR
+m68k_frame_base_address (struct frame_info *next_frame, void **this_cache)
+{
+ struct m68k_frame_cache *cache = m68k_frame_cache (next_frame, this_cache);
+
+ return cache->base;
}
+static const struct frame_base m68k_frame_base =
+{
+ &m68k_frame_unwind,
+ m68k_frame_base_address,
+ m68k_frame_base_address,
+ m68k_frame_base_address
+};
+
+static struct frame_id
+m68k_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
+{
+ char buf[4];
+ CORE_ADDR fp;
+ frame_unwind_register (next_frame, M68K_FP_REGNUM, buf);
+ fp = extract_unsigned_integer (buf, 4);
+
+ /* See the end of m68k_push_dummy_call. */
+ return frame_id_build (fp + 8, frame_pc_unwind (next_frame));
+}
+\f
#ifdef USE_PROC_FS /* Target dependent support for /proc */
#include <sys/procfs.h>
void
supply_gregset (gregset_t *gregsetp)
{
- register int regi;
- register greg_t *regp = (greg_t *) gregsetp;
+ int regi;
+ greg_t *regp = (greg_t *) gregsetp;
for (regi = 0; regi < R_PC; regi++)
{
- supply_register (regi, (char *) (regp + regi));
+ regcache_raw_supply (current_regcache, regi, (char *) (regp + regi));
}
- supply_register (PS_REGNUM, (char *) (regp + R_PS));
- supply_register (PC_REGNUM, (char *) (regp + R_PC));
+ regcache_raw_supply (current_regcache, PS_REGNUM, (char *) (regp + R_PS));
+ regcache_raw_supply (current_regcache, PC_REGNUM, (char *) (regp + R_PC));
}
void
fill_gregset (gregset_t *gregsetp, int regno)
{
- register int regi;
- register greg_t *regp = (greg_t *) gregsetp;
+ int regi;
+ greg_t *regp = (greg_t *) gregsetp;
for (regi = 0; regi < R_PC; regi++)
{
- if ((regno == -1) || (regno == regi))
- {
- *(regp + regi) = *(int *) ®isters[REGISTER_BYTE (regi)];
- }
- }
- if ((regno == -1) || (regno == PS_REGNUM))
- {
- *(regp + R_PS) = *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)];
- }
- if ((regno == -1) || (regno == PC_REGNUM))
- {
- *(regp + R_PC) = *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)];
+ if (regno == -1 || regno == regi)
+ regcache_raw_collect (current_regcache, regi, regp + regi);
}
+ if (regno == -1 || regno == PS_REGNUM)
+ regcache_raw_collect (current_regcache, PS_REGNUM, regp + R_PS);
+ if (regno == -1 || regno == PC_REGNUM)
+ regcache_raw_collect (current_regcache, PC_REGNUM, regp + R_PC);
}
#if defined (FP0_REGNUM)
void
supply_fpregset (fpregset_t *fpregsetp)
{
- register int regi;
+ int regi;
char *from;
- for (regi = FP0_REGNUM; regi < FPC_REGNUM; regi++)
+ for (regi = FP0_REGNUM; regi < M68K_FPC_REGNUM; regi++)
{
from = (char *) &(fpregsetp->f_fpregs[regi - FP0_REGNUM][0]);
- supply_register (regi, from);
+ regcache_raw_supply (current_regcache, regi, from);
}
- supply_register (FPC_REGNUM, (char *) &(fpregsetp->f_pcr));
- supply_register (FPS_REGNUM, (char *) &(fpregsetp->f_psr));
- supply_register (FPI_REGNUM, (char *) &(fpregsetp->f_fpiaddr));
+ regcache_raw_supply (current_regcache, M68K_FPC_REGNUM,
+ (char *) &(fpregsetp->f_pcr));
+ regcache_raw_supply (current_regcache, M68K_FPS_REGNUM,
+ (char *) &(fpregsetp->f_psr));
+ regcache_raw_supply (current_regcache, M68K_FPI_REGNUM,
+ (char *) &(fpregsetp->f_fpiaddr));
}
/* Given a pointer to a floating point register set in /proc format
fill_fpregset (fpregset_t *fpregsetp, int regno)
{
int regi;
- char *to;
- char *from;
- for (regi = FP0_REGNUM; regi < FPC_REGNUM; regi++)
- {
- if ((regno == -1) || (regno == regi))
- {
- from = (char *) ®isters[REGISTER_BYTE (regi)];
- to = (char *) &(fpregsetp->f_fpregs[regi - FP0_REGNUM][0]);
- memcpy (to, from, REGISTER_RAW_SIZE (regi));
- }
- }
- if ((regno == -1) || (regno == FPC_REGNUM))
- {
- fpregsetp->f_pcr = *(int *) ®isters[REGISTER_BYTE (FPC_REGNUM)];
- }
- if ((regno == -1) || (regno == FPS_REGNUM))
- {
- fpregsetp->f_psr = *(int *) ®isters[REGISTER_BYTE (FPS_REGNUM)];
- }
- if ((regno == -1) || (regno == FPI_REGNUM))
+ for (regi = FP0_REGNUM; regi < M68K_FPC_REGNUM; regi++)
{
- fpregsetp->f_fpiaddr = *(int *) ®isters[REGISTER_BYTE (FPI_REGNUM)];
+ if (regno == -1 || regno == regi)
+ regcache_raw_collect (current_regcache, regi,
+ &fpregsetp->f_fpregs[regi - FP0_REGNUM][0]);
}
+ if (regno == -1 || regno == M68K_FPC_REGNUM)
+ regcache_raw_collect (current_regcache, M68K_FPC_REGNUM,
+ &fpregsetp->f_pcr);
+ if (regno == -1 || regno == M68K_FPS_REGNUM)
+ regcache_raw_collect (current_regcache, M68K_FPS_REGNUM,
+ &fpregsetp->f_psr);
+ if (regno == -1 || regno == M68K_FPI_REGNUM)
+ regcache_raw_collect (current_regcache, M68K_FPI_REGNUM,
+ &fpregsetp->f_fpiaddr);
}
#endif /* defined (FP0_REGNUM) */
we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
This routine returns true on success. */
-/* NOTE: cagney/2000-11-08: For this function to be fully multi-arched
- the macro's JB_PC and JB_ELEMENT_SIZE would need to be moved into
- the ``struct gdbarch_tdep'' object and then set on a target ISA/ABI
- dependant basis. */
-
-int
+static int
m68k_get_longjmp_target (CORE_ADDR *pc)
{
-#if defined (JB_PC) && defined (JB_ELEMENT_SIZE)
char *buf;
CORE_ADDR sp, jb_addr;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+
+ if (tdep->jb_pc < 0)
+ {
+ internal_error (__FILE__, __LINE__,
+ _("m68k_get_longjmp_target: not implemented"));
+ return 0;
+ }
buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
sp = read_register (SP_REGNUM);
buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
return 0;
- jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
+ jb_addr = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
- if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
+ if (target_read_memory (jb_addr + tdep->jb_pc * tdep->jb_elt_size, buf,
TARGET_PTR_BIT / TARGET_CHAR_BIT))
return 0;
- *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
-
+ *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
return 1;
+}
+\f
+
+/* System V Release 4 (SVR4). */
+
+void
+m68k_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ /* SVR4 uses a different calling convention. */
+ set_gdbarch_return_value (gdbarch, m68k_svr4_return_value);
+
+ /* SVR4 uses %a0 instead of %a1. */
+ tdep->struct_value_regnum = M68K_A0_REGNUM;
+}
+\f
+
+/* Function: m68k_gdbarch_init
+ Initializer function for the m68k gdbarch vector.
+ Called by gdbarch. Sets up the gdbarch vector(s) for this target. */
+
+static struct gdbarch *
+m68k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+{
+ struct gdbarch_tdep *tdep = NULL;
+ struct gdbarch *gdbarch;
+
+ /* find a candidate among the list of pre-declared architectures. */
+ arches = gdbarch_list_lookup_by_info (arches, &info);
+ if (arches != NULL)
+ return (arches->gdbarch);
+
+ tdep = xmalloc (sizeof (struct gdbarch_tdep));
+ gdbarch = gdbarch_alloc (&info, tdep);
+
+ set_gdbarch_long_double_format (gdbarch, &floatformat_m68881_ext);
+ set_gdbarch_long_double_bit (gdbarch, 96);
+
+ set_gdbarch_skip_prologue (gdbarch, m68k_skip_prologue);
+ set_gdbarch_breakpoint_from_pc (gdbarch, m68k_local_breakpoint_from_pc);
+
+ /* Stack grows down. */
+ set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
+
+ set_gdbarch_believe_pcc_promotion (gdbarch, 1);
+ set_gdbarch_decr_pc_after_break (gdbarch, 2);
+
+ set_gdbarch_frame_args_skip (gdbarch, 8);
+
+ set_gdbarch_register_type (gdbarch, m68k_register_type);
+ set_gdbarch_register_name (gdbarch, m68k_register_name);
+ set_gdbarch_num_regs (gdbarch, 29);
+ set_gdbarch_register_bytes_ok (gdbarch, m68k_register_bytes_ok);
+ set_gdbarch_sp_regnum (gdbarch, M68K_SP_REGNUM);
+ set_gdbarch_pc_regnum (gdbarch, M68K_PC_REGNUM);
+ set_gdbarch_ps_regnum (gdbarch, M68K_PS_REGNUM);
+ set_gdbarch_fp0_regnum (gdbarch, M68K_FP0_REGNUM);
+ set_gdbarch_convert_register_p (gdbarch, m68k_convert_register_p);
+ set_gdbarch_register_to_value (gdbarch, m68k_register_to_value);
+ set_gdbarch_value_to_register (gdbarch, m68k_value_to_register);
+
+ set_gdbarch_push_dummy_call (gdbarch, m68k_push_dummy_call);
+ set_gdbarch_return_value (gdbarch, m68k_return_value);
+
+ /* Disassembler. */
+ set_gdbarch_print_insn (gdbarch, print_insn_m68k);
+
+#if defined JB_PC && defined JB_ELEMENT_SIZE
+ tdep->jb_pc = JB_PC;
+ tdep->jb_elt_size = JB_ELEMENT_SIZE;
#else
- internal_error (__FILE__, __LINE__,
- "m68k_get_longjmp_target: not implemented");
- return 0;
+ tdep->jb_pc = -1;
#endif
+ tdep->struct_value_regnum = M68K_A1_REGNUM;
+ tdep->struct_return = reg_struct_return;
+
+ /* Frame unwinder. */
+ set_gdbarch_unwind_dummy_id (gdbarch, m68k_unwind_dummy_id);
+ set_gdbarch_unwind_pc (gdbarch, m68k_unwind_pc);
+
+ /* Hook in the DWARF CFI frame unwinder. */
+ frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
+
+ frame_base_set_default (gdbarch, &m68k_frame_base);
+
+ /* Hook in ABI-specific overrides, if they have been registered. */
+ gdbarch_init_osabi (info, gdbarch);
+
+ /* Now we have tuned the configuration, set a few final things,
+ based on what the OS ABI has told us. */
+
+ if (tdep->jb_pc >= 0)
+ set_gdbarch_get_longjmp_target (gdbarch, m68k_get_longjmp_target);
+
+ frame_unwind_append_sniffer (gdbarch, m68k_frame_sniffer);
+
+ return gdbarch;
}
-/* Immediately after a function call, return the saved pc before the frame
- is setup. For sun3's, we check for the common case of being inside of a
- system call, and if so, we know that Sun pushes the call # on the stack
- prior to doing the trap. */
-CORE_ADDR
-m68k_saved_pc_after_call (struct frame_info *frame)
+static void
+m68k_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
{
-#ifdef SYSCALL_TRAP
- int op;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
- op = read_memory_integer (frame->pc - SYSCALL_TRAP_OFFSET, 2);
-
- if (op == SYSCALL_TRAP)
- return read_memory_integer (read_register (SP_REGNUM) + 4, 4);
- else
-#endif /* SYSCALL_TRAP */
- return read_memory_integer (read_register (SP_REGNUM), 4);
+ if (tdep == NULL)
+ return;
}
+extern initialize_file_ftype _initialize_m68k_tdep; /* -Wmissing-prototypes */
void
_initialize_m68k_tdep (void)
{
- tm_print_insn = print_insn_m68k;
+ gdbarch_register (bfd_arch_m68k, m68k_gdbarch_init, m68k_dump_tdep);
}