-/* Copyright (C) 1988, 1990 Free Software Foundation, Inc.
+/* Target-machine dependent code for Motorola 88000 series, for GDB.
+ Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
This file is part of GDB.
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
-#include <stdio.h>
#include "defs.h"
-#include "param.h"
#include "frame.h"
#include "inferior.h"
#include "value.h"
-
-#ifdef USG
-#include <sys/types.h>
-#endif
-
-#include <sys/param.h>
-#include <sys/dir.h>
-#include <signal.h>
#include "gdbcore.h"
-#include <sys/user.h>
-#ifndef USER /* added to support BCS ptrace_user */
-
-#define USER ptrace_user
-#endif
-#include <sys/ioctl.h>
-#include <fcntl.h>
-
-#ifdef COFF_ENCAPSULATE
-#include "a.out.encap.h"
-#else
-#include <a.out.h>
-#endif
-
-#include <sys/file.h>
-#include <sys/stat.h>
#include "symtab.h"
#include "setjmp.h"
#include "value.h"
+#include "ieee-float.h" /* for ext_format & friends */
-int stack_error;
-jmp_buf stack_jmp;
+/* Size of an instruction */
+#define BYTES_PER_88K_INSN 4
-void
-tdesc_error_function (environment, continuable, message)
-dc_word_t environment;
-dc_boolean_t continuable;
-char *message;
-{
- if (stack_error) longjmp (stack_jmp, 1);
- if (!continuable)
- {
- printf("%s\n",message);
- abort();
- }
-}
+void frame_find_saved_regs ();
+/* is this target an m88110? Otherwise assume m88100. This has
+ relevance for the ways in which we screw with instruction pointers. */
+int target_is_m88110 = 0;
-void
-tdesc_read_function (environment, memory, length, buffer)
-dc_word_t environment;
-dc_word_t memory;
-int length;
-char *buffer;
+/* FIXME: this is really just a guess based on m88110 being big
+ endian. */
+const struct ext_format ext_format_m88110 = {
+/* tot sbyte smask expbyte manbyte */
+ 10, 0, 0x80, 0,1, 4,8 /* m88110 */
+};
+
+/* Given a GDB frame, determine the address of the calling function's frame.
+ This will be used to create a new GDB frame struct, and then
+ INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
+
+ For us, the frame address is its stack pointer value, so we look up
+ the function prologue to determine the caller's sp value, and return it. */
+
+FRAME_ADDR
+frame_chain (thisframe)
+ FRAME thisframe;
{
- int ptrace_code;
- errno = 0;
- if (memory < 2048)
-#if 0
- /* This is a no-op! It sets buffer, but doesn't do anything to
- what buffer points to. What does this function do anyway?
- And this is wrong for cross-debugging. */
- buffer = ptrace (3, inferior_pid, memory, 0);
-#else
- return;
-#endif
+
+ frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0);
+ /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
+ the ADDRESS, of SP_REGNUM. It also depends on the cache of
+ frame_find_saved_regs results. */
+ if (thisframe->fsr->regs[SP_REGNUM])
+ return thisframe->fsr->regs[SP_REGNUM];
else
- read_memory (memory, buffer, length);
+ return thisframe->frame; /* Leaf fn -- next frame up has same SP. */
}
-/* Map function for tdesc */
-void
-tdesc_map_function (map_env, loc, map_info_in, map_info_out)
-dc_word_t map_env;
-dc_word_t loc;
-dc_map_info_in_t map_info_in;
-dc_map_info_out_t *map_info_out;
+int
+frameless_function_invocation (frame)
+ FRAME frame;
{
-int map_flags = DC_MIO_ENTRY_POINT | DC_MIO_IMPLICIT_PROLOGUE_END;
-int entry_point = get_pc_function_start(loc);
-map_info_out->flags = map_flags;
-map_info_out->entry_point = entry_point;
-}
-dc_handle_t tdesc_handle;
-
-extern int debug_info;
+ frame_find_saved_regs (frame, (struct frame_saved_regs *) 0);
+ /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
+ the ADDRESS, of SP_REGNUM. It also depends on the cache of
+ frame_find_saved_regs results. */
+ if (frame->fsr->regs[SP_REGNUM])
+ return 0; /* Frameful -- return addr saved somewhere */
+ else
+ return 1; /* Frameless -- no saved return address */
+}
void
-init_tdesc ()
+init_extra_frame_info (fromleaf, fi)
+ int fromleaf;
+ struct frame_info *fi;
{
- tdesc_handle = dc_initiate (debug_info, tdesc_error_function,
- 0,tdesc_read_function,0,0,0,0,0,tdesc_map_function,0);
-}
-dc_dcontext_t current_context;
-
-/* setup current context, called from wait_for_inferior */
+ fi->fsr = 0; /* Not yet allocated */
+ fi->args_pointer = 0; /* Unknown */
+ fi->locals_pointer = 0; /* Unknown */
+}
+\f
+/* Examine an m88k function prologue, recording the addresses at which
+ registers are saved explicitly by the prologue code, and returning
+ the address of the first instruction after the prologue (but not
+ after the instruction at address LIMIT, as explained below).
+
+ LIMIT places an upper bound on addresses of the instructions to be
+ examined. If the prologue code scan reaches LIMIT, the scan is
+ aborted and LIMIT is returned. This is used, when examining the
+ prologue for the current frame, to keep examine_prologue () from
+ claiming that a given register has been saved when in fact the
+ instruction that saves it has not yet been executed. LIMIT is used
+ at other times to stop the scan when we hit code after the true
+ function prologue (e.g. for the first source line) which might
+ otherwise be mistaken for function prologue.
+
+ The format of the function prologue matched by this routine is
+ derived from examination of the source to gcc 1.95, particularly
+ the routine output_prologue () in config/out-m88k.c.
+
+ subu r31,r31,n # stack pointer update
+
+ (st rn,r31,offset)? # save incoming regs
+ (st.d rn,r31,offset)?
+
+ (addu r30,r31,n)? # frame pointer update
+
+ (pic sequence)? # PIC code prologue
+
+ (or rn,rm,0)? # Move parameters to other regs
+*/
+
+/* Macros for extracting fields from instructions. */
+
+#define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
+#define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
+
+/* Prologue code that handles position-independent-code setup. */
+
+struct pic_prologue_code {
+ unsigned long insn, mask;
+};
+
+static struct pic_prologue_code pic_prologue_code [] = {
+/* FIXME -- until this is translated to hex, we won't match it... */
+ { 0xffffffff, 0 },
+ /* or r10,r1,0 (if not saved) */
+ /* bsr.n LabN */
+ /* or.u r25,r0,const */
+ /*LabN: or r25,r25,const2 */
+ /* addu r25,r25,1 */
+ /* or r1,r10,0 (if not saved) */
+};
+
+/* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
+ is not the address of a valid instruction, the address of the next
+ instruction beyond ADDR otherwise. *PWORD1 receives the first word
+ of the instruction. PWORD2 is ignored -- a remnant of the original
+ i960 version. */
+
+#define NEXT_PROLOGUE_INSN(addr, lim, pword1) \
+ (((addr) < (lim)) ? next_insn (addr, pword1) : 0)
+
+/* Read the m88k instruction at 'memaddr' and return the address of
+ the next instruction after that, or 0 if 'memaddr' is not the
+ address of a valid instruction. The instruction
+ is stored at 'pword1'. */
-dc_dcontext_t
-init_dcontext()
+CORE_ADDR
+next_insn (memaddr, pword1)
+ unsigned long *pword1;
+ CORE_ADDR memaddr;
{
- dc_word_t reg_info[DC_NUM_REG];
- dc_word_t reg_flags[2] = {0,-1};
- dc_word_t aux_info[DC_NUM_AUX];
- dc_word_t aux_flags[2] = {0,-1};
- dc_exactness_t loc_exact = DC_NO;
- dc_word_t psr_info;
- dc_boolean_t psr_ind = 0;
- dc_word_t psr_flags[2] = {0,-1};
-
- bcopy (®isters, reg_info, DC_NUM_REG * 4);
- aux_info[DC_AUX_LOC] = read_register(SXIP_REGNUM);
- aux_info[DC_AUX_SXIP] = read_register(SXIP_REGNUM);
- aux_info[DC_AUX_SNIP] = read_register(SNIP_REGNUM);
- aux_info[DC_AUX_SFIP] = read_register(SFIP_REGNUM);
- aux_info[DC_AUX_FPSR] = read_register(FPSR_REGNUM);
- aux_info[DC_AUX_FPCR] = read_register(FPCR_REGNUM);
-
- psr_info = read_register(PSR_REGNUM);
-
- return dc_make_dcontext (tdesc_handle, reg_info, reg_flags, aux_info,
- aux_flags, loc_exact, psr_info, psr_ind, psr_flags);
+ *pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN);
+ return memaddr + BYTES_PER_88K_INSN;
}
+/* Read a register from frames called by us (or from the hardware regs). */
-dc_dcontext_t
-get_prev_context (context)
- dc_dcontext_t context;
+static int
+read_next_frame_reg(fi, regno)
+ FRAME fi;
+ int regno;
{
- return current_context = dc_previous_dcontext (context);
+ for (; fi; fi = fi->next) {
+ if (regno == SP_REGNUM) return fi->frame;
+ else if (fi->fsr->regs[regno])
+ return read_memory_integer(fi->fsr->regs[regno], 4);
+ }
+ return read_register(regno);
}
-
+/* Examine the prologue of a function. `ip' points to the first instruction.
+ `limit' is the limit of the prologue (e.g. the addr of the first
+ linenumber, or perhaps the program counter if we're stepping through).
+ `frame_sp' is the stack pointer value in use in this frame.
+ `fsr' is a pointer to a frame_saved_regs structure into which we put
+ info about the registers saved by this frame.
+ `fi' is a struct frame_info pointer; we fill in various fields in it
+ to reflect the offsets of the arg pointer and the locals pointer. */
+
+static CORE_ADDR
+examine_prologue (ip, limit, frame_sp, fsr, fi)
+ register CORE_ADDR ip;
+ register CORE_ADDR limit;
+ FRAME_ADDR frame_sp;
+ struct frame_saved_regs *fsr;
+ struct frame_info *fi;
+{
+ register CORE_ADDR next_ip;
+ register int src;
+ register struct pic_prologue_code *pcode;
+ unsigned int insn;
+ int size, offset;
+ char must_adjust[32]; /* If set, must adjust offsets in fsr */
+ int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */
+ int fp_offset = -1; /* -1 means not set */
+ CORE_ADDR frame_fp;
+
+ memset (must_adjust, '\0', sizeof (must_adjust));
+ next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
+
+ /* Accept move of incoming registers to other registers, using
+ "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
+ We don't have to worry about walking into the first lines of code,
+ since the first line number will stop us (assuming we have symbols).
+ What we have actually seen is "or r10,r0,r12". */
+
+#define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
+#define OR_MOVE_MASK 0xF800FFFF
+#define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
+#define OR_REG_MOVE1_MASK 0xFC1FFFE0
+#define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
+#define OR_REG_MOVE2_MASK 0xFC00FFFF
+ while (next_ip &&
+ ((insn & OR_MOVE_MASK) == OR_MOVE_INSN ||
+ (insn & OR_REG_MOVE1_MASK) == OR_REG_MOVE1_INSN ||
+ (insn & OR_REG_MOVE2_MASK) == OR_REG_MOVE2_INSN
+ )
+ )
+ {
+ /* We don't care what moves to where. The result of the moves
+ has already been reflected in what the compiler tells us is the
+ location of these parameters. */
+ ip = next_ip;
+ next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
+ }
+ /* Accept an optional "subu sp,sp,n" to set up the stack pointer. */
-/* Determine frame base for this file's frames. This will be either
- the CFA or the old style FP_REGNUM; the symtab for the current pc's
- file has the information */
+#define SUBU_SP_INSN 0x67ff0000
+#define SUBU_SP_MASK 0xffff0007 /* Note offset must be mult. of 8 */
+#define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
+ if (next_ip &&
+ ((insn & SUBU_SP_MASK) == SUBU_SP_INSN)) /* subu r31, r31, N */
+ {
+ sp_offset = -SUBU_OFFSET (insn);
+ ip = next_ip;
+ next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
+ }
-CORE_ADDR
-get_frame_base(pc)
-CORE_ADDR pc;
-{
- struct symtab *this_file = find_pc_symtab(pc);
- int coffsem_frame_position;
-
- /* If this_file is null, there's a good chance the file was compiled
- without -g. If that's the case, use CFA (canonical frame addr)
- as the default frame pointer. */
+ /* The function must start with a stack-pointer adjustment, or
+ we don't know WHAT'S going on... */
+ if (sp_offset == -1)
+ return ip;
+
+ /* Accept zero or more instances of "st rx,sp,n" or "st.d rx,sp,n".
+ This may cause us to mistake the copying of a register
+ parameter to the frame for the saving of a callee-saved
+ register, but that can't be helped, since with the
+ "-fcall-saved" flag, any register can be made callee-saved.
+ This probably doesn't matter, since the ``saved'' caller's values of
+ non-callee-saved registers are not relevant anyway. */
+
+#define STD_STACK_INSN 0x201f0000
+#define STD_STACK_MASK 0xfc1f0000
+#define ST_STACK_INSN 0x241f0000
+#define ST_STACK_MASK 0xfc1f0000
+#define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
+#define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
+
+ while (next_ip)
+ {
+ if ((insn & ST_STACK_MASK) == ST_STACK_INSN)
+ size = 1;
+ else if ((insn & STD_STACK_MASK) == STD_STACK_INSN)
+ size = 2;
+ else
+ break;
+
+ src = ST_SRC (insn);
+ offset = ST_OFFSET (insn);
+ while (size--)
+ {
+ must_adjust[src] = 1;
+ fsr->regs[src++] = offset; /* Will be adjusted later */
+ offset += 4;
+ }
+ ip = next_ip;
+ next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
+ }
- if (this_file)
+ /* Accept an optional "addu r30,r31,n" to set up the frame pointer. */
+
+#define ADDU_FP_INSN 0x63df0000
+#define ADDU_FP_MASK 0xffff0000
+#define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
+ if (next_ip &&
+ ((insn & ADDU_FP_MASK) == ADDU_FP_INSN)) /* addu r30, r31, N */
{
- coffsem_frame_position = this_file->coffsem & 3;
- if (coffsem_frame_position == 1)
- return (CORE_ADDR) dc_general_register (current_context, FP_REGNUM);
- else
- /* default is CFA, as well as if coffsem==2 */
- return (CORE_ADDR) dc_frame_address (current_context);
+ fp_offset = ADDU_OFFSET (insn);
+ ip = next_ip;
+ next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
}
- return (CORE_ADDR) dc_frame_address (current_context);
-}
+ /* Accept the PIC prologue code if present. */
-#if TARGET_BYTE_ORDER != HOST_BYTE_ORDER
-you lose
-#else /* Host and target byte order the same. */
-#define SINGLE_EXP_BITS 8
-#define DOUBLE_EXP_BITS 11
-int
-IEEE_isNAN(fp, len)
- int *fp, len;
- /* fp points to a single precision OR double precision
- * floating point value; len is the number of bytes, either 4 or 8.
- * Returns 1 iff fp points to a valid IEEE floating point number.
- * Returns 0 if fp points to a denormalized number or a NaN
- */
-{
- int exponent;
- if (len == 4)
+ pcode = pic_prologue_code;
+ size = sizeof (pic_prologue_code) / sizeof (*pic_prologue_code);
+ /* If return addr is saved, we don't use first or last insn of PICstuff. */
+ if (fsr->regs[SRP_REGNUM]) {
+ pcode++;
+ size-=2;
+ }
+
+ while (size-- && next_ip && (pcode->insn == (pcode->mask & insn)))
{
- exponent = *fp;
- exponent = exponent << 1 >> (32 - SINGLE_EXP_BITS - 1);
- return ((exponent == -1) || (! exponent && *fp));
+ pcode++;
+ ip = next_ip;
+ next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
}
- else if (len == 8)
+
+ /* Accept moves of parameter registers to other registers, using
+ "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
+ We don't have to worry about walking into the first lines of code,
+ since the first line number will stop us (assuming we have symbols).
+ What gcc actually seems to produce is "or rd,r0,rs". */
+
+#define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
+#define OR_MOVE_MASK 0xF800FFFF
+#define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
+#define OR_REG_MOVE1_MASK 0xFC1FFFE0
+#define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
+#define OR_REG_MOVE2_MASK 0xFC00FFFF
+ while (next_ip &&
+ ((insn & OR_MOVE_MASK) == OR_MOVE_INSN ||
+ (insn & OR_REG_MOVE1_MASK) == OR_REG_MOVE1_INSN ||
+ (insn & OR_REG_MOVE2_MASK) == OR_REG_MOVE2_INSN
+ )
+ )
{
- exponent = *(fp+1);
- exponent = exponent << 1 >> (32 - DOUBLE_EXP_BITS - 1);
- return ((exponent == -1) || (! exponent && *fp * *(fp+1)));
+ /* We don't care what moves to where. The result of the moves
+ has already been reflected in what the compiler tells us is the
+ location of these parameters. */
+ ip = next_ip;
+ next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
}
- else return 1;
+
+ /* We're done with the prologue. If we don't care about the stack
+ frame itself, just return. (Note that fsr->regs has been trashed,
+ but the one caller who calls with fi==0 passes a dummy there.) */
+
+ if (fi == 0)
+ return ip;
+
+ /*
+ OK, now we have:
+
+ sp_offset original (before any alloca calls) displacement of SP
+ (will be negative).
+
+ fp_offset displacement from original SP to the FP for this frame
+ or -1.
+
+ fsr->regs[0..31] displacement from original SP to the stack
+ location where reg[0..31] is stored.
+
+ must_adjust[0..31] set if corresponding offset was set.
+
+ If alloca has been called between the function prologue and the current
+ IP, then the current SP (frame_sp) will not be the original SP as set by
+ the function prologue. If the current SP is not the original SP, then the
+ compiler will have allocated an FP for this frame, fp_offset will be set,
+ and we can use it to calculate the original SP.
+
+ Then, we figure out where the arguments and locals are, and relocate the
+ offsets in fsr->regs to absolute addresses. */
+
+ if (fp_offset != -1) {
+ /* We have a frame pointer, so get it, and base our calc's on it. */
+ frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, ACTUAL_FP_REGNUM);
+ frame_sp = frame_fp - fp_offset;
+ } else {
+ /* We have no frame pointer, therefore frame_sp is still the same value
+ as set by prologue. But where is the frame itself? */
+ if (must_adjust[SRP_REGNUM]) {
+ /* Function header saved SRP (r1), the return address. Frame starts
+ 4 bytes down from where it was saved. */
+ frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4;
+ fi->locals_pointer = frame_fp;
+ } else {
+ /* Function header didn't save SRP (r1), so we are in a leaf fn or
+ are otherwise confused. */
+ frame_fp = -1;
+ }
+ }
+
+ /* The locals are relative to the FP (whether it exists as an allocated
+ register, or just as an assumed offset from the SP) */
+ fi->locals_pointer = frame_fp;
+
+ /* The arguments are just above the SP as it was before we adjusted it
+ on entry. */
+ fi->args_pointer = frame_sp - sp_offset;
+
+ /* Now that we know the SP value used by the prologue, we know where
+ it saved all the registers. */
+ for (src = 0; src < 32; src++)
+ if (must_adjust[src])
+ fsr->regs[src] += frame_sp;
+
+ /* The saved value of the SP is always known. */
+ /* (we hope...) */
+ if (fsr->regs[SP_REGNUM] != 0
+ && fsr->regs[SP_REGNUM] != frame_sp - sp_offset)
+ fprintf(stderr, "Bad saved SP value %x != %x, offset %x!\n",
+ fsr->regs[SP_REGNUM],
+ frame_sp - sp_offset, sp_offset);
+
+ fsr->regs[SP_REGNUM] = frame_sp - sp_offset;
+
+ return (ip);
}
-#endif /* Host and target byte order the same. */
-#define FIRST_PRESERVED_REGNUM 14
-#define LAST_PRESERVED_REGNUM 25
-#define FIRST_PARM_REGNUM 2
-#define LAST_PARM_REGNUM 9
+/* Given an ip value corresponding to the start of a function,
+ return the ip of the first instruction after the function
+ prologue. */
+
+CORE_ADDR
+skip_prologue (ip)
+ CORE_ADDR (ip);
+{
+ struct frame_saved_regs saved_regs_dummy;
+ struct symtab_and_line sal;
+ CORE_ADDR limit;
+
+ sal = find_pc_line (ip, 0);
+ limit = (sal.end) ? sal.end : 0xffffffff;
+
+ return (examine_prologue (ip, limit, (FRAME_ADDR) 0, &saved_regs_dummy,
+ (struct frame_info *)0 ));
+}
-#define MAX_REG_PARMS (LAST_PARM_REGNUM - FIRST_PARM_REGNUM + 1)
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame.
+
+ We cache the result of doing this in the frame_cache_obstack, since
+ it is fairly expensive. */
void
frame_find_saved_regs (fi, fsr)
- struct frame_info *fi;
- struct frame_saved_regs *fsr;
+ struct frame_info *fi;
+ struct frame_saved_regs *fsr;
{
- register int regnum;
-
- error ("Feature not implemented for the 88k yet.");
- return;
-
+ register struct frame_saved_regs *cache_fsr;
+ extern struct obstack frame_cache_obstack;
+ CORE_ADDR ip;
+ struct symtab_and_line sal;
+ CORE_ADDR limit;
+
+ if (!fi->fsr)
+ {
+ cache_fsr = (struct frame_saved_regs *)
+ obstack_alloc (&frame_cache_obstack,
+ sizeof (struct frame_saved_regs));
+ memset (cache_fsr, '\0', sizeof (struct frame_saved_regs));
+ fi->fsr = cache_fsr;
+
+ /* Find the start and end of the function prologue. If the PC
+ is in the function prologue, we only consider the part that
+ has executed already. */
+
+ ip = get_pc_function_start (fi->pc);
+ sal = find_pc_line (ip, 0);
+ limit = (sal.end && sal.end < fi->pc) ? sal.end: fi->pc;
+
+ /* This will fill in fields in *fi as well as in cache_fsr. */
+ examine_prologue (ip, limit, fi->frame, cache_fsr, fi);
+ }
+
+ if (fsr)
+ *fsr = *fi->fsr;
+}
+
+/* Return the address of the locals block for the frame
+ described by FI. Returns 0 if the address is unknown.
+ NOTE! Frame locals are referred to by negative offsets from the
+ argument pointer, so this is the same as frame_args_address(). */
+
+CORE_ADDR
+frame_locals_address (fi)
+ struct frame_info *fi;
+{
+ struct frame_saved_regs fsr;
+
+ if (fi->args_pointer) /* Cached value is likely there. */
+ return fi->args_pointer;
+
+ /* Nope, generate it. */
+
+ get_frame_saved_regs (fi, &fsr);
+
+ return fi->args_pointer;
+}
+
+/* Return the address of the argument block for the frame
+ described by FI. Returns 0 if the address is unknown. */
+
+CORE_ADDR
+frame_args_address (fi)
+ struct frame_info *fi;
+{
+ struct frame_saved_regs fsr;
+
+ if (fi->args_pointer) /* Cached value is likely there. */
+ return fi->args_pointer;
+
+ /* Nope, generate it. */
+
+ get_frame_saved_regs (fi, &fsr);
+
+ return fi->args_pointer;
+}
+
+/* Return the saved PC from this frame.
+
+ If the frame has a memory copy of SRP_REGNUM, use that. If not,
+ just use the register SRP_REGNUM itself. */
+
+CORE_ADDR
+frame_saved_pc (frame)
+ FRAME frame;
+{
+ return read_next_frame_reg(frame, SRP_REGNUM);
+}
+
#if 0
- for (regnum = FIRST_PARM_REGNUM; regnum <= LAST_PARM_REGNUM; regnum++)
- fsr->regs[regnum]
- = (unsigned) fi->frame - ((regnum - FIRST_PARM_REGNUM) * 4);
-
- fsr->regs[SP_REGNUM] = 0; /* SP not saved in frames */
- fsr->regs[FP_REGNUM] = fi->frame;
- fsr->regs[PC_REGNUM] = fi->frame + 4;
-#endif
- }
-
- static int
- pushed_size (prev_words, v)
- int prev_words;
- struct value *v;
- {
- switch (TYPE_CODE (VALUE_TYPE (v)))
- {
- case TYPE_CODE_VOID: /* Void type (values zero length) */
-
- return 0; /* That was easy! */
-
- case TYPE_CODE_PTR: /* Pointer type */
- case TYPE_CODE_ENUM: /* Enumeration type */
- case TYPE_CODE_INT: /* Integer type */
- case TYPE_CODE_REF: /* C++ Reference types */
- case TYPE_CODE_ARRAY: /* Array type, lower bound zero */
-
- return 1;
-
- case TYPE_CODE_FLT: /* Floating type */
-
- if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
- return 1;
- else
- /* Assume that it must be a double. */
- if (prev_words & 1) /* at an odd-word boundary */
- return 3; /* round to 8-byte boundary */
- else
- return 2;
-
- case TYPE_CODE_STRUCT: /* C struct or Pascal record */
- case TYPE_CODE_UNION: /* C union or Pascal variant part */
-
- return (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
-
- case TYPE_CODE_FUNC: /* Function type */
- case TYPE_CODE_SET: /* Pascal sets */
- case TYPE_CODE_RANGE: /* Range (integers within bounds) */
- case TYPE_CODE_PASCAL_ARRAY: /* Array with explicit type of index */
- case TYPE_CODE_MEMBER: /* Member type */
- case TYPE_CODE_METHOD: /* Method type */
- /* Don't know how to pass these yet. */
-
- case TYPE_CODE_UNDEF: /* Not used; catches errors */
- default:
- abort ();
- }
- }
-
- static void
- store_parm_word (address, val)
- CORE_ADDR address;
- int val;
- {
- write_memory (address, &val, 4);
- }
-
- static int
- store_parm (prev_words, left_parm_addr, v)
- unsigned int prev_words;
- CORE_ADDR left_parm_addr;
- struct value *v;
- {
- CORE_ADDR start = left_parm_addr + (prev_words * 4);
- int *val_addr = (int *)VALUE_CONTENTS(v);
-
- switch (TYPE_CODE (VALUE_TYPE (v)))
- {
- case TYPE_CODE_VOID: /* Void type (values zero length) */
-
- return 0;
-
- case TYPE_CODE_PTR: /* Pointer type */
- case TYPE_CODE_ENUM: /* Enumeration type */
- case TYPE_CODE_INT: /* Integer type */
- case TYPE_CODE_ARRAY: /* Array type, lower bound zero */
- case TYPE_CODE_REF: /* C++ Reference types */
-
- store_parm_word (start, *val_addr);
- return 1;
-
- case TYPE_CODE_FLT: /* Floating type */
-
- if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
- {
- store_parm_word (start, *val_addr);
- return 1;
- }
- else
- {
- store_parm_word (start + ((prev_words & 1) * 4), val_addr[0]);
- store_parm_word (start + ((prev_words & 1) * 4) + 4, val_addr[1]);
- return 2 + (prev_words & 1);
- }
-
- case TYPE_CODE_STRUCT: /* C struct or Pascal record */
- case TYPE_CODE_UNION: /* C union or Pascal variant part */
-
- {
- unsigned int words = (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
- unsigned int word;
-
- for (word = 0; word < words; word++)
- store_parm_word (start + (word * 4), val_addr[word]);
- return words;
- }
-
- default:
- abort ();
- }
- }
-
+/* I believe this is all obsolete call dummy stuff. */
+static int
+pushed_size (prev_words, v)
+ int prev_words;
+ struct value *v;
+{
+ switch (TYPE_CODE (VALUE_TYPE (v)))
+ {
+ case TYPE_CODE_VOID: /* Void type (values zero length) */
+
+ return 0; /* That was easy! */
+
+ case TYPE_CODE_PTR: /* Pointer type */
+ case TYPE_CODE_ENUM: /* Enumeration type */
+ case TYPE_CODE_INT: /* Integer type */
+ case TYPE_CODE_REF: /* C++ Reference types */
+ case TYPE_CODE_ARRAY: /* Array type, lower & upper bounds */
+
+ return 1;
+
+ case TYPE_CODE_FLT: /* Floating type */
+
+ if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
+ return 1;
+ else
+ /* Assume that it must be a double. */
+ if (prev_words & 1) /* at an odd-word boundary */
+ return 3; /* round to 8-byte boundary */
+ else
+ return 2;
+
+ case TYPE_CODE_STRUCT: /* C struct or Pascal record */
+ case TYPE_CODE_UNION: /* C union or Pascal variant part */
+
+ return (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
+
+ case TYPE_CODE_FUNC: /* Function type */
+ case TYPE_CODE_SET: /* Pascal sets */
+ case TYPE_CODE_RANGE: /* Range (integers within bounds) */
+ case TYPE_CODE_STRING: /* String type */
+ case TYPE_CODE_MEMBER: /* Member type */
+ case TYPE_CODE_METHOD: /* Method type */
+ /* Don't know how to pass these yet. */
+
+ case TYPE_CODE_UNDEF: /* Not used; catches errors */
+ default:
+ abort ();
+ }
+}
+
+static void
+store_parm_word (address, val)
+ CORE_ADDR address;
+ int val;
+{
+ write_memory (address, (char *)&val, 4);
+}
+
+static int
+store_parm (prev_words, left_parm_addr, v)
+ unsigned int prev_words;
+ CORE_ADDR left_parm_addr;
+ struct value *v;
+{
+ CORE_ADDR start = left_parm_addr + (prev_words * 4);
+ int *val_addr = (int *)VALUE_CONTENTS(v);
+
+ switch (TYPE_CODE (VALUE_TYPE (v)))
+ {
+ case TYPE_CODE_VOID: /* Void type (values zero length) */
+
+ return 0;
+
+ case TYPE_CODE_PTR: /* Pointer type */
+ case TYPE_CODE_ENUM: /* Enumeration type */
+ case TYPE_CODE_INT: /* Integer type */
+ case TYPE_CODE_ARRAY: /* Array type, lower & upper bounds */
+ case TYPE_CODE_REF: /* C++ Reference types */
+
+ store_parm_word (start, *val_addr);
+ return 1;
+
+ case TYPE_CODE_FLT: /* Floating type */
+
+ if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
+ {
+ store_parm_word (start, *val_addr);
+ return 1;
+ }
+ else
+ {
+ store_parm_word (start + ((prev_words & 1) * 4), val_addr[0]);
+ store_parm_word (start + ((prev_words & 1) * 4) + 4, val_addr[1]);
+ return 2 + (prev_words & 1);
+ }
+
+ case TYPE_CODE_STRUCT: /* C struct or Pascal record */
+ case TYPE_CODE_UNION: /* C union or Pascal variant part */
+
+ {
+ unsigned int words = (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
+ unsigned int word;
+
+ for (word = 0; word < words; word++)
+ store_parm_word (start + (word * 4), val_addr[word]);
+ return words;
+ }
+
+ default:
+ abort ();
+ }
+}
+
/* This routine sets up all of the parameter values needed to make a pseudo
call. The name "push_parameters" is a misnomer on some archs,
because (on the m88k) most parameters generally end up being passed in
end up storing *all* parameter values onto the stack (even if we will
realize later that some of these stores were unnecessary). */
+#define FIRST_PARM_REGNUM 2
+
void
push_parameters (return_type, struct_conv, nargs, args)
struct type *return_type;
int struct_conv;
int nargs;
value *args;
- {
+{
int parm_num;
unsigned int p_words = 0;
CORE_ADDR left_parm_addr;
write_register (SP_REGNUM, rv_addr); /* push space onto the stack */
write_register (SRA_REGNUM, rv_addr);/* set return value register */
+ break;
}
+ default: break;
}
/* Here we make a pre-pass on the whole parameter list to figure out exactly
}
void
-pop_frame ()
+collect_returned_value (rval, value_type, struct_return, nargs, args)
+ value *rval;
+ struct type *value_type;
+ int struct_return;
+ int nargs;
+ value *args;
{
- error ("Feature not implemented for the m88k yet.");
+ char retbuf[REGISTER_BYTES];
+
+ memcpy (retbuf, registers, REGISTER_BYTES);
+ *rval = value_being_returned (value_type, retbuf, struct_return);
return;
}
+#endif /* 0 */
- void
- collect_returned_value (rval, value_type, struct_return, nargs, args)
- value *rval;
- struct type *value_type;
- int struct_return;
- int nargs;
- value *args;
- {
- char retbuf[REGISTER_BYTES];
-
- bcopy (registers, retbuf, REGISTER_BYTES);
- *rval = value_being_returned (value_type, retbuf, struct_return);
- return;
- }
+/*start of lines added by kev*/
-#if 0
-/* Now handled in a machine independent way with CALL_DUMMY_LOCATION. */
- /* Stuff a breakpoint instruction onto the stack (or elsewhere if the stack
- is not a good place for it). Return the address at which the instruction
- got stuffed, or zero if we were unable to stuff it anywhere. */
-
- CORE_ADDR
- push_breakpoint ()
- {
- static char breakpoint_insn[] = BREAKPOINT;
- extern CORE_ADDR text_end; /* of inferior */
- static char readback_buffer[] = BREAKPOINT;
- int i;
-
- /* With a little bit of luck, we can just stash the breakpoint instruction
- in the word just beyond the end of normal text space. For systems on
- which the hardware will not allow us to execute out of the stack segment,
- we have to hope that we *are* at least allowed to effectively extend the
- text segment by one word. If the actual end of user's the text segment
- happens to fall right at a page boundary this trick may fail. Note that
- we check for this by reading after writing, and comparing in order to
- be sure that the write worked. */
-
- write_memory (text_end, &breakpoint_insn, 4);
-
- /* Fill the readback buffer with some garbage which is certain to be
- unequal to the breakpoint insn. That way we can tell if the
- following read doesn't actually succeed. */
-
- for (i = 0; i < sizeof (readback_buffer); i++)
- readback_buffer[i] = ~ readback_buffer[i]; /* Invert the bits */
-
- /* Now check that the breakpoint insn was successfully installed. */
-
- read_memory (text_end, readback_buffer, sizeof (readback_buffer));
- for (i = 0; i < sizeof (readback_buffer); i++)
- if (readback_buffer[i] != breakpoint_insn[i])
- return 0; /* Failed to install! */
-
- return text_end;
- }
-#endif
-
-/* Like dc_psr_register but takes an extra int arg. */
-static dc_word_t
-psr_register (context, dummy)
- dc_dcontext_t context;
- int dummy;
+#define DUMMY_FRAME_SIZE 192
+
+static void
+write_word (sp, word)
+ CORE_ADDR sp;
+ REGISTER_TYPE word;
{
- return dc_psr_register (context);
+ register int len = sizeof (REGISTER_TYPE);
+ char buffer[MAX_REGISTER_RAW_SIZE];
+
+ store_unsigned_integer (buffer, len, word);
+ write_memory (sp, buffer, len);
}
-/* Same functionality as get_saved_register in findvar.c, but implemented
- to use tdesc. */
void
-get_saved_register (raw_buffer, optim, addrp, frame, regnum, lvalp)
- char *raw_buffer;
- int *optim;
- CORE_ADDR *addrp;
- FRAME frame;
- int regnum;
- enum lval_type *lvalp;
+m88k_push_dummy_frame()
{
- struct frame_info *fi = get_frame_info (frame);
-
- /* Functions to say whether a register is optimized out, and
- if not, to get the value. Take as args a context and the
- value of get_reg_arg. */
- int (*get_reg_state) ();
- dc_word_t (*get_reg) ();
- int get_reg_arg;
-
- /* Because tdesc doesn't tell us whether it got it from a register
- or memory, always say we don't have an address for it. */
- if (addrp != NULL)
- *addrp = 0;
+ register CORE_ADDR sp = read_register (SP_REGNUM);
+ register int rn;
+ int offset;
+
+ sp -= DUMMY_FRAME_SIZE; /* allocate a bunch of space */
+
+ for (rn = 0, offset = 0; rn <= SP_REGNUM; rn++, offset+=4)
+ write_word (sp+offset, read_register(rn));
- if (regnum < DC_NUM_REG)
- {
- get_reg_state = dc_general_register_state;
- get_reg = dc_general_register;
- get_reg_arg = regnum;
- }
- else
- {
- get_reg_state = dc_auxiliary_register_state;
- get_reg = dc_auxiliary_register;
- switch (regnum)
- {
- case SXIP_REGNUM:
- get_reg_arg = DC_AUX_SXIP;
- break;
- case SNIP_REGNUM:
- get_reg_arg = DC_AUX_SNIP;
- break;
- case FPSR_REGNUM:
- get_reg_arg = DC_AUX_FPSR;
- break;
- case FPCR_REGNUM:
- get_reg_arg = DC_AUX_FPCR;
- break;
- case PSR_REGNUM:
- get_reg_state = dc_psr_register_bit_state;
- get_reg = psr_register;
- get_reg_arg = 0;
- break;
- default:
- if (optim != NULL)
- *optim = 1;
- return;
- }
- }
+ write_word (sp+offset, read_register (SXIP_REGNUM));
+ offset += 4;
+
+ write_word (sp+offset, read_register (SNIP_REGNUM));
+ offset += 4;
+
+ write_word (sp+offset, read_register (SFIP_REGNUM));
+ offset += 4;
+
+ write_word (sp+offset, read_register (PSR_REGNUM));
+ offset += 4;
- if ((*get_reg_state) (fi->frame_context, get_reg_arg))
+ write_word (sp+offset, read_register (FPSR_REGNUM));
+ offset += 4;
+
+ write_word (sp+offset, read_register (FPCR_REGNUM));
+ offset += 4;
+
+ write_register (SP_REGNUM, sp);
+ write_register (ACTUAL_FP_REGNUM, sp);
+}
+
+void
+pop_frame ()
+{
+ register FRAME frame = get_current_frame ();
+ register CORE_ADDR fp;
+ register int regnum;
+ struct frame_saved_regs fsr;
+ struct frame_info *fi;
+
+ fi = get_frame_info (frame);
+ fp = fi -> frame;
+ get_frame_saved_regs (fi, &fsr);
+
+ if (PC_IN_CALL_DUMMY (read_pc(), read_register(SP_REGNUM), FRAME_FP(fi)))
{
- if (raw_buffer != NULL)
- *(int *)raw_buffer = (*get_reg) (fi->frame_context, get_reg_arg);
- if (optim != NULL)
- *optim = 0;
- return;
+ /* FIXME: I think get_frame_saved_regs should be handling this so
+ that we can deal with the saved registers properly (e.g. frame
+ 1 is a call dummy, the user types "frame 2" and then "print $ps"). */
+ register CORE_ADDR sp = read_register (ACTUAL_FP_REGNUM);
+ int offset;
+
+ for (regnum = 0, offset = 0; regnum <= SP_REGNUM; regnum++, offset+=4)
+ (void) write_register (regnum, read_memory_integer (sp+offset, 4));
+
+ write_register (SXIP_REGNUM, read_memory_integer (sp+offset, 4));
+ offset += 4;
+
+ write_register (SNIP_REGNUM, read_memory_integer (sp+offset, 4));
+ offset += 4;
+
+ write_register (SFIP_REGNUM, read_memory_integer (sp+offset, 4));
+ offset += 4;
+
+ write_register (PSR_REGNUM, read_memory_integer (sp+offset, 4));
+ offset += 4;
+
+ write_register (FPSR_REGNUM, read_memory_integer (sp+offset, 4));
+ offset += 4;
+
+ write_register (FPCR_REGNUM, read_memory_integer (sp+offset, 4));
+ offset += 4;
+
}
- else
+ else
{
- if (optim != NULL)
- *optim = 1;
- return;
+ for (regnum = FP_REGNUM ; regnum > 0 ; regnum--)
+ if (fsr.regs[regnum])
+ write_register (regnum,
+ read_memory_integer (fsr.regs[regnum], 4));
+ write_pc(frame_saved_pc(frame));
}
-
- /* Well, the caller can't treat it as a register or memory... */
- if (lvalp != NULL)
- *lvalp = not_lval;
+ reinit_frame_cache ();
}