#include "regcache.h"
#include "linux-nat.h"
#include "mips-linux-tdep.h"
+#include "target-descriptions.h"
+#include "xml-support.h"
#include "gdb_proc_service.h"
#include "gregset.h"
+#include <sgidefs.h>
#include <sys/ptrace.h>
#ifndef PTRACE_GET_THREAD_AREA
void (*super_fetch_registers) (struct regcache *, int);
void (*super_store_registers) (struct regcache *, int);
-/* Pseudo registers can not be read. ptrace does not provide a way to
- read (or set) MIPS_PS_REGNUM, and there's no point in reading or
- setting MIPS_ZERO_REGNUM. We also can not set BADVADDR, CAUSE, or
- FCRIR via ptrace(). */
-
-int
-mips_linux_cannot_fetch_register (int regno)
-{
- if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
- return 0;
- else if (regno >= mips_regnum (current_gdbarch)->fp0
- && regno <= mips_regnum (current_gdbarch)->fp0 + 32)
- return 0;
- else if (regno == mips_regnum (current_gdbarch)->lo
- || regno == mips_regnum (current_gdbarch)->hi
- || regno == mips_regnum (current_gdbarch)->badvaddr
- || regno == mips_regnum (current_gdbarch)->cause
- || regno == mips_regnum (current_gdbarch)->pc
- || regno == mips_regnum (current_gdbarch)->fp_control_status
- || regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
- return 0;
- else
- return 1;
-}
-
-int
-mips_linux_cannot_store_register (int regno)
-{
- if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
- return 0;
- else if (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 32)
- return 0;
- else if (regno == mips_regnum (current_gdbarch)->lo
- || regno == mips_regnum (current_gdbarch)->hi
- || regno == mips_regnum (current_gdbarch)->pc
- || regno == mips_regnum (current_gdbarch)->fp_control_status)
- return 0;
- else
- return 1;
-}
-
/* Map gdb internal register number to ptrace ``address''.
- These ``addresses'' are normally defined in <asm/ptrace.h>. */
+ These ``addresses'' are normally defined in <asm/ptrace.h>.
+
+ ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
+ and there's no point in reading or setting MIPS_ZERO_REGNUM.
+ We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
static CORE_ADDR
-mips_linux_register_addr (int regno)
+mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
{
- int regaddr;
+ CORE_ADDR regaddr;
- if (regno < 0 || regno >= NUM_REGS)
+ if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
error (_("Bogon register number %d."), regno);
- if (regno < 32)
+ if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
regaddr = regno;
- else if ((regno >= mips_regnum (current_gdbarch)->fp0)
- && (regno < mips_regnum (current_gdbarch)->fp0 + 32))
- regaddr = FPR_BASE + (regno - mips_regnum (current_gdbarch)->fp0);
- else if (regno == mips_regnum (current_gdbarch)->pc)
+ else if ((regno >= mips_regnum (gdbarch)->fp0)
+ && (regno < mips_regnum (gdbarch)->fp0 + 32))
+ regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
+ else if (regno == mips_regnum (gdbarch)->pc)
regaddr = PC;
- else if (regno == mips_regnum (current_gdbarch)->cause)
- regaddr = CAUSE;
- else if (regno == mips_regnum (current_gdbarch)->badvaddr)
- regaddr = BADVADDR;
- else if (regno == mips_regnum (current_gdbarch)->lo)
+ else if (regno == mips_regnum (gdbarch)->cause)
+ regaddr = store? (CORE_ADDR) -1 : CAUSE;
+ else if (regno == mips_regnum (gdbarch)->badvaddr)
+ regaddr = store? (CORE_ADDR) -1 : BADVADDR;
+ else if (regno == mips_regnum (gdbarch)->lo)
regaddr = MMLO;
- else if (regno == mips_regnum (current_gdbarch)->hi)
+ else if (regno == mips_regnum (gdbarch)->hi)
regaddr = MMHI;
- else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
+ else if (regno == mips_regnum (gdbarch)->fp_control_status)
regaddr = FPC_CSR;
- else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
- regaddr = FPC_EIR;
+ else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
+ regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
+ else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
+ regaddr = 0;
else
- error (_("Unknowable register number %d."), regno);
+ regaddr = (CORE_ADDR) -1;
return regaddr;
}
static CORE_ADDR
-mips64_linux_register_addr (int regno)
+mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
{
- int regaddr;
+ CORE_ADDR regaddr;
- if (regno < 0 || regno >= NUM_REGS)
+ if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
error (_("Bogon register number %d."), regno);
- if (regno < 32)
+ if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
regaddr = regno;
- else if ((regno >= mips_regnum (current_gdbarch)->fp0)
- && (regno < mips_regnum (current_gdbarch)->fp0 + 32))
+ else if ((regno >= mips_regnum (gdbarch)->fp0)
+ && (regno < mips_regnum (gdbarch)->fp0 + 32))
regaddr = MIPS64_FPR_BASE + (regno - FP0_REGNUM);
- else if (regno == mips_regnum (current_gdbarch)->pc)
+ else if (regno == mips_regnum (gdbarch)->pc)
regaddr = MIPS64_PC;
- else if (regno == mips_regnum (current_gdbarch)->cause)
- regaddr = MIPS64_CAUSE;
- else if (regno == mips_regnum (current_gdbarch)->badvaddr)
- regaddr = MIPS64_BADVADDR;
- else if (regno == mips_regnum (current_gdbarch)->lo)
+ else if (regno == mips_regnum (gdbarch)->cause)
+ regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
+ else if (regno == mips_regnum (gdbarch)->badvaddr)
+ regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
+ else if (regno == mips_regnum (gdbarch)->lo)
regaddr = MIPS64_MMLO;
- else if (regno == mips_regnum (current_gdbarch)->hi)
+ else if (regno == mips_regnum (gdbarch)->hi)
regaddr = MIPS64_MMHI;
- else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
+ else if (regno == mips_regnum (gdbarch)->fp_control_status)
regaddr = MIPS64_FPC_CSR;
- else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
- regaddr = MIPS64_FPC_EIR;
+ else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
+ regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
+ else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
+ regaddr = 0;
else
- error (_("Unknowable register number %d."), regno);
+ regaddr = (CORE_ADDR) -1;
return regaddr;
}
REGNO. */
static CORE_ADDR
-mips_linux_register_u_offset (int regno)
+mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p)
{
- if (mips_abi_regsize (current_gdbarch) == 8)
- return mips64_linux_register_addr (regno);
+ if (mips_abi_regsize (gdbarch) == 8)
+ return mips64_linux_register_addr (gdbarch, regno, store_p);
else
- return mips_linux_register_addr (regno);
+ return mips_linux_register_addr (gdbarch, regno, store_p);
+}
+
+static LONGEST (*super_xfer_partial) (struct target_ops *, enum target_object,
+ const char *, gdb_byte *, const gdb_byte *,
+ ULONGEST, LONGEST);
+
+static LONGEST
+mips_linux_xfer_partial (struct target_ops *ops,
+ enum target_object object,
+ const char *annex,
+ gdb_byte *readbuf, const gdb_byte *writebuf,
+ ULONGEST offset, LONGEST len)
+{
+ if (object == TARGET_OBJECT_AVAILABLE_FEATURES)
+ {
+ if (annex != NULL && strcmp (annex, "target.xml") == 0)
+ {
+ /* Report that target registers are a size we know for sure
+ that we can get from ptrace. */
+ if (_MIPS_SIM == _ABIO32)
+ annex = "mips-linux.xml";
+ else
+ annex = "mips64-linux.xml";
+ }
+
+ return xml_builtin_xfer_partial (annex, readbuf, writebuf, offset, len);
+ }
+
+ return super_xfer_partial (ops, object, annex, readbuf, writebuf,
+ offset, len);
}
void _initialize_mips_linux_nat (void);
t->to_fetch_registers = mips64_linux_fetch_registers;
t->to_store_registers = mips64_linux_store_registers;
+ /* Override the default to_xfer_partial. */
+ super_xfer_partial = t->to_xfer_partial;
+ t->to_xfer_partial = mips_linux_xfer_partial;
+
linux_nat_add_target (t);
}