/* Target-dependent code for GNU/Linux on MIPS processors.
- Copyright 2001, 2002, 2004 Free Software Foundation, Inc.
+ Copyright (C) 2001, 2002, 2004, 2005, 2006
+ Free Software Foundation, Inc.
This file is part of GDB.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ Boston, MA 02110-1301, USA. */
#include "defs.h"
#include "gdbcore.h"
int regaddr;
if (regno < 0 || regno >= NUM_REGS)
- error ("Bogon register number %d.", regno);
+ error (_("Bogon register number %d."), regno);
if (regno < 32)
regaddr = regno;
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
regaddr = FPC_EIR;
else
- error ("Unknowable register number %d.", regno);
+ error (_("Unknowable register number %d."), regno);
return regaddr;
}
-
-/* Fetch (and possibly build) an appropriate link_map_offsets
- structure for native GNU/Linux MIPS targets using the struct
- offsets defined in link.h (but without actual reference to that
- file).
-
- This makes it possible to access GNU/Linux MIPS shared libraries
- from a GDB that was built on a different host platform (for cross
- debugging). */
-
-static struct link_map_offsets *
-mips_linux_svr4_fetch_link_map_offsets (void)
-{
- static struct link_map_offsets lmo;
- static struct link_map_offsets *lmp = NULL;
-
- if (lmp == NULL)
- {
- lmp = &lmo;
-
- lmo.r_debug_size = 8; /* The actual size is 20 bytes, but
- this is all we need. */
- lmo.r_map_offset = 4;
- lmo.r_map_size = 4;
-
- lmo.link_map_size = 20;
-
- lmo.l_addr_offset = 0;
- lmo.l_addr_size = 4;
-
- lmo.l_name_offset = 4;
- lmo.l_name_size = 4;
-
- lmo.l_next_offset = 12;
- lmo.l_next_size = 4;
-
- lmo.l_prev_offset = 16;
- lmo.l_prev_size = 4;
- }
-
- return lmp;
-}
-
/* Support for 64-bit ABIs. */
/* Copied from <asm/elf.h>. */
int regaddr;
if (regno < 0 || regno >= NUM_REGS)
- error ("Bogon register number %d.", regno);
+ error (_("Bogon register number %d."), regno);
if (regno < 32)
regaddr = regno;
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
regaddr = MIPS64_FPC_EIR;
else
- error ("Unknowable register number %d.", regno);
+ error (_("Unknowable register number %d."), regno);
return regaddr;
}
}
else
{
- warning ("wrong size gregset struct in core file");
+ warning (_("wrong size gregset struct in core file"));
}
}
else if (which == 2)
}
else
{
- warning ("wrong size fpregset struct in core file");
+ warning (_("wrong size fpregset struct in core file"));
}
}
}
NULL /* next */
};
-/* Fetch (and possibly build) an appropriate link_map_offsets
- structure for native GNU/Linux MIPS targets using the struct
- offsets defined in link.h (but without actual reference to that
- file).
-
- This makes it possible to access GNU/Linux MIPS shared libraries
- from a GDB that was built on a different host platform (for cross
- debugging). */
-
-static struct link_map_offsets *
-mips64_linux_svr4_fetch_link_map_offsets (void)
-{
- static struct link_map_offsets lmo;
- static struct link_map_offsets *lmp = NULL;
-
- if (lmp == NULL)
- {
- lmp = &lmo;
-
- lmo.r_debug_size = 16; /* The actual size is 40 bytes, but
- this is all we need. */
- lmo.r_map_offset = 8;
- lmo.r_map_size = 8;
-
- lmo.link_map_size = 40;
-
- lmo.l_addr_offset = 0;
- lmo.l_addr_size = 8;
-
- lmo.l_name_offset = 8;
- lmo.l_name_size = 8;
-
- lmo.l_next_offset = 24;
- lmo.l_next_size = 8;
-
- lmo.l_prev_offset = 32;
- lmo.l_prev_size = 8;
- }
-
- return lmp;
-}
-
/* Handle for obtaining pointer to the current register_addr()
function for a given architecture. */
static struct gdbarch_data *register_addr_data;
int ireg, reg_position;
CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
const struct mips_regnum *regs = mips_regnum (current_gdbarch);
+ CORE_ADDR regs_base;
if (self == &mips_linux_o32_sigframe)
sigcontext_base += SIGFRAME_SIGCONTEXT_OFFSET;
/* I'm not proud of this hack. Eventually we will have the
infrastructure to indicate the size of saved registers on a
per-frame basis, but right now we don't; the kernel saves eight
- bytes but we only want four. */
+ bytes but we only want four. Use regs_base to access any
+ 64-bit fields. */
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
- sigcontext_base += 4;
+ regs_base = sigcontext_base + 4;
+ else
+ regs_base = sigcontext_base;
#if 0
trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
- sigcontext_base + SIGCONTEXT_REGS);
+ regs_base + SIGCONTEXT_REGS);
#endif
for (ireg = 1; ireg < 32; ireg++)
trad_frame_set_reg_addr (this_cache,
ireg + MIPS_ZERO_REGNUM + NUM_REGS,
- sigcontext_base + SIGCONTEXT_REGS
+ regs_base + SIGCONTEXT_REGS
+ ireg * SIGCONTEXT_REG_SIZE);
+ /* The way that floating point registers are saved, unfortunately,
+ depends on the architecture the kernel is built for. For the r3000 and
+ tx39, four bytes of each register are at the beginning of each of the
+ 32 eight byte slots. For everything else, the registers are saved
+ using double precision; only the even-numbered slots are initialized,
+ and the high bits are the odd-numbered register. Assume the latter
+ layout, since we can't tell, and it's much more common. Which bits are
+ the "high" bits depends on endianness. */
for (ireg = 0; ireg < 32; ireg++)
- trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
- sigcontext_base + SIGCONTEXT_FPREGS
- + ireg * SIGCONTEXT_REG_SIZE);
+ if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (ireg & 1))
+ trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
+ sigcontext_base + SIGCONTEXT_FPREGS + 4
+ + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
+ else
+ trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
+ sigcontext_base + SIGCONTEXT_FPREGS
+ + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
- sigcontext_base + SIGCONTEXT_PC);
+ regs_base + SIGCONTEXT_PC);
trad_frame_set_reg_addr (this_cache,
regs->fp_control_status + NUM_REGS,
sigcontext_base + SIGCONTEXT_FPCSR);
trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
- sigcontext_base + SIGCONTEXT_HI);
+ regs_base + SIGCONTEXT_HI);
trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
- sigcontext_base + SIGCONTEXT_LO);
+ regs_base + SIGCONTEXT_LO);
trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
sigcontext_base + SIGCONTEXT_CAUSE);
trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
set_gdbarch_get_longjmp_target (gdbarch,
mips_linux_get_longjmp_target);
set_solib_svr4_fetch_link_map_offsets
- (gdbarch, mips_linux_svr4_fetch_link_map_offsets);
+ (gdbarch, svr4_ilp32_fetch_link_map_offsets);
set_mips_linux_register_addr (gdbarch, mips_linux_register_addr);
tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
set_gdbarch_get_longjmp_target (gdbarch,
mips_linux_get_longjmp_target);
set_solib_svr4_fetch_link_map_offsets
- (gdbarch, mips_linux_svr4_fetch_link_map_offsets);
+ (gdbarch, svr4_ilp32_fetch_link_map_offsets);
set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr);
tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
break;
set_gdbarch_get_longjmp_target (gdbarch,
mips64_linux_get_longjmp_target);
set_solib_svr4_fetch_link_map_offsets
- (gdbarch, mips64_linux_svr4_fetch_link_map_offsets);
+ (gdbarch, svr4_lp64_fetch_link_map_offsets);
set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr);
tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
break;
default:
- internal_error (__FILE__, __LINE__, "can't handle ABI");
+ internal_error (__FILE__, __LINE__, _("can't handle ABI"));
break;
}
set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
+
+ /* Enable TLS support. */
+ set_gdbarch_fetch_tls_load_module_address (gdbarch,
+ svr4_fetch_objfile_link_map);
}
void