/* Target-dependent code for GNU/Linux on MIPS processors.
- Copyright (C) 2001-2015 Free Software Foundation, Inc.
+ Copyright (C) 2001-2017 Free Software Foundation, Inc.
This file is part of GDB.
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[MAX_REGISTER_SIZE];
store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
- extract_signed_integer (addr, 4, byte_order));
+ extract_signed_integer ((const gdb_byte *) addr, 4,
+ byte_order));
regcache_raw_supply (regcache, regnum, buf);
}
{
int regi;
const mips_elf_greg_t *regp = *gregsetp;
- char zerobuf[MAX_REGISTER_SIZE];
struct gdbarch *gdbarch = get_regcache_arch (regcache);
- memset (zerobuf, 0, MAX_REGISTER_SIZE);
-
for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
regp + EF_CP0_CAUSE);
/* Fill the inaccessible zero register with zero. */
- regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
+ regcache->raw_supply_zeroed (MIPS_ZERO_REGNUM);
}
static void
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
int regi;
- char zerobuf[MAX_REGISTER_SIZE];
-
- memset (zerobuf, 0, MAX_REGISTER_SIZE);
for (regi = 0; regi < 32; regi++)
regcache_raw_supply (regcache,
*fpregsetp + 32);
/* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
- regcache_raw_supply (regcache,
- mips_regnum (gdbarch)->fp_implementation_revision,
- zerobuf);
+ regcache->raw_supply_zeroed
+ (mips_regnum (gdbarch)->fp_implementation_revision);
}
static void
CORE_ADDR jb_addr;
struct gdbarch *gdbarch = get_frame_arch (frame);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- void *buf = alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
+ gdb_byte *buf
+ = (gdb_byte *) alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
{
int regi;
const mips64_elf_greg_t *regp = *gregsetp;
- gdb_byte zerobuf[MAX_REGISTER_SIZE];
struct gdbarch *gdbarch = get_regcache_arch (regcache);
- memset (zerobuf, 0, MAX_REGISTER_SIZE);
-
for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
(const gdb_byte *) (regp + regi));
(const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
/* Fill the inaccessible zero register with zero. */
- regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
+ regcache->raw_supply_zeroed (MIPS_ZERO_REGNUM);
}
static void
val = extract_signed_integer (buf, register_size (gdbarch, regno),
byte_order);
dst = regp + regaddr;
- store_signed_integer (dst, 8, byte_order, val);
+ store_signed_integer ((gdb_byte *) dst, 8, byte_order, val);
}
}
insn = extract_unsigned_integer (p + 4, 4, byte_order);
if (n64)
{
- /* daddu t7,ra */
- if (insn != 0x03e0782d)
+ /* 'daddu t7,ra' or 'or t7, ra, zero'*/
+ if (insn != 0x03e0782d || insn != 0x03e07825)
return 0;
+
}
else
{
- /* addu t7,ra */
- if (insn != 0x03e07821)
+ /* 'addu t7,ra' or 'or t7, ra, zero'*/
+ if (insn != 0x03e07821 || insn != 0x03e07825)
return 0;
+
}
insn = extract_unsigned_integer (p + 8, 4, byte_order);