/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
- 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+ 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
#include "arch-utils.h"
#include "regcache.h"
#include "osabi.h"
+#include "mips-tdep.h"
#include "opcode/mips.h"
#include "elf/mips.h"
MIPS_FPU_DOUBLE_REGSIZE = 8
};
-/* All the possible MIPS ABIs. */
-
-enum mips_abi
- {
- MIPS_ABI_UNKNOWN = 0,
- MIPS_ABI_N32,
- MIPS_ABI_O32,
- MIPS_ABI_N64,
- MIPS_ABI_O64,
- MIPS_ABI_EABI32,
- MIPS_ABI_EABI64,
- MIPS_ABI_LAST
- };
static const char *mips_abi_string;
int mips_default_stack_argsize;
int gdb_target_is_mips64;
int default_mask_address_p;
-
- enum gdb_osabi osabi;
};
#define MIPS_EABI (gdbarch_tdep (current_gdbarch)->mips_abi == MIPS_ABI_EABI32 \
#define MIPS_SAVED_REGSIZE (mips_saved_regsize())
+/* Return the MIPS ABI associated with GDBARCH. */
+enum mips_abi
+mips_abi (struct gdbarch *gdbarch)
+{
+ return gdbarch_tdep (gdbarch)->mips_abi;
+}
+
static unsigned int
mips_saved_regsize (void)
{
return 4;
}
+/* Functions for setting and testing a bit in a minimal symbol that
+ marks it as 16-bit function. The MSB of the minimal symbol's
+ "info" field is used for this purpose. This field is already
+ being used to store the symbol size, so the assumption is
+ that the symbol size cannot exceed 2^31.
+
+ ELF_MAKE_MSYMBOL_SPECIAL tests whether an ELF symbol is "special",
+ i.e. refers to a 16-bit function, and sets a "special" bit in a
+ minimal symbol to mark it as a 16-bit function
+
+ MSYMBOL_IS_SPECIAL tests the "special" bit in a minimal symbol
+ MSYMBOL_SIZE returns the size of the minimal symbol, i.e.
+ the "info" field with the "special" bit masked out */
+
+static void
+mips_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
+{
+ if (((elf_symbol_type *)(sym))->internal_elf_sym.st_other == STO_MIPS16)
+ {
+ MSYMBOL_INFO (msym) = (char *)
+ (((long) MSYMBOL_INFO (msym)) | 0x80000000);
+ SYMBOL_VALUE_ADDRESS (msym) |= 1;
+ }
+}
+
+static int
+msymbol_is_special (struct minimal_symbol *msym)
+{
+ return (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0);
+}
+
+static long
+msymbol_size (struct minimal_symbol *msym)
+{
+ return ((long) MSYMBOL_INFO (msym) & 0x7fffffff);
+}
+
/* XFER a value from the big/little/left end of the register.
Depending on the size of the value it might occupy the entire
register or just part of it. Make an allowance for this, aligning
static void mips_print_register (int, int);
-static mips_extra_func_info_t
-heuristic_proc_desc (CORE_ADDR, CORE_ADDR, struct frame_info *, int);
+static mips_extra_func_info_t heuristic_proc_desc (CORE_ADDR, CORE_ADDR,
+ struct frame_info *, int);
static CORE_ADDR heuristic_proc_start (CORE_ADDR);
static CORE_ADDR read_next_frame_reg (struct frame_info *, int);
-int mips_set_processor_type (char *);
+static int mips_set_processor_type (char *);
static void mips_show_processor_type_command (char *, int);
static void reinit_frame_cache_sfunc (char *, int, struct cmd_list_element *);
-static mips_extra_func_info_t
-find_proc_desc (CORE_ADDR pc, struct frame_info *next_frame, int cur_frame);
+static mips_extra_func_info_t find_proc_desc (CORE_ADDR pc,
+ struct frame_info *next_frame,
+ int cur_frame);
static CORE_ADDR after_prologue (CORE_ADDR pc,
mips_extra_func_info_t proc_desc);
char *mips_generic_reg_names[] = MIPS_REGISTER_NAMES;
char **mips_processor_reg_names = mips_generic_reg_names;
-const char *
+static const char *
mips_register_name (int i)
{
return mips_processor_reg_names[i];
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
- "fsr", "fir", "fp", "",
+ "fsr", "fir", "",/*"fp"*/ "",
"", "", "bus", "ccfg", "", "", "", "",
"", "", "port", "cmp", "", "", "epc", "prid",
};
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
- "fsr", "fir", "fp", "",
+ "fsr", "fir", ""/*"fp"*/, "",
"inx", "rand", "elo", "", "ctxt", "", "", "",
"", "", "ehi", "", "", "", "epc", "prid",
};
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
- "fsr", "fir", "fp", "",
+ "fsr", "fir", ""/*"fp"*/, "",
"inx", "rand", "elo", "cfg", "ctxt", "", "", "",
"", "", "ehi", "", "", "", "epc", "prid",
};
mips_print_extra_frame_info (struct frame_info *fi)
{
if (fi
- && fi->extra_info
- && fi->extra_info->proc_desc
- && fi->extra_info->proc_desc->pdr.framereg < NUM_REGS)
+ && get_frame_extra_info (fi)
+ && get_frame_extra_info (fi)->proc_desc
+ && get_frame_extra_info (fi)->proc_desc->pdr.framereg < NUM_REGS)
printf_filtered (" frame pointer is at %s+%s\n",
- REGISTER_NAME (fi->extra_info->proc_desc->pdr.framereg),
- paddr_d (fi->extra_info->proc_desc->pdr.frameoffset));
+ REGISTER_NAME (get_frame_extra_info (fi)->proc_desc->pdr.framereg),
+ paddr_d (get_frame_extra_info (fi)->proc_desc->pdr.frameoffset));
}
/* Number of bytes of storage in the actual machine representation for
MIPS16 or normal MIPS. */
sym = lookup_minimal_symbol_by_pc (memaddr);
if (sym)
- return MSYMBOL_IS_SPECIAL (sym);
+ return msymbol_is_special (sym);
else
return 0;
}
-/* ELF_MAKE_MSYMBOL_SPECIAL tests whether an ELF symbol is "special",
- i.e. refers to a 16-bit function, and sets a "special" bit in a
- minimal symbol to mark it as a 16-bit function. */
-
-static void
-mips_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
-{
- if (((elf_symbol_type *)(sym))->internal_elf_sym.st_other == STO_MIPS16)
- {
- MSYMBOL_INFO (msym) = (char *)
- (((long) MSYMBOL_INFO (msym)) | 0x80000000);
- SYMBOL_VALUE_ADDRESS (msym) |= 1;
- }
-}
-
-/* MSYMBOL_IS_SPECIAL tests the "special" bit in a minimal symbol. */
-
-int
-mips_msymbol_is_special (struct minimal_symbol *msym)
-{
- return (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0);
-}
-
-/* MSYMBOL_SIZE returns the size of the minimal symbol, i.e. the
- "info" field with the "special" bit masked out. */
-
-long
-mips_msymbol_size (struct minimal_symbol *msym)
-{
- return ((long) MSYMBOL_INFO (msym) & 0x7fffffff);
-}
-
/* MIPS believes that the PC has a sign extended value. Perhaphs the
all registers should be sign extended for simplicity? */
/* Determine whate to set a single step breakpoint while considering
branch prediction */
-CORE_ADDR
+static CORE_ADDR
mips32_next_pc (CORE_ADDR pc)
{
unsigned long inst;
return pc;
}
-CORE_ADDR
+static CORE_ADDR
mips16_next_pc (CORE_ADDR pc)
{
unsigned int insn = fetch_mips_16 (pc);
/* FIXME! Is this correct?? */
#define SIGFRAME_REG_SIZE MIPS_REGSIZE
#endif
- if (fci->signal_handler_caller)
+ if ((get_frame_type (fci) == SIGTRAMP_FRAME))
{
for (ireg = 0; ireg < MIPS_NUMREGS; ireg++)
{
- reg_position = fci->frame + SIGFRAME_REGSAVE_OFF
+ reg_position = get_frame_base (fci) + SIGFRAME_REGSAVE_OFF
+ ireg * SIGFRAME_REG_SIZE;
- fci->saved_regs[ireg] = reg_position;
+ get_frame_saved_regs (fci)[ireg] = reg_position;
}
for (ireg = 0; ireg < MIPS_NUMREGS; ireg++)
{
- reg_position = fci->frame + SIGFRAME_FPREGSAVE_OFF
+ reg_position = get_frame_base (fci) + SIGFRAME_FPREGSAVE_OFF
+ ireg * SIGFRAME_REG_SIZE;
- fci->saved_regs[FP0_REGNUM + ireg] = reg_position;
+ get_frame_saved_regs (fci)[FP0_REGNUM + ireg] = reg_position;
}
- fci->saved_regs[PC_REGNUM] = fci->frame + SIGFRAME_PC_OFF;
+ get_frame_saved_regs (fci)[PC_REGNUM] = get_frame_base (fci) + SIGFRAME_PC_OFF;
return;
}
- proc_desc = fci->extra_info->proc_desc;
+ proc_desc = get_frame_extra_info (fci)->proc_desc;
if (proc_desc == NULL)
/* I'm not sure how/whether this can happen. Normally when we can't
find a proc_desc, we "synthesize" one using heuristic_proc_desc
a signal, we assume that all registers have been saved.
This assumes that all register saves in a function happen before
the first function call. */
- (fci->next == NULL || fci->next->signal_handler_caller)
+ (get_next_frame (fci) == NULL
+ || (get_frame_type (get_next_frame (fci)) == SIGTRAMP_FRAME))
/* In a dummy frame we know exactly where things are saved. */
&& !PROC_DESC_IS_DUMMY (proc_desc)
/* Don't bother unless we are inside a function prologue. Outside the
prologue, we know where everything is. */
- && in_prologue (fci->pc, PROC_LOW_ADDR (proc_desc))
+ && in_prologue (get_frame_pc (fci), PROC_LOW_ADDR (proc_desc))
/* Not sure exactly what kernel_trap means, but if it means
the kernel saves the registers without a prologue doing it,
/* Scan through this function's instructions preceding the current
PC, and look for those that save registers. */
- while (addr < fci->pc)
+ while (addr < get_frame_pc (fci))
{
inst = mips_fetch_instruction (addr);
if (pc_is_mips16 (addr))
/* Fill in the offsets for the registers which gen_mask says
were saved. */
- reg_position = fci->frame + PROC_REG_OFFSET (proc_desc);
+ reg_position = get_frame_base (fci) + PROC_REG_OFFSET (proc_desc);
for (ireg = MIPS_NUMREGS - 1; gen_mask; --ireg, gen_mask <<= 1)
if (gen_mask & 0x80000000)
{
- fci->saved_regs[ireg] = reg_position;
+ get_frame_saved_regs (fci)[ireg] = reg_position;
reg_position -= MIPS_SAVED_REGSIZE;
}
int sreg_count = (inst >> 6) & 3;
/* Check if the ra register was pushed on the stack. */
- reg_position = fci->frame + PROC_REG_OFFSET (proc_desc);
+ reg_position = get_frame_base (fci) + PROC_REG_OFFSET (proc_desc);
if (inst & 0x20)
reg_position -= MIPS_SAVED_REGSIZE;
/* Check if the s0 and s1 registers were pushed on the stack. */
for (reg = 16; reg < sreg_count + 16; reg++)
{
- fci->saved_regs[reg] = reg_position;
+ get_frame_saved_regs (fci)[reg] = reg_position;
reg_position -= MIPS_SAVED_REGSIZE;
}
}
/* Fill in the offsets for the registers which float_mask says
were saved. */
- reg_position = fci->frame + PROC_FREG_OFFSET (proc_desc);
+ reg_position = get_frame_base (fci) + PROC_FREG_OFFSET (proc_desc);
/* Apparently, the freg_offset gives the offset to the first 64 bit
saved.
for (ireg = MIPS_NUMREGS - 1; float_mask; --ireg, float_mask <<= 1)
if (float_mask & 0x80000000)
{
- fci->saved_regs[FP0_REGNUM + ireg] = reg_position;
+ get_frame_saved_regs (fci)[FP0_REGNUM + ireg] = reg_position;
reg_position -= MIPS_SAVED_REGSIZE;
}
- fci->saved_regs[PC_REGNUM] = fci->saved_regs[RA_REGNUM];
+ get_frame_saved_regs (fci)[PC_REGNUM] = get_frame_saved_regs (fci)[RA_REGNUM];
}
/* Set up the 'saved_regs' array. This is a data structure containing
static void
mips_frame_init_saved_regs (struct frame_info *frame)
{
- if (frame->saved_regs == NULL)
+ if (get_frame_saved_regs (frame) == NULL)
{
mips_find_saved_regs (frame);
}
- frame->saved_regs[SP_REGNUM] = frame->frame;
+ get_frame_saved_regs (frame)[SP_REGNUM] = get_frame_base (frame);
}
static CORE_ADDR
read_next_frame_reg (struct frame_info *fi, int regno)
{
- for (; fi; fi = fi->next)
+ int optimized;
+ CORE_ADDR addr;
+ int realnum;
+ enum lval_type lval;
+ void *raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
+ frame_register_unwind (fi, regno, &optimized, &lval, &addr, &realnum,
+ raw_buffer);
+ /* FIXME: cagney/2002-09-13: This is just soooo bad. The MIPS
+ should have a pseudo register range that correspons to the ABI's,
+ rather than the ISA's, view of registers. These registers would
+ then implicitly describe their size and hence could be used
+ without the below munging. */
+ if (lval == lval_memory)
{
- /* We have to get the saved sp from the sigcontext
- if it is a signal handler frame. */
- if (regno == SP_REGNUM && !fi->signal_handler_caller)
- return fi->frame;
- else
+ if (regno < 32)
{
- if (fi->saved_regs == NULL)
- FRAME_INIT_SAVED_REGS (fi);
- if (fi->saved_regs[regno])
- return read_memory_integer (ADDR_BITS_REMOVE (fi->saved_regs[regno]), MIPS_SAVED_REGSIZE);
+ /* Only MIPS_SAVED_REGSIZE bytes of GP registers are
+ saved. */
+ return read_memory_integer (addr, MIPS_SAVED_REGSIZE);
}
}
- return read_signed_register (regno);
+
+ return extract_signed_integer (raw_buffer, REGISTER_VIRTUAL_SIZE (regno));
}
/* mips_addr_bits_remove - remove useless address bits */
target_remove_breakpoint (next_pc, break_mem);
}
-static void
+static CORE_ADDR
mips_init_frame_pc_first (int fromleaf, struct frame_info *prev)
{
CORE_ADDR pc, tmp;
- pc = ((fromleaf) ? SAVED_PC_AFTER_CALL (prev->next) :
- prev->next ? FRAME_SAVED_PC (prev->next) : read_pc ());
- tmp = mips_skip_stub (pc);
- prev->pc = tmp ? tmp : pc;
+ pc = ((fromleaf)
+ ? SAVED_PC_AFTER_CALL (get_next_frame (prev))
+ : get_next_frame (prev)
+ ? FRAME_SAVED_PC (get_next_frame (prev))
+ : read_pc ());
+ tmp = SKIP_TRAMPOLINE_CODE (pc);
+ return tmp ? tmp : pc;
}
mips_frame_saved_pc (struct frame_info *frame)
{
CORE_ADDR saved_pc;
- mips_extra_func_info_t proc_desc = frame->extra_info->proc_desc;
+ mips_extra_func_info_t proc_desc = get_frame_extra_info (frame)->proc_desc;
/* We have to get the saved pc from the sigcontext
if it is a signal handler frame. */
- int pcreg = frame->signal_handler_caller ? PC_REGNUM
+ int pcreg = (get_frame_type (frame) == SIGTRAMP_FRAME) ? PC_REGNUM
: (proc_desc ? PROC_PC_REG (proc_desc) : RA_REGNUM);
- if (proc_desc && PROC_DESC_IS_DUMMY (proc_desc))
- saved_pc = read_memory_integer (frame->frame - MIPS_SAVED_REGSIZE, MIPS_SAVED_REGSIZE);
+ if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), 0, 0))
+ {
+ LONGEST tmp;
+ frame_unwind_signed_register (frame, PC_REGNUM, &tmp);
+ saved_pc = tmp;
+ }
+ else if (proc_desc && PROC_DESC_IS_DUMMY (proc_desc))
+ saved_pc = read_memory_integer (get_frame_base (frame) - MIPS_SAVED_REGSIZE, MIPS_SAVED_REGSIZE);
else
saved_pc = read_next_frame_reg (frame, pcreg);
}
static struct mips_extra_func_info temp_proc_desc;
-static CORE_ADDR temp_saved_regs[NUM_REGS];
+
+/* This hack will go away once the get_prev_frame() code has been
+ modified to set the frame's type first. That is BEFORE init extra
+ frame info et.al. is called. This is because it will become
+ possible to skip the init extra info call for sigtramp and dummy
+ frames. */
+static CORE_ADDR *temp_saved_regs;
/* Set a register's saved stack address in temp_saved_regs. If an address
has already been set for this register, do nothing; this way we will
CORE_ADDR cur_pc;
CORE_ADDR frame_addr = 0; /* Value of $r30. Used by gcc for frame-pointer */
restart:
+ temp_saved_regs = xrealloc (temp_saved_regs, SIZEOF_FRAME_SAVED_REGS);
memset (temp_saved_regs, '\0', SIZEOF_FRAME_SAVED_REGS);
PROC_FRAME_OFFSET (&temp_proc_desc) = 0;
PROC_FRAME_ADJUST (&temp_proc_desc) = 0; /* offset of FP from SP */
if (start_pc == 0)
return NULL;
memset (&temp_proc_desc, '\0', sizeof (temp_proc_desc));
- memset (&temp_saved_regs, '\0', SIZEOF_FRAME_SAVED_REGS);
+ temp_saved_regs = xrealloc (temp_saved_regs, SIZEOF_FRAME_SAVED_REGS);
+ memset (temp_saved_regs, '\0', SIZEOF_FRAME_SAVED_REGS);
PROC_LOW_ADDR (&temp_proc_desc) = start_pc;
PROC_FRAME_REG (&temp_proc_desc) = SP_REGNUM;
PROC_PC_REG (&temp_proc_desc) = RA_REGNUM;
struct obj_section *sec;
struct mips_objfile_private *priv;
- if (PC_IN_CALL_DUMMY (pc, 0, 0))
+ if (DEPRECATED_PC_IN_CALL_DUMMY (pc, 0, 0))
return NULL;
find_pc_partial_function (pc, NULL, &startaddr, NULL);
find_proc_desc (CORE_ADDR pc, struct frame_info *next_frame, int cur_frame)
{
mips_extra_func_info_t proc_desc;
- CORE_ADDR startaddr;
+ CORE_ADDR startaddr = 0;
proc_desc = non_heuristic_proc_desc (pc, &startaddr);
PROC_FRAME_ADJUST (proc_desc));
}
-mips_extra_func_info_t cached_proc_desc;
+static mips_extra_func_info_t cached_proc_desc;
static CORE_ADDR
mips_frame_chain (struct frame_info *frame)
/* Check if the PC is inside a call stub. If it is, fetch the
PC of the caller of that stub. */
- if ((tmp = mips_skip_stub (saved_pc)) != 0)
+ if ((tmp = SKIP_TRAMPOLINE_CODE (saved_pc)) != 0)
saved_pc = tmp;
+ if (DEPRECATED_PC_IN_CALL_DUMMY (saved_pc, 0, 0))
+ {
+ /* A dummy frame, uses SP not FP. Get the old SP value. If all
+ is well, frame->frame the bottom of the current frame will
+ contain that value. */
+ return get_frame_base (frame);
+ }
+
/* Look up the procedure descriptor for this PC. */
proc_desc = find_proc_desc (saved_pc, frame, 1);
if (!proc_desc)
&& PROC_FRAME_OFFSET (proc_desc) == 0
/* The previous frame from a sigtramp frame might be frameless
and have frame size zero. */
- && !frame->signal_handler_caller
- /* Check if this is a call dummy frame. */
- && frame->pc != CALL_DUMMY_ADDRESS ())
+ && !(get_frame_type (frame) == SIGTRAMP_FRAME)
+ /* For a generic dummy frame, let get_frame_pointer() unwind a
+ register value saved as part of the dummy frame call. */
+ && !(DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), 0, 0)))
return 0;
else
return get_frame_pointer (frame, proc_desc);
mips_init_extra_frame_info (int fromleaf, struct frame_info *fci)
{
int regnum;
+ mips_extra_func_info_t proc_desc;
+
+ if (get_frame_type (fci) == DUMMY_FRAME)
+ return;
/* Use proc_desc calculated in frame_chain */
- mips_extra_func_info_t proc_desc =
- fci->next ? cached_proc_desc : find_proc_desc (fci->pc, fci->next, 1);
+ proc_desc =
+ get_next_frame (fci)
+ ? cached_proc_desc
+ : find_proc_desc (get_frame_pc (fci), get_next_frame (fci), 1);
- fci->extra_info = (struct frame_extra_info *)
- frame_obstack_alloc (sizeof (struct frame_extra_info));
+ frame_extra_info_zalloc (fci, sizeof (struct frame_extra_info));
- fci->saved_regs = NULL;
- fci->extra_info->proc_desc =
+ deprecated_set_frame_saved_regs_hack (fci, NULL);
+ get_frame_extra_info (fci)->proc_desc =
proc_desc == &temp_proc_desc ? 0 : proc_desc;
if (proc_desc)
{
/* This may not be quite right, if proc has a real frame register.
Get the value of the frame relative sp, procedure might have been
interrupted by a signal at it's very start. */
- if (fci->pc == PROC_LOW_ADDR (proc_desc)
+ if (get_frame_pc (fci) == PROC_LOW_ADDR (proc_desc)
&& !PROC_DESC_IS_DUMMY (proc_desc))
- fci->frame = read_next_frame_reg (fci->next, SP_REGNUM);
+ deprecated_update_frame_base_hack (fci, read_next_frame_reg (get_next_frame (fci), SP_REGNUM));
+ else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fci), 0, 0))
+ /* Do not ``fix'' fci->frame. It will have the value of the
+ generic dummy frame's top-of-stack (since the draft
+ fci->frame is obtained by returning the unwound stack
+ pointer) and that is what we want. That way the fci->frame
+ value will match the top-of-stack value that was saved as
+ part of the dummy frames data. */
+ /* Do nothing. */;
else
- fci->frame = get_frame_pointer (fci->next, proc_desc);
+ deprecated_update_frame_base_hack (fci, get_frame_pointer (get_next_frame (fci), proc_desc));
if (proc_desc == &temp_proc_desc)
{
char *name;
/* Do not set the saved registers for a sigtramp frame,
- mips_find_saved_registers will do that for us.
- We can't use fci->signal_handler_caller, it is not yet set. */
- find_pc_partial_function (fci->pc, &name,
+ mips_find_saved_registers will do that for us. We can't
+ use (get_frame_type (fci) == SIGTRAMP_FRAME), it is not
+ yet set. */
+ /* FIXME: cagney/2002-11-18: This problem will go away once
+ frame.c:get_prev_frame() is modified to set the frame's
+ type before calling functions like this. */
+ find_pc_partial_function (get_frame_pc (fci), &name,
(CORE_ADDR *) NULL, (CORE_ADDR *) NULL);
- if (!PC_IN_SIGTRAMP (fci->pc, name))
+ if (!PC_IN_SIGTRAMP (get_frame_pc (fci), name))
{
frame_saved_regs_zalloc (fci);
- memcpy (fci->saved_regs, temp_saved_regs, SIZEOF_FRAME_SAVED_REGS);
- fci->saved_regs[PC_REGNUM]
- = fci->saved_regs[RA_REGNUM];
+ memcpy (get_frame_saved_regs (fci), temp_saved_regs, SIZEOF_FRAME_SAVED_REGS);
+ get_frame_saved_regs (fci)[PC_REGNUM]
+ = get_frame_saved_regs (fci)[RA_REGNUM];
/* Set value of previous frame's stack pointer. Remember that
saved_regs[SP_REGNUM] is special in that it contains the
value of the stack pointer register. The other saved_regs
values are addresses (in the inferior) at which a given
register's value may be found. */
- fci->saved_regs[SP_REGNUM] = fci->frame;
+ get_frame_saved_regs (fci)[SP_REGNUM] = get_frame_base (fci);
}
}
/* hack: if argument regs are saved, guess these contain args */
/* assume we can't tell how many args for now */
- fci->extra_info->num_args = -1;
+ get_frame_extra_info (fci)->num_args = -1;
for (regnum = MIPS_LAST_ARG_REGNUM; regnum >= A0_REGNUM; regnum--)
{
if (PROC_REG_MASK (proc_desc) & (1 << regnum))
{
- fci->extra_info->num_args = regnum - A0_REGNUM + 1;
+ get_frame_extra_info (fci)->num_args = regnum - A0_REGNUM + 1;
break;
}
}
#define ROUND_DOWN(n,a) ((n) & ~((a)-1))
#define ROUND_UP(n,a) (((n)+(a)-1) & ~((a)-1))
+/* Adjust the address downward (direction of stack growth) so that it
+ is correctly aligned for a new stack frame. */
+static CORE_ADDR
+mips_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
+{
+ return ROUND_DOWN (addr, 16);
+}
+
static CORE_ADDR
mips_eabi_push_arguments (int nargs,
struct value **args,
typecode == TYPE_CODE_PTR ||
typecode == TYPE_CODE_FLT) && len <= 4)
longword_offset = MIPS_STACK_ARGSIZE - len;
- else if ((typecode == TYPE_CODE_STRUCT ||
- typecode == TYPE_CODE_UNION) &&
- TYPE_LENGTH (arg_type) < MIPS_STACK_ARGSIZE)
- longword_offset = MIPS_STACK_ARGSIZE - len;
}
if (mips_debug)
offset = 0;
}
*sp -= regsize;
- read_register_gen (regno, buffer);
+ deprecated_read_register_gen (regno, buffer);
write_memory (*sp, buffer + offset, regsize);
}
{
register int regnum;
struct frame_info *frame = get_current_frame ();
- CORE_ADDR new_sp = FRAME_FP (frame);
+ CORE_ADDR new_sp = get_frame_base (frame);
+ mips_extra_func_info_t proc_desc = get_frame_extra_info (frame)->proc_desc;
- mips_extra_func_info_t proc_desc = frame->extra_info->proc_desc;
+ if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), 0, 0))
+ {
+ generic_pop_dummy_frame ();
+ flush_cached_frames ();
+ return;
+ }
write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
- if (frame->saved_regs == NULL)
+ if (get_frame_saved_regs (frame) == NULL)
FRAME_INIT_SAVED_REGS (frame);
for (regnum = 0; regnum < NUM_REGS; regnum++)
- {
- if (regnum != SP_REGNUM && regnum != PC_REGNUM
- && frame->saved_regs[regnum])
- write_register (regnum,
- read_memory_integer (frame->saved_regs[regnum],
- MIPS_SAVED_REGSIZE));
- }
+ if (regnum != SP_REGNUM && regnum != PC_REGNUM
+ && get_frame_saved_regs (frame)[regnum])
+ {
+ /* Floating point registers must not be sign extended,
+ in case MIPS_SAVED_REGSIZE = 4 but sizeof (FP0_REGNUM) == 8. */
+
+ if (FP0_REGNUM <= regnum && regnum < FP0_REGNUM + 32)
+ write_register (regnum,
+ read_memory_unsigned_integer (get_frame_saved_regs (frame)[regnum],
+ MIPS_SAVED_REGSIZE));
+ else
+ write_register (regnum,
+ read_memory_integer (get_frame_saved_regs (frame)[regnum],
+ MIPS_SAVED_REGSIZE));
+ }
+
write_register (SP_REGNUM, new_sp);
flush_cached_frames ();
int raw_size = REGISTER_RAW_SIZE (regno);
char *raw_buffer = alloca (raw_size);
- if (!frame_register_read (selected_frame, regno, raw_buffer))
+ if (!frame_register_read (deprecated_selected_frame, regno, raw_buffer))
error ("can't read register %d (%s)", regno, REGISTER_NAME (regno));
if (raw_size == 8)
{
{
/* We have a 64-bit value for this register, and we should use
all 64 bits. */
- if (!frame_register_read (selected_frame, regno, rare_buffer))
+ if (!frame_register_read (deprecated_selected_frame, regno, rare_buffer))
error ("can't read register %d (%s)", regno, REGISTER_NAME (regno));
}
else
char *raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
/* Get the data in raw format. */
- if (!frame_register_read (selected_frame, regnum, raw_buffer))
+ if (!frame_register_read (deprecated_selected_frame, regnum, raw_buffer))
{
printf_filtered ("%s: [Invalid]", REGISTER_NAME (regnum));
return;
if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
break; /* end row: reached FP register */
/* OK: get the data in raw format. */
- if (!frame_register_read (selected_frame, regnum, raw_buffer))
+ if (!frame_register_read (deprecated_selected_frame, regnum, raw_buffer))
error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
/* pad small registers */
for (byte = 0; byte < (MIPS_REGSIZE - REGISTER_VIRTUAL_SIZE (regnum)); byte++)
memset (raw_buffer, 0, sizeof (raw_buffer));
memcpy (raw_buffer + lo.reg_offset, valbuf + lo.buf_offset, lo.len);
- write_register_bytes (REGISTER_BYTE (lo.reg),
- raw_buffer,
- REGISTER_RAW_SIZE (lo.reg));
+ deprecated_write_register_bytes (REGISTER_BYTE (lo.reg), raw_buffer,
+ REGISTER_RAW_SIZE (lo.reg));
if (hi.len > 0)
{
memset (raw_buffer, 0, sizeof (raw_buffer));
memcpy (raw_buffer + hi.reg_offset, valbuf + hi.buf_offset, hi.len);
- write_register_bytes (REGISTER_BYTE (hi.reg),
- raw_buffer,
- REGISTER_RAW_SIZE (hi.reg));
+ deprecated_write_register_bytes (REGISTER_BYTE (hi.reg), raw_buffer,
+ REGISTER_RAW_SIZE (hi.reg));
}
}
memset (raw_buffer, 0, sizeof (raw_buffer));
memcpy (raw_buffer + lo.reg_offset, valbuf + lo.buf_offset, lo.len);
- write_register_bytes (REGISTER_BYTE (lo.reg),
- raw_buffer,
- REGISTER_RAW_SIZE (lo.reg));
+ deprecated_write_register_bytes (REGISTER_BYTE (lo.reg), raw_buffer,
+ REGISTER_RAW_SIZE (lo.reg));
if (hi.len > 0)
{
memset (raw_buffer, 0, sizeof (raw_buffer));
memcpy (raw_buffer + hi.reg_offset, valbuf + hi.buf_offset, hi.len);
- write_register_bytes (REGISTER_BYTE (hi.reg),
- raw_buffer,
- REGISTER_RAW_SIZE (hi.reg));
+ deprecated_write_register_bytes (REGISTER_BYTE (hi.reg), raw_buffer,
+ REGISTER_RAW_SIZE (hi.reg));
}
}
static void
mips_o32_extract_return_value (struct type *type,
struct regcache *regcache,
- char *valbuf)
+ void *valbuf)
{
mips_o32_xfer_return_value (type, regcache, valbuf, NULL);
}
static void
mips_n32n64_extract_return_value (struct type *type,
struct regcache *regcache,
- char *valbuf)
+ void *valbuf)
{
mips_n32n64_xfer_return_value (type, regcache, valbuf, NULL);
}
}
static CORE_ADDR
-mips_extract_struct_value_address (struct regcache *ignore)
+mips_extract_struct_value_address (struct regcache *regcache)
{
/* FIXME: This will only work at random. The caller passes the
struct_return address in V0, but it is not preserved. It may
still be there, or this may be a random value. */
- return read_register (V0_REGNUM);
+ LONGEST val;
+
+ regcache_cooked_read_signed (regcache, V0_REGNUM, &val);
+ return val;
}
/* Exported procedure: Is PC in the signal trampoline code */
/* Modify the actual processor type. */
-int
+static int
mips_set_processor_type (char *str)
{
int i;
This function implements the SKIP_TRAMPOLINE_CODE macro.
*/
-CORE_ADDR
+static CORE_ADDR
mips_skip_stub (CORE_ADDR pc)
{
char *name;
/* Return non-zero if the PC is inside a call thunk (aka stub or trampoline).
This implements the IN_SOLIB_CALL_TRAMPOLINE macro. */
-int
+static int
mips_in_call_stub (CORE_ADDR pc, char *name)
{
CORE_ADDR start_addr;
/* Return non-zero if the PC is inside a return thunk (aka stub or trampoline).
This implements the IN_SOLIB_RETURN_TRAMPOLINE macro. */
-int
+static int
mips_in_return_stub (CORE_ADDR pc, char *name)
{
CORE_ADDR start_addr;
}
-/* If the current gcc for this target does not produce correct debugging
- information for float parameters, both prototyped and unprototyped, then
- define this macro. This forces gdb to always assume that floats are
- passed as doubles and then converted in the callee.
-
- For the mips chip, it appears that the debug info marks the parameters as
- floats regardless of whether the function is prototyped, but the actual
- values are passed as doubles for the non-prototyped case and floats for
- the prototyped case. Thus we choose to make the non-prototyped case work
- for C and break the prototyped case, since the non-prototyped case is
- probably much more common. (FIXME). */
-
-static int
-mips_coerce_float_to_double (struct type *formal, struct type *actual)
-{
- return current_language->la_language == language_c;
-}
-
/* When debugging a 64 MIPS target running a 32 bit ABI, the size of
the register stored on the stack (32) is different to its real raw
size (64). The below ensures that registers are fetched from the
static void
mips_get_saved_register (char *raw_buffer,
- int *optimized,
+ int *optimizedp,
CORE_ADDR *addrp,
struct frame_info *frame,
int regnum,
- enum lval_type *lval)
+ enum lval_type *lvalp)
{
- CORE_ADDR addr;
+ CORE_ADDR addrx;
+ enum lval_type lvalx;
+ int optimizedx;
+ int realnum;
if (!target_has_registers)
error ("No registers.");
- /* Normal systems don't optimize out things with register numbers. */
- if (optimized != NULL)
- *optimized = 0;
- addr = find_saved_register (frame, regnum);
- if (addr != 0)
+ /* Make certain that all needed parameters are present. */
+ if (addrp == NULL)
+ addrp = &addrx;
+ if (lvalp == NULL)
+ lvalp = &lvalx;
+ if (optimizedp == NULL)
+ optimizedp = &optimizedx;
+ frame_register_unwind (get_next_frame (frame), regnum, optimizedp, lvalp,
+ addrp, &realnum, raw_buffer);
+ /* FIXME: cagney/2002-09-13: This is just so bad. The MIPS should
+ have a pseudo register range that correspons to the ABI's, rather
+ than the ISA's, view of registers. These registers would then
+ implicitly describe their size and hence could be used without
+ the below munging. */
+ if ((*lvalp) == lval_memory)
{
- if (lval != NULL)
- *lval = lval_memory;
- if (regnum == SP_REGNUM)
- {
- if (raw_buffer != NULL)
- {
- /* Put it back in target format. */
- store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
- (LONGEST) addr);
- }
- if (addrp != NULL)
- *addrp = 0;
- return;
- }
if (raw_buffer != NULL)
{
- LONGEST val;
if (regnum < 32)
- /* Only MIPS_SAVED_REGSIZE bytes of GP registers are
- saved. */
- val = read_memory_integer (addr, MIPS_SAVED_REGSIZE);
- else
- val = read_memory_integer (addr, REGISTER_RAW_SIZE (regnum));
- store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), val);
+ {
+ /* Only MIPS_SAVED_REGSIZE bytes of GP registers are
+ saved. */
+ LONGEST val = read_memory_integer ((*addrp), MIPS_SAVED_REGSIZE);
+ store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), val);
+ }
}
}
- else
- {
- if (lval != NULL)
- *lval = lval_register;
- addr = REGISTER_BYTE (regnum);
- if (raw_buffer != NULL)
- read_register_gen (regnum, raw_buffer);
- }
- if (addrp != NULL)
- *addrp = addr;
}
/* Immediately after a function call, return the saved pc.
*abip = MIPS_ABI_O32;
else if (strcmp (name, ".mdebug.abiN32") == 0)
*abip = MIPS_ABI_N32;
- else if (strcmp (name, ".mdebug.abiN64") == 0)
+ else if (strcmp (name, ".mdebug.abi64") == 0)
*abip = MIPS_ABI_N64;
else if (strcmp (name, ".mdebug.abiO64") == 0)
*abip = MIPS_ABI_O64;
struct gdbarch_tdep *tdep;
int elf_flags;
enum mips_abi mips_abi, found_abi, wanted_abi;
- enum gdb_osabi osabi = GDB_OSABI_UNKNOWN;
/* Reset the disassembly info, in case it was set to something
non-default. */
/* First of all, extract the elf_flags, if available. */
if (bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
elf_flags = elf_elfheader (info.abfd)->e_flags;
-
- /* Try to determine the OS ABI of the object we are loading. If
- we end up with `unknown', just leave it that way. */
- osabi = gdbarch_lookup_osabi (info.abfd);
}
/* Check ELF_FLAGS to see if it specifies the ABI being used. */
continue;
if (gdbarch_tdep (arches->gdbarch)->mips_abi != mips_abi)
continue;
- if (gdbarch_tdep (arches->gdbarch)->osabi == osabi)
- return arches->gdbarch;
+ return arches->gdbarch;
}
/* Need a new architecture. Fill in a target specific vector. */
tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
gdbarch = gdbarch_alloc (&info, tdep);
tdep->elf_flags = elf_flags;
- tdep->osabi = osabi;
/* Initially set everything according to the default ABI/ISA. */
set_gdbarch_short_bit (gdbarch, 16);
set_gdbarch_elf_make_msymbol_special (gdbarch,
mips_elf_make_msymbol_special);
+ if (info.osabi == GDB_OSABI_IRIX)
+ set_gdbarch_num_regs (gdbarch, 71);
+ else
+ set_gdbarch_num_regs (gdbarch, 90);
+
switch (mips_abi)
{
case MIPS_ABI_O32:
set_gdbarch_push_arguments (gdbarch, mips_o32_push_arguments);
- set_gdbarch_store_return_value (gdbarch, mips_o32_store_return_value);
+ set_gdbarch_deprecated_store_return_value (gdbarch, mips_o32_store_return_value);
set_gdbarch_extract_return_value (gdbarch, mips_o32_extract_return_value);
tdep->mips_default_saved_regsize = 4;
tdep->mips_default_stack_argsize = 4;
break;
case MIPS_ABI_O64:
set_gdbarch_push_arguments (gdbarch, mips_o64_push_arguments);
- set_gdbarch_store_return_value (gdbarch, mips_o64_store_return_value);
+ set_gdbarch_deprecated_store_return_value (gdbarch, mips_o64_store_return_value);
set_gdbarch_deprecated_extract_return_value (gdbarch, mips_o64_extract_return_value);
tdep->mips_default_saved_regsize = 8;
tdep->mips_default_stack_argsize = 8;
break;
case MIPS_ABI_EABI32:
set_gdbarch_push_arguments (gdbarch, mips_eabi_push_arguments);
- set_gdbarch_store_return_value (gdbarch, mips_eabi_store_return_value);
+ set_gdbarch_deprecated_store_return_value (gdbarch, mips_eabi_store_return_value);
set_gdbarch_deprecated_extract_return_value (gdbarch, mips_eabi_extract_return_value);
tdep->mips_default_saved_regsize = 4;
tdep->mips_default_stack_argsize = 4;
break;
case MIPS_ABI_EABI64:
set_gdbarch_push_arguments (gdbarch, mips_eabi_push_arguments);
- set_gdbarch_store_return_value (gdbarch, mips_eabi_store_return_value);
+ set_gdbarch_deprecated_store_return_value (gdbarch, mips_eabi_store_return_value);
set_gdbarch_deprecated_extract_return_value (gdbarch, mips_eabi_extract_return_value);
tdep->mips_default_saved_regsize = 8;
tdep->mips_default_stack_argsize = 8;
break;
case MIPS_ABI_N32:
set_gdbarch_push_arguments (gdbarch, mips_n32n64_push_arguments);
- set_gdbarch_store_return_value (gdbarch, mips_n32n64_store_return_value);
+ set_gdbarch_deprecated_store_return_value (gdbarch, mips_n32n64_store_return_value);
set_gdbarch_extract_return_value (gdbarch, mips_n32n64_extract_return_value);
tdep->mips_default_saved_regsize = 8;
tdep->mips_default_stack_argsize = 8;
break;
case MIPS_ABI_N64:
set_gdbarch_push_arguments (gdbarch, mips_n32n64_push_arguments);
- set_gdbarch_store_return_value (gdbarch, mips_n32n64_store_return_value);
+ set_gdbarch_deprecated_store_return_value (gdbarch, mips_n32n64_store_return_value);
set_gdbarch_extract_return_value (gdbarch, mips_n32n64_extract_return_value);
tdep->mips_default_saved_regsize = 8;
tdep->mips_default_stack_argsize = 8;
register name management is part way between the old -
#undef/#define REGISTER_NAMES and the new REGISTER_NAME(nr).
Further work on it is required. */
+ /* NOTE: many targets (esp. embedded) do not go thru the
+ gdbarch_register_name vector at all, instead bypassing it
+ by defining REGISTER_NAMES. */
set_gdbarch_register_name (gdbarch, mips_register_name);
set_gdbarch_read_pc (gdbarch, mips_read_pc);
set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
- set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
+ set_gdbarch_read_fp (gdbarch, mips_read_sp); /* Draft FRAME base. */
set_gdbarch_read_sp (gdbarch, mips_read_sp);
set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
set_gdbarch_addr_bits_remove (gdbarch, mips_addr_bits_remove);
/* There's a mess in stack frame creation. See comments in
- blockframe.c near reference to INIT_FRAME_PC_FIRST. */
- set_gdbarch_init_frame_pc_first (gdbarch, mips_init_frame_pc_first);
- set_gdbarch_init_frame_pc (gdbarch, init_frame_pc_noop);
+ blockframe.c near reference to DEPRECATED_INIT_FRAME_PC_FIRST. */
+ set_gdbarch_deprecated_init_frame_pc_first (gdbarch, mips_init_frame_pc_first);
+ set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_noop);
/* Map debug register numbers onto internal register numbers. */
set_gdbarch_stab_reg_to_regnum (gdbarch, mips_stab_reg_to_regnum);
set_gdbarch_call_dummy_p (gdbarch, 1);
set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
- set_gdbarch_use_generic_dummy_frames (gdbarch, 0);
- set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
set_gdbarch_call_dummy_address (gdbarch, mips_call_dummy_address);
set_gdbarch_push_return_address (gdbarch, mips_push_return_address);
- set_gdbarch_push_dummy_frame (gdbarch, mips_push_dummy_frame);
+ set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
set_gdbarch_pop_frame (gdbarch, mips_pop_frame);
set_gdbarch_call_dummy_start_offset (gdbarch, 0);
set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
set_gdbarch_call_dummy_length (gdbarch, 0);
set_gdbarch_fix_call_dummy (gdbarch, mips_fix_call_dummy);
- set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point);
set_gdbarch_call_dummy_words (gdbarch, mips_call_dummy_words);
set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (mips_call_dummy_words));
set_gdbarch_push_return_address (gdbarch, mips_push_return_address);
+ set_gdbarch_frame_align (gdbarch, mips_frame_align);
+ set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
set_gdbarch_register_convertible (gdbarch, mips_register_convertible);
set_gdbarch_register_convert_to_virtual (gdbarch,
mips_register_convert_to_virtual);
set_gdbarch_register_convert_to_raw (gdbarch,
mips_register_convert_to_raw);
- set_gdbarch_coerce_float_to_double (gdbarch, mips_coerce_float_to_double);
-
set_gdbarch_frame_chain (gdbarch, mips_frame_chain);
- set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid);
set_gdbarch_frameless_function_invocation (gdbarch,
generic_frameless_function_invocation_not);
set_gdbarch_frame_saved_pc (gdbarch, mips_frame_saved_pc);
- set_gdbarch_frame_args_address (gdbarch, default_frame_address);
- set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
set_gdbarch_frame_args_skip (gdbarch, 0);
set_gdbarch_register_virtual_type (gdbarch, mips_register_virtual_type);
set_gdbarch_register_virtual_size (gdbarch, generic_register_size);
- set_gdbarch_do_registers_info (gdbarch, mips_do_registers_info);
+ set_gdbarch_deprecated_do_registers_info (gdbarch, mips_do_registers_info);
set_gdbarch_pc_in_sigtramp (gdbarch, mips_pc_in_sigtramp);
/* Hook in OS ABI-specific overrides, if they have been registered. */
- gdbarch_init_osabi (info, gdbarch, osabi);
+ gdbarch_init_osabi (info, gdbarch);
set_gdbarch_store_struct_return (gdbarch, mips_store_struct_return);
set_gdbarch_extract_struct_value_address (gdbarch,
mips_extract_struct_value_address);
+
+ set_gdbarch_skip_trampoline_code (gdbarch, mips_skip_stub);
+
+ set_gdbarch_in_solib_call_trampoline (gdbarch, mips_in_call_stub);
+ set_gdbarch_in_solib_return_trampoline (gdbarch, mips_in_return_stub);
+
return gdbarch;
}
fprintf_unfiltered (file,
"mips_dump_tdep: CAUSE_REGNUM = %d\n",
CAUSE_REGNUM);
- fprintf_unfiltered (file,
- "mips_dump_tdep: CPLUS_MARKER = %c\n",
- CPLUS_MARKER);
- fprintf_unfiltered (file,
- "mips_dump_tdep: DEFAULT_MIPS_TYPE = %s\n",
- DEFAULT_MIPS_TYPE);
- fprintf_unfiltered (file,
- "mips_dump_tdep: DO_REGISTERS_INFO # %s\n",
- XSTRING (DO_REGISTERS_INFO));
fprintf_unfiltered (file,
"mips_dump_tdep: DWARF_REG_TO_REGNUM # %s\n",
XSTRING (DWARF_REG_TO_REGNUM (REGNUM)));
fprintf_unfiltered (file,
"mips_dump_tdep: ECOFF_REG_TO_REGNUM # %s\n",
XSTRING (ECOFF_REG_TO_REGNUM (REGNUM)));
- fprintf_unfiltered (file,
- "mips_dump_tdep: ELF_MAKE_MSYMBOL_SPECIAL # %s\n",
- XSTRING (ELF_MAKE_MSYMBOL_SPECIAL (SYM, MSYM)));
fprintf_unfiltered (file,
"mips_dump_tdep: FCRCS_REGNUM = %d\n",
FCRCS_REGNUM);
fprintf_unfiltered (file,
"mips_dump_tdep: GDB_TARGET_IS_MIPS64 = %d\n",
GDB_TARGET_IS_MIPS64);
- fprintf_unfiltered (file,
- "mips_dump_tdep: GDB_TARGET_MASK_DISAS_PC # %s\n",
- XSTRING (GDB_TARGET_MASK_DISAS_PC (PC)));
- fprintf_unfiltered (file,
- "mips_dump_tdep: GDB_TARGET_UNMASK_DISAS_PC # %s\n",
- XSTRING (GDB_TARGET_UNMASK_DISAS_PC (PC)));
fprintf_unfiltered (file,
"mips_dump_tdep: GEN_REG_SAVE_MASK = %d\n",
GEN_REG_SAVE_MASK);
fprintf_unfiltered (file,
"mips_dump_tdep: MIPS_SAVED_REGSIZE = %d\n",
MIPS_SAVED_REGSIZE);
- fprintf_unfiltered (file,
- "mips_dump_tdep: MSYMBOL_IS_SPECIAL = function?\n");
- fprintf_unfiltered (file,
- "mips_dump_tdep: MSYMBOL_SIZE # %s\n",
- XSTRING (MSYMBOL_SIZE (MSYM)));
fprintf_unfiltered (file,
"mips_dump_tdep: OP_LDFPR = used?\n");
fprintf_unfiltered (file,
fprintf_unfiltered (file,
"mips_dump_tdep: _PROC_MAGIC_ = %d\n",
_PROC_MAGIC_);
-
- fprintf_unfiltered (file,
- "mips_dump_tdep: OS ABI = %s\n",
- gdbarch_osabi_name (tdep->osabi));
}
void
projects / deliverable / binutils-gdb.git / blobdiff