Arm: Change CRC from fpu feature to archititectural extension

[deliverable/binutils-gdb.git] / gdb / mips-tdep.c

diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 3fb53bc76da4dea995d4c85270209d9aa7046d97..6870db82024a4b3f9344bb2f7bbe0f530bfb1810 100644 (file)
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -858,7 +858,7 @@ static int heuristic_fence_post = 0;
    register N.  NOTE: This defines the pseudo register type so need to
    rebuild the architecture vector.  */
 
-static int mips64_transfers_32bit_regs_p = 0;
+static bool mips64_transfers_32bit_regs_p = false;
 
 static void
 set_mips64_transfers_32bit_regs (const char *args, int from_tty,
@@ -7975,7 +7975,7 @@ static void
 mips_find_abi_section (bfd *abfd, asection *sect, void *obj)
 {
   enum mips_abi *abip = (enum mips_abi *) obj;
-  const char *name = bfd_get_section_name (abfd, sect);
+  const char *name = bfd_section_name (sect);
 
   if (*abip != MIPS_ABI_UNKNOWN)
     return;
@@ -8003,7 +8003,7 @@ static void
 mips_find_long_section (bfd *abfd, asection *sect, void *obj)
 {
   int *lbp = (int *) obj;
-  const char *name = bfd_get_section_name (abfd, sect);
+  const char *name = bfd_section_name (sect);
 
   if (startswith (name, ".gcc_compiled_long32"))
     *lbp = 32;