/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
- Copyright (C) 1988-2017 Free Software Foundation, Inc.
+ Copyright (C) 1988-2018 Free Software Foundation, Inc.
Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
#include "frame-base.h"
#include "trad-frame.h"
#include "infcall.h"
-#include "floatformat.h"
#include "remote.h"
#include "target-descriptions.h"
#include "dwarf2-frame.h"
#include "user-regs.h"
#include "valprint.h"
#include "ax.h"
+#include "target-float.h"
#include <algorithm>
static const struct objfile_data *mips_pdr_data;
static CORE_ADDR heuristic_proc_start (struct gdbarch *, CORE_ADDR);
-static void reinit_frame_cache_sfunc (char *, int, struct cmd_list_element *);
-
/* The list of available "set mips " and "show mips " commands. */
static struct cmd_list_element *setmipscmdlist = NULL;
gdb_assert (cookednum >= gdbarch_num_regs (gdbarch)
&& cookednum < 2 * gdbarch_num_regs (gdbarch));
if (register_size (gdbarch, rawnum) == register_size (gdbarch, cookednum))
- return regcache_raw_read (regcache, rawnum, buf);
+ return regcache->raw_read (rawnum, buf);
else if (register_size (gdbarch, rawnum) >
register_size (gdbarch, cookednum))
{
if (gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p)
- return regcache_raw_read_part (regcache, rawnum, 0, 4, buf);
+ return regcache->raw_read_part (rawnum, 0, 4, buf);
else
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
LONGEST regval;
enum register_status status;
- status = regcache_raw_read_signed (regcache, rawnum, ®val);
+ status = regcache->raw_read (rawnum, ®val);
if (status == REG_VALID)
store_signed_integer (buf, 4, byte_order, regval);
return status;
static int mips64_transfers_32bit_regs_p = 0;
static void
-set_mips64_transfers_32bit_regs (char *args, int from_tty,
+set_mips64_transfers_32bit_regs (const char *args, int from_tty,
struct cmd_list_element *c)
{
struct gdbarch_info info;
static CORE_ADDR
mips_read_pc (struct regcache *regcache)
{
- int regnum = gdbarch_pc_regnum (get_regcache_arch (regcache));
+ int regnum = gdbarch_pc_regnum (regcache->arch ());
LONGEST pc;
regcache_cooked_read_signed (regcache, regnum, &pc);
void
mips_write_pc (struct regcache *regcache, CORE_ADDR pc)
{
- int regnum = gdbarch_pc_regnum (get_regcache_arch (regcache));
+ int regnum = gdbarch_pc_regnum (regcache->arch ());
regcache_cooked_write_unsigned (regcache, regnum, pc);
}
static CORE_ADDR
mips32_next_pc (struct regcache *regcache, CORE_ADDR pc)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
unsigned long inst;
int op;
inst = mips_fetch_instruction (gdbarch, ISA_MIPS, pc, NULL);
static CORE_ADDR
micromips_next_pc (struct regcache *regcache, CORE_ADDR pc)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
ULONGEST insn;
insn = mips_fetch_instruction (gdbarch, ISA_MICROMIPS, pc, NULL);
extended_mips16_next_pc (regcache *regcache, CORE_ADDR pc,
unsigned int extension, unsigned int insn)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
int op = (insn >> 11);
switch (op)
{
static CORE_ADDR
mips16_next_pc (struct regcache *regcache, CORE_ADDR pc)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
unsigned int insn = fetch_mips_16 (gdbarch, pc);
return extended_mips16_next_pc (regcache, pc, 0, insn);
}
static CORE_ADDR
mips_next_pc (struct regcache *regcache, CORE_ADDR pc)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
if (mips_pc_is_mips16 (gdbarch, pc))
return mips16_next_pc (regcache, pc);
struct frame_info *this_frame, void **this_cache)
{
gdb_byte dummy[4];
- struct obj_section *s;
CORE_ADDR pc = get_frame_address_in_block (this_frame);
struct bound_minimal_symbol msym;
std::vector<CORE_ADDR>
mips_software_single_step (struct regcache *regcache)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
CORE_ADDR pc, next_pc;
pc = regcache_read_pc (regcache);
{
CORE_ADDR func_addr = function ? find_function_addr (function, NULL) : 0;
int mips16 = mips_pc_is_mips16 (gdbarch, func_addr);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum mips_fval_reg fval_reg;
fval_reg = readbuf ? mips16 ? mips_fval_gpr : mips_fval_fpr : mips_fval_both;
{ /* Do values for FP (float) regs. */
struct gdbarch *gdbarch = get_frame_arch (frame);
gdb_byte *raw_buffer;
- double doub, flt1; /* Doubles extracted from raw hex data. */
- int inv1, inv2;
+ std::string flt_str, dbl_str;
+
+ const struct type *flt_type = builtin_type (gdbarch)->builtin_float;
+ const struct type *dbl_type = builtin_type (gdbarch)->builtin_double;
raw_buffer
= ((gdb_byte *)
/* 4-byte registers: Print hex and floating. Also print even
numbered registers as doubles. */
mips_read_fp_register_single (frame, regnum, raw_buffer);
- flt1 = unpack_double (builtin_type (gdbarch)->builtin_float,
- raw_buffer, &inv1);
+ flt_str = target_float_to_string (raw_buffer, flt_type, "%-17.9g");
get_formatted_print_options (&opts, 'x');
print_scalar_formatted (raw_buffer,
builtin_type (gdbarch)->builtin_uint32,
&opts, 'w', file);
- fprintf_filtered (file, " flt: ");
- if (inv1)
- fprintf_filtered (file, " <invalid float> ");
- else
- fprintf_filtered (file, "%-17.9g", flt1);
+ fprintf_filtered (file, " flt: %s", flt_str.c_str ());
if ((regnum - gdbarch_num_regs (gdbarch)) % 2 == 0)
{
mips_read_fp_register_double (frame, regnum, raw_buffer);
- doub = unpack_double (builtin_type (gdbarch)->builtin_double,
- raw_buffer, &inv2);
+ dbl_str = target_float_to_string (raw_buffer, dbl_type, "%-24.17g");
- fprintf_filtered (file, " dbl: ");
- if (inv2)
- fprintf_filtered (file, "<invalid double>");
- else
- fprintf_filtered (file, "%-24.17g", doub);
+ fprintf_filtered (file, " dbl: %s", dbl_str.c_str ());
}
}
else
/* Eight byte registers: print each one as hex, float and double. */
mips_read_fp_register_single (frame, regnum, raw_buffer);
- flt1 = unpack_double (builtin_type (gdbarch)->builtin_float,
- raw_buffer, &inv1);
+ flt_str = target_float_to_string (raw_buffer, flt_type, "%-17.9g");
mips_read_fp_register_double (frame, regnum, raw_buffer);
- doub = unpack_double (builtin_type (gdbarch)->builtin_double,
- raw_buffer, &inv2);
+ dbl_str = target_float_to_string (raw_buffer, dbl_type, "%-24.17g");
get_formatted_print_options (&opts, 'x');
print_scalar_formatted (raw_buffer,
builtin_type (gdbarch)->builtin_uint64,
&opts, 'g', file);
- fprintf_filtered (file, " flt: ");
- if (inv1)
- fprintf_filtered (file, "<invalid float>");
- else
- fprintf_filtered (file, "%-17.9g", flt1);
-
- fprintf_filtered (file, " dbl: ");
- if (inv2)
- fprintf_filtered (file, "<invalid double>");
- else
- fprintf_filtered (file, "%-24.17g", doub);
+ fprintf_filtered (file, " flt: %s", flt_str.c_str ());
+ fprintf_filtered (file, " dbl: %s", dbl_str.c_str ());
}
}
mips_single_step_through_delay (struct gdbarch *gdbarch,
struct frame_info *frame)
{
- enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR pc = get_frame_pc (frame);
- struct address_space *aspace;
enum mips_isa isa;
ULONGEST insn;
- int status;
int size;
if ((mips_pc_is_mips (pc)
/* _has_delay_slot above will have validated the read. */
insn = mips_fetch_instruction (gdbarch, isa, pc, NULL);
size = mips_insn_size (isa, insn);
- aspace = get_frame_address_space (frame);
+
+ const address_space *aspace = get_frame_address_space (frame);
+
return breakpoint_here_p (aspace, pc + size) != no_breakpoint_here;
}
used for all MIPS-specific commands. */
static void
-show_mips_command (char *args, int from_tty)
+show_mips_command (const char *args, int from_tty)
{
help_list (showmipscmdlist, "show mips ", all_commands, gdb_stdout);
}
static void
-set_mips_command (char *args, int from_tty)
+set_mips_command (const char *args, int from_tty)
{
printf_unfiltered
("\"set mips\" must be followed by an appropriate subcommand.\n");
/* Commands to show/set the MIPS FPU type. */
static void
-show_mipsfpu_command (char *args, int from_tty)
+show_mipsfpu_command (const char *args, int from_tty)
{
const char *fpu;
static void
-set_mipsfpu_command (char *args, int from_tty)
+set_mipsfpu_command (const char *args, int from_tty)
{
printf_unfiltered ("\"set mipsfpu\" must be followed by \"double\", "
"\"single\",\"none\" or \"auto\".\n");
}
static void
-set_mipsfpu_single_command (char *args, int from_tty)
+set_mipsfpu_single_command (const char *args, int from_tty)
{
struct gdbarch_info info;
gdbarch_info_init (&info);
}
static void
-set_mipsfpu_double_command (char *args, int from_tty)
+set_mipsfpu_double_command (const char *args, int from_tty)
{
struct gdbarch_info info;
gdbarch_info_init (&info);
}
static void
-set_mipsfpu_none_command (char *args, int from_tty)
+set_mipsfpu_none_command (const char *args, int from_tty)
{
struct gdbarch_info info;
gdbarch_info_init (&info);
}
static void
-set_mipsfpu_auto_command (char *args, int from_tty)
+set_mipsfpu_auto_command (const char *args, int from_tty)
{
mips_fpu_type_auto = 1;
}
callable as an sfunc. */
static void
-reinit_frame_cache_sfunc (char *args, int from_tty,
+reinit_frame_cache_sfunc (const char *args, int from_tty,
struct cmd_list_element *c)
{
reinit_frame_cache ();
}
static void
-mips_abi_update (char *ignore_args, int from_tty, struct cmd_list_element *c)
+mips_abi_update (const char *ignore_args,
+ int from_tty, struct cmd_list_element *c)
{
struct gdbarch_info info;
mips_fpu_type_str (MIPS_FPU_TYPE (gdbarch)));
}
-extern initialize_file_ftype _initialize_mips_tdep; /* -Wmissing-prototypes */
-
void
_initialize_mips_tdep (void)
{
static struct cmd_list_element *mipsfpulist = NULL;
- struct cmd_list_element *c;
mips_abi_string = mips_abi_strings[MIPS_ABI_UNKNOWN];
if (MIPS_ABI_LAST + 1