Remove make_cleanup_restore_current_ui

[deliverable/binutils-gdb.git] / gdb / mips-tdep.c

diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 4e4d79ed4abeb100361ef86b11b169ea58deede6..b91dbfaa38e42c304e8daedf33f65e2eb4f9d32a 100644 (file)
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -55,6 +55,7 @@
 #include "user-regs.h"
 #include "valprint.h"
 #include "ax.h"
+#include <algorithm>
 
 static const struct objfile_data *mips_pdr_data;
 
@@ -1073,11 +1074,18 @@ mips_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
   if (TYPE_LENGTH (rawtype) == 0)
     return rawtype;
 
+  /* Present the floating point registers however the hardware did;
+     do not try to convert between FPU layouts.  */
   if (mips_float_register_p (gdbarch, rawnum))
-    /* Present the floating point registers however the hardware did;
-       do not try to convert between FPU layouts.  */
     return rawtype;
 
+  /* Floating-point control registers are always 32-bit even though for
+     backwards compatibility reasons 64-bit targets will transfer them
+     as 64-bit quantities even if using XML descriptions.  */
+  if (rawnum == mips_regnum (gdbarch)->fp_control_status
+      || rawnum == mips_regnum (gdbarch)->fp_implementation_revision)
+    return builtin_type (gdbarch)->builtin_int32;
+
   /* Use pointer types for registers if we can.  For n32 we can not,
      since we do not have a 64-bit pointer type.  */
   if (mips_abi_regsize (gdbarch)
@@ -1102,19 +1110,17 @@ mips_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
              && rawnum < mips_regnum (gdbarch)->dspacc + 6)))
     return builtin_type (gdbarch)->builtin_int32;
 
+  /* The pseudo/cooked view of embedded registers is always
+     32-bit, even if the target transfers 64-bit values for them.
+     New targets relying on XML descriptions should only transfer
+     the necessary 32 bits, but older versions of GDB expected 64,
+     so allow the target to provide 64 bits without interfering
+     with the displayed type.  */
   if (gdbarch_osabi (gdbarch) != GDB_OSABI_IRIX
       && gdbarch_osabi (gdbarch) != GDB_OSABI_LINUX
-      && rawnum >= MIPS_EMBED_FP0_REGNUM + 32
+      && rawnum >= MIPS_FIRST_EMBED_REGNUM
       && rawnum <= MIPS_LAST_EMBED_REGNUM)
-    {
-      /* The pseudo/cooked view of embedded registers is always
-        32-bit, even if the target transfers 64-bit values for them.
-        New targets relying on XML descriptions should only transfer
-        the necessary 32 bits, but older versions of GDB expected 64,
-        so allow the target to provide 64 bits without interfering
-        with the displayed type.  */
-      return builtin_type (gdbarch)->builtin_int32;
-    }
+    return builtin_type (gdbarch)->builtin_int32;
 
   /* For all other registers, pass through the hardware type.  */
   return rawtype;
@@ -3039,7 +3045,7 @@ micromips_scan_prologue (struct gdbarch *gdbarch,
                       && ((reglist >= 1 && reglist <= 9)
                           || (reglist >= 16 && reglist <= 25)))
                {
-                 int sreglist = min(reglist & 0xf, 8);
+                 int sreglist = std::min(reglist & 0xf, 8);
 
                  s = 4 << ((b12s4_op (insn) & 0x2) == 0x2);
                  for (i = 0; i < sreglist; i++)
@@ -6645,7 +6651,7 @@ mips_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
       CORE_ADDR post_prologue_pc
        = skip_prologue_using_sal (gdbarch, func_addr);
       if (post_prologue_pc != 0)
-       return max (pc, post_prologue_pc);
+       return std::max (pc, post_prologue_pc);
     }
 
   /* Can't determine prologue from the symbol table, need to examine