/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
- 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
+ 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software
Foundation, Inc.
Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
static struct type *mips_register_type (struct gdbarch *gdbarch, int regnum);
-/* A useful bit in the CP0 status register (PS_REGNUM). */
+/* A useful bit in the CP0 status register (MIPS_PS_REGNUM). */
/* This bit is set if we are emulating 32-bit FPRs on a 64-bit chip. */
#define ST0_FR (1 << 26)
NULL
};
-struct frame_extra_info
-{
- mips_extra_func_info_t proc_desc;
- int num_args;
-};
-
/* Various MIPS ISA options (related to stack analysis) can be
overridden dynamically. Establish an enum/array for managing
them. */
case MIPS_ABI_UNKNOWN:
case MIPS_ABI_LAST:
default:
- internal_error (__FILE__, __LINE__, "bad switch");
+ internal_error (__FILE__, __LINE__, _("bad switch"));
}
else if (mips_abi_regsize_string == size_64)
return 8;
reg_offset = 0;
break;
default:
- internal_error (__FILE__, __LINE__, "bad switch");
+ internal_error (__FILE__, __LINE__, _("bad switch"));
}
if (mips_debug)
fprintf_unfiltered (gdb_stderr,
/* Otherwise check the FR bit in the status register - it controls
the FP compatiblity mode. If it is clear we are in compatibility
mode. */
- if ((read_register (PS_REGNUM) & ST0_FR) == 0)
+ if ((read_register (MIPS_PS_REGNUM) & ST0_FR) == 0)
return 1;
#endif
}
else
internal_error (__FILE__, __LINE__,
- "mips_register_name: bad register number %d", rawnum);
+ _("mips_register_name: bad register number %d"), rawnum);
}
/* Return the groups that a MIPS register can be categorised into. */
regcache_raw_read_part (regcache, rawnum, 4, 4, buf);
}
else
- internal_error (__FILE__, __LINE__, "bad register size");
+ internal_error (__FILE__, __LINE__, _("bad register size"));
}
static void
regcache_raw_write_part (regcache, rawnum, 4, 4, buf);
}
else
- internal_error (__FILE__, __LINE__, "bad register size");
+ internal_error (__FILE__, __LINE__, _("bad register size"));
}
/* Table to translate MIPS16 register field to actual register number. */
if (!gdbarch_update_p (info))
{
mips64_transfers_32bit_regs_p = 0;
- error ("32-bit compatibility mode not supported");
+ error (_("32-bit compatibility mode not supported"));
}
}
return builtin_type_ieee_double_little;
case BFD_ENDIAN_UNKNOWN:
default:
- internal_error (__FILE__, __LINE__, "bad switch");
+ internal_error (__FILE__, __LINE__, _("bad switch"));
}
}
else if (regnum < NUM_REGS)
the ABI (with a few complications). */
if (regnum >= (NUM_REGS
+ mips_regnum (current_gdbarch)->fp_control_status)
- && regnum <= NUM_REGS + LAST_EMBED_REGNUM)
+ && regnum <= NUM_REGS + MIPS_LAST_EMBED_REGNUM)
/* The pseudo/cooked view of the embedded registers is always
32-bit. The raw view is handled below. */
return builtin_type_int32;
case AUTO_BOOLEAN_AUTO:
return tdep->default_mask_address_p;
default:
- internal_error (__FILE__, __LINE__, "mips_mask_address_p: bad switch");
+ internal_error (__FILE__, __LINE__, _("mips_mask_address_p: bad switch"));
return -1;
}
}
static void
-show_mask_address (char *cmd, int from_tty, struct cmd_list_element *c)
+show_mask_address (struct ui_file *file, int from_tty,
+ struct cmd_list_element *c, const char *value)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+
+ deprecated_show_value_hack (file, from_tty, c, value);
switch (mask_address_var)
{
case AUTO_BOOLEAN_TRUE:
mips_mask_address_p (tdep) ? "enabled" : "disabled");
break;
default:
- internal_error (__FILE__, __LINE__, "show_mask_address: bad switch");
+ internal_error (__FILE__, __LINE__, _("show_mask_address: bad switch"));
break;
}
}
/* Fetch and return instruction from the specified location. If the PC
is odd, assume it's a MIPS16 instruction; otherwise MIPS32. */
-static t_inst
+static ULONGEST
mips_fetch_instruction (CORE_ADDR addr)
{
- char buf[MIPS32_INSN_SIZE];
+ char buf[MIPS_INSN32_SIZE];
int instlen;
int status;
if (mips_pc_is_mips16 (addr))
{
- instlen = MIPS16_INSN_SIZE;
+ instlen = MIPS_INSN16_SIZE;
addr = unmake_mips16_addr (addr);
}
else
- instlen = MIPS32_INSN_SIZE;
+ instlen = MIPS_INSN32_SIZE;
status = deprecated_read_memory_nobpt (addr, buf, instlen);
if (status)
memory_error (status, addr);
#define rtype_shamt(x) ((x >> 6) & 0x1f)
#define rtype_funct(x) (x & 0x3f)
-static CORE_ADDR
-mips32_relative_offset (unsigned long inst)
+static LONGEST
+mips32_relative_offset (ULONGEST inst)
{
- long x;
- x = itype_immediate (inst);
- if (x & 0x8000) /* sign bit set */
- {
- x |= 0xffff0000; /* sign extension */
- }
- x = x << 2;
- return x;
+ return ((itype_immediate (inst) ^ 0x8000) - 0x8000) << 2;
}
/* Determine whate to set a single step breakpoint while considering
break;
}
default:
- internal_error (__FILE__, __LINE__, "bad switch");
+ internal_error (__FILE__, __LINE__, _("bad switch"));
}
upk->offset = offset;
upk->regx = regx;
if (limit_pc > start_pc + 200)
limit_pc = start_pc + 200;
- for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS16_INSN_SIZE)
+ for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS_INSN16_SIZE)
{
/* Save the previous instruction. If it's an EXTEND, we'll extract
the immediate offset extension from it in mips16_get_imm. */
over the extend. */
if ((inst & 0xf800) == 0xf000) /* extend */
{
- extend_bytes = MIPS16_INSN_SIZE;
+ extend_bytes = MIPS_INSN16_SIZE;
continue;
}
&& (inst & 0x700) != 0x700) /* entry */
entry_inst = inst; /* save for later processing */
else if ((inst & 0xf800) == 0x1800) /* jal(x) */
- cur_pc += MIPS16_INSN_SIZE; /* 32-bit instruction */
+ cur_pc += MIPS_INSN16_SIZE; /* 32-bit instruction */
else if ((inst & 0xff1c) == 0x6704) /* move reg,$a0-$a3 */
{
/* This instruction is part of the prologue, but we don't
restart:
frame_offset = 0;
- for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS32_INSN_SIZE)
+ for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS_INSN32_SIZE)
{
unsigned long inst, high_word, low_word;
int reg;
|| high_word == 0x3408 /* ori $t0,$zero,n */
))
{
- load_immediate_bytes += MIPS32_INSN_SIZE; /* FIXME! */
+ load_immediate_bytes += MIPS_INSN32_SIZE; /* FIXME! */
}
else
{
target_remove_breakpoint (next_pc, break_mem);
}
-static struct mips_extra_func_info temp_proc_desc;
-
/* Test whether the PC points to the return instruction at the
end of a function. */
if (heuristic_fence_post == UINT_MAX || fence < VM_MIN_ADDRESS)
fence = VM_MIN_ADDRESS;
- instlen = mips_pc_is_mips16 (pc) ? MIPS16_INSN_SIZE : MIPS32_INSN_SIZE;
+ instlen = mips_pc_is_mips16 (pc) ? MIPS_INSN16_SIZE : MIPS_INSN32_SIZE;
/* search back for previous return */
for (start_pc -= instlen;; start_pc -= instlen)
{
static int blurb_printed = 0;
- warning ("GDB can't find the start of the function at 0x%s.",
+ warning (_("GDB can't find the start of the function at 0x%s."),
paddr_nz (pc));
if (!blurb_printed)
else if (mips_about_to_return (start_pc))
{
/* Skip return and its delay slot. */
- start_pc += 2 * MIPS32_INSN_SIZE;
+ start_pc += 2 * MIPS_INSN32_SIZE;
break;
}
char *contents;
};
-/* MIPS stack frames are almost impenetrable. When execution stops,
- we basically have to look at symbol information for the function
- that we stopped in, which tells us *which* register (if any) is
- the base of the frame pointer, and what offset from that register
- the frame itself is at.
-
- This presents a problem when trying to examine a stack in memory
- (that isn't executing at the moment), using the "frame" command. We
- don't have a PC, nor do we have any registers except SP.
-
- This routine takes two arguments, SP and PC, and tries to make the
- cached frames look as if these two arguments defined a frame on the
- cache. This allows the rest of info frame to extract the important
- arguments without difficulty. */
-
-struct frame_info *
-setup_arbitrary_frame (int argc, CORE_ADDR *argv)
-{
- if (argc != 2)
- error ("MIPS frame specifications require two arguments: sp and pc");
-
- return create_new_frame (argv[0], argv[1]);
-}
-
/* According to the current ABI, should the type be passed in a
floating-point register (assuming that there is space)? When there
is no FPU, FP are not even considered as possibile candidates for
than necessary for EABI, because the first few arguments are
passed in registers, but that's OK. */
for (argnum = 0; argnum < nargs; argnum++)
- len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
+ len += align_up (TYPE_LENGTH (value_type (args[argnum])),
mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
char *val;
char valbuf[MAX_REGISTER_SIZE];
struct value *arg = args[argnum];
- struct type *arg_type = check_typedef (VALUE_TYPE (arg));
+ struct type *arg_type = check_typedef (value_type (arg));
int len = TYPE_LENGTH (arg_type);
enum type_code typecode = TYPE_CODE (arg_type);
fprintf_unfiltered (gdb_stdlog, " push");
}
else
- val = (char *) VALUE_CONTENTS (arg);
+ val = (char *) value_contents (arg);
/* 32-bit ABIs always start floating point arguments in an
even-numbered floating point register. Round the FP register
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
- len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
+ len += align_up (TYPE_LENGTH (value_type (args[argnum])),
mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
{
char *val;
struct value *arg = args[argnum];
- struct type *arg_type = check_typedef (VALUE_TYPE (arg));
+ struct type *arg_type = check_typedef (value_type (arg));
int len = TYPE_LENGTH (arg_type);
enum type_code typecode = TYPE_CODE (arg_type);
"mips_n32n64_push_dummy_call: %d len=%d type=%d",
argnum + 1, len, (int) typecode);
- val = (char *) VALUE_CONTENTS (arg);
+ val = (char *) value_contents (arg);
if (fp_register_arg_p (typecode, arg_type)
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
- len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
+ len += align_up (TYPE_LENGTH (value_type (args[argnum])),
mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
{
char *val;
struct value *arg = args[argnum];
- struct type *arg_type = check_typedef (VALUE_TYPE (arg));
+ struct type *arg_type = check_typedef (value_type (arg));
int len = TYPE_LENGTH (arg_type);
enum type_code typecode = TYPE_CODE (arg_type);
"mips_o32_push_dummy_call: %d len=%d type=%d",
argnum + 1, len, (int) typecode);
- val = (char *) VALUE_CONTENTS (arg);
+ val = (char *) value_contents (arg);
/* 32-bit ABIs always start floating point arguments in an
even-numbered floating point register. Round the FP register
0, 4, TARGET_BYTE_ORDER, readbuf, writebuf, 4);
break;
default:
- internal_error (__FILE__, __LINE__, "bad switch");
+ internal_error (__FILE__, __LINE__, _("bad switch"));
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
- len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
+ len += align_up (TYPE_LENGTH (value_type (args[argnum])),
mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
{
char *val;
struct value *arg = args[argnum];
- struct type *arg_type = check_typedef (VALUE_TYPE (arg));
+ struct type *arg_type = check_typedef (value_type (arg));
int len = TYPE_LENGTH (arg_type);
enum type_code typecode = TYPE_CODE (arg_type);
"mips_o64_push_dummy_call: %d len=%d type=%d",
argnum + 1, len, (int) typecode);
- val = (char *) VALUE_CONTENTS (arg);
+ val = (char *) value_contents (arg);
/* 32-bit ABIs always start floating point arguments in an
even-numbered floating point register. Round the FP register
char *raw_buffer = alloca (raw_size);
if (!frame_register_read (frame, regno, raw_buffer))
- error ("can't read register %d (%s)", regno, REGISTER_NAME (regno));
+ error (_("can't read register %d (%s)"), regno, REGISTER_NAME (regno));
if (raw_size == 8)
{
/* We have a 64-bit value for this register. Find the low-order
/* We have a 64-bit value for this register, and we should use
all 64 bits. */
if (!frame_register_read (frame, regno, rare_buffer))
- error ("can't read register %d (%s)", regno, REGISTER_NAME (regno));
+ error (_("can't read register %d (%s)"), regno, REGISTER_NAME (regno));
}
else
{
if ((regno - mips_regnum (current_gdbarch)->fp0) & 1)
internal_error (__FILE__, __LINE__,
- "mips_read_fp_register_double: bad access to "
- "odd-numbered FP register");
+ _("mips_read_fp_register_double: bad access to "
+ "odd-numbered FP register"));
/* mips_read_fp_register_single will find the correct 32 bits from
each register. */
break; /* end row: reached FP register */
/* OK: get the data in raw format. */
if (!frame_register_read (frame, regnum, raw_buffer))
- error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
+ error (_("can't read register %d (%s)"), regnum, REGISTER_NAME (regnum));
/* pad small registers */
for (byte = 0;
byte < (mips_abi_regsize (current_gdbarch)
{
gdb_assert (regnum >= NUM_REGS);
if (*(REGISTER_NAME (regnum)) == '\0')
- error ("Not a valid register for the current processor type");
+ error (_("Not a valid register for the current processor type"));
mips_print_register (file, frame, regnum, 0);
fprintf_filtered (file, "\n");
}
int
-mips_step_skips_delay (CORE_ADDR pc)
+mips_single_step_through_delay (struct gdbarch *gdbarch,
+ struct frame_info *frame)
{
- char buf[MIPS32_INSN_SIZE];
+ CORE_ADDR pc = get_frame_pc (frame);
+ char buf[MIPS_INSN32_SIZE];
/* There is no branch delay slot on MIPS16. */
if (mips_pc_is_mips16 (pc))
return 0;
- if (target_read_memory (pc, buf, sizeof buf) != 0)
- /* If error reading memory, guess that it is not a delayed branch. */
+ if (!safe_frame_unwind_memory (frame, pc, buf, sizeof buf))
+ /* If error reading memory, guess that it is not a delayed
+ branch. */
return 0;
return is_delayed (extract_unsigned_integer (buf, sizeof buf));
}
fpu = "absent (none)";
break;
default:
- internal_error (__FILE__, __LINE__, "bad switch");
+ internal_error (__FILE__, __LINE__, _("bad switch"));
}
if (mips_fpu_type_auto)
printf_unfiltered
instead of relying on globals. Doing that would let generic code
handle the search for this specific architecture. */
if (!gdbarch_update_p (info))
- internal_error (__FILE__, __LINE__, "set mipsfpu failed");
+ internal_error (__FILE__, __LINE__, _("set mipsfpu failed"));
}
static void
instead of relying on globals. Doing that would let generic code
handle the search for this specific architecture. */
if (!gdbarch_update_p (info))
- internal_error (__FILE__, __LINE__, "set mipsfpu failed");
+ internal_error (__FILE__, __LINE__, _("set mipsfpu failed"));
}
static void
instead of relying on globals. Doing that would let generic code
handle the search for this specific architecture. */
if (!gdbarch_update_p (info))
- internal_error (__FILE__, __LINE__, "set mipsfpu failed");
+ internal_error (__FILE__, __LINE__, _("set mipsfpu failed"));
}
static void
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
CORE_ADDR prid;
- prid = read_register (PRID_REGNUM);
+ prid = read_register (MIPS_PRID_REGNUM);
if ((prid & ~0xf) == 0x700)
tdep->mips_processor_reg_names = mips_r3041_reg_names;
address from those two instructions. */
CORE_ADDR target_pc = read_signed_register (2);
- t_inst inst;
+ ULONGEST inst;
int i;
/* See if the name of the target function is __fn_stub_*. */
/* Scan through this _fn_stub_ code for the lui/addiu pair.
The limit on the search is arbitrarily set to 20
instructions. FIXME. */
- for (i = 0, pc = 0; i < 20; i++, target_pc += MIPS32_INSN_SIZE)
+ for (i = 0, pc = 0; i < 20; i++, target_pc += MIPS_INSN32_SIZE)
{
inst = mips_fetch_instruction (target_pc);
if ((inst & 0xffff0000) == 0x3c010000) /* lui $at */
return 0; /* not a stub */
}
-
-/* Return non-zero if the PC is inside a call thunk (aka stub or trampoline).
- This implements the IN_SOLIB_CALL_TRAMPOLINE macro. */
-
-static int
-mips_in_call_stub (CORE_ADDR pc, char *name)
-{
- CORE_ADDR start_addr;
-
- /* Find the starting address of the function containing the PC. If the
- caller didn't give us a name, look it up at the same time. */
- if (find_pc_partial_function (pc, name ? NULL : &name, &start_addr, NULL) ==
- 0)
- return 0;
-
- if (strncmp (name, "__mips16_call_stub_", 19) == 0)
- {
- /* If the PC is in __mips16_call_stub_{1..10}, this is a call stub. */
- if (name[19] >= '0' && name[19] <= '9')
- return 1;
- /* If the PC at the start of __mips16_call_stub_{s,d}f_{0..10}, i.e.
- before the jal instruction, this is effectively a call stub. */
- else if (name[19] == 's' || name[19] == 'd')
- return pc == start_addr;
- }
-
- return 0; /* not a stub */
-}
-
-
-/* Return non-zero if the PC is inside a return thunk (aka stub or
- trampoline). */
-
-static int
-mips_in_solib_return_trampoline (CORE_ADDR pc, char *name)
-{
- CORE_ADDR start_addr;
-
- /* Find the starting address of the function containing the PC. */
- if (find_pc_partial_function (pc, NULL, &start_addr, NULL) == 0)
- return 0;
-
- /* If the PC is in __mips16_ret_{d,s}f, this is a return stub. */
- if (strcmp (name, "__mips16_ret_sf") == 0
- || strcmp (name, "__mips16_ret_df") == 0)
- return 1;
-
- /* If the PC is in __mips16_call_stub_{s,d}f_{0..10} but not at the start,
- i.e. after the jal instruction, this is effectively a return stub. */
- if (strncmp (name, "__mips16_call_stub_", 19) == 0
- && (name[19] == 's' || name[19] == 'd') && pc != start_addr)
- return 1;
-
- return 0; /* not a stub */
-}
-
-
-/* Return non-zero if the PC is in a library helper function that
- should be ignored. This implements the
- DEPRECATED_IGNORE_HELPER_CALL macro. */
-
-int
-mips_ignore_helper (CORE_ADDR pc)
-{
- char *name;
-
- /* Find the starting address and name of the function containing the PC. */
- if (find_pc_partial_function (pc, &name, NULL, NULL) == 0)
- return 0;
-
- /* If the PC is in __mips16_ret_{d,s}f, this is a library helper function
- that we want to ignore. */
- return (strcmp (name, "__mips16_ret_sf") == 0
- || strcmp (name, "__mips16_ret_df") == 0);
-}
-
-
/* Convert a dbx stab register number (from `r' declaration) to a GDB
[1 * NUM_REGS .. 2 * NUM_REGS) REGNUM. */
guarenteed to be correctly sign extended. */
static CORE_ADDR
-mips_integer_to_address (struct type *type, void *buf)
+mips_integer_to_address (struct gdbarch *gdbarch,
+ struct type *type, const bfd_byte *buf)
{
char *tmp = alloca (TYPE_LENGTH (builtin_type_void_data_ptr));
LONGEST val = unpack_long (type, buf);
else if (strcmp (name, ".mdebug.eabi64") == 0)
*abip = MIPS_ABI_EABI64;
else
- warning ("unsupported ABI %s.", name + 8);
+ warning (_("unsupported ABI %s."), name + 8);
}
static enum mips_abi
if (mips_abi_strings[i] == mips_abi_string)
return (enum mips_abi) i;
- internal_error (__FILE__, __LINE__, "unknown ABI string");
+ internal_error (__FILE__, __LINE__, _("unknown ABI string"));
}
static struct gdbarch *
&floatformat_n32n64_long_double_big);
break;
default:
- internal_error (__FILE__, __LINE__, "unknown ABI in switch");
+ internal_error (__FILE__, __LINE__, _("unknown ABI in switch"));
}
/* FIXME: jlarmour/2000-04-07: There *is* a flag EF_MIPS_32BIT_MODE
set_gdbarch_skip_trampoline_code (gdbarch, mips_skip_trampoline_code);
- /* NOTE drow/2004-02-11: We overload the core solib trampoline code
- to support MIPS16. This is a bad thing. Make sure not to do it
- if we have an OS ABI that actually supports shared libraries, since
- shared library support is more important. If we have an OS someday
- that supports both shared libraries and MIPS16, we'll have to find
- a better place for these. */
- if (info.osabi == GDB_OSABI_UNKNOWN)
- {
- set_gdbarch_in_solib_call_trampoline (gdbarch, mips_in_call_stub);
- set_gdbarch_in_solib_return_trampoline (gdbarch, mips_in_solib_return_trampoline);
- }
+ set_gdbarch_single_step_through_delay (gdbarch, mips_single_step_through_delay);
/* Hook in OS ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
fprintf_unfiltered (file,
"mips_dump_tdep: mips_stack_argsize() = %d\n",
mips_stack_argsize (current_gdbarch));
- fprintf_unfiltered (file,
- "mips_dump_tdep: ADDR_BITS_REMOVE # %s\n",
- XSTRING (ADDR_BITS_REMOVE (ADDR)));
- fprintf_unfiltered (file,
- "mips_dump_tdep: ATTACH_DETACH # %s\n",
- XSTRING (ATTACH_DETACH));
- fprintf_unfiltered (file,
- "mips_dump_tdep: DWARF_REG_TO_REGNUM # %s\n",
- XSTRING (DWARF_REG_TO_REGNUM (REGNUM)));
- fprintf_unfiltered (file,
- "mips_dump_tdep: ECOFF_REG_TO_REGNUM # %s\n",
- XSTRING (ECOFF_REG_TO_REGNUM (REGNUM)));
- fprintf_unfiltered (file,
- "mips_dump_tdep: FIRST_EMBED_REGNUM = %d\n",
- FIRST_EMBED_REGNUM);
- fprintf_unfiltered (file,
- "mips_dump_tdep: DEPRECATED_IGNORE_HELPER_CALL # %s\n",
- XSTRING (DEPRECATED_IGNORE_HELPER_CALL (PC)));
- fprintf_unfiltered (file,
- "mips_dump_tdep: IN_SOLIB_CALL_TRAMPOLINE # %s\n",
- XSTRING (IN_SOLIB_CALL_TRAMPOLINE (PC, NAME)));
- fprintf_unfiltered (file,
- "mips_dump_tdep: LAST_EMBED_REGNUM = %d\n",
- LAST_EMBED_REGNUM);
-#ifdef MACHINE_CPROC_FP_OFFSET
- fprintf_unfiltered (file,
- "mips_dump_tdep: MACHINE_CPROC_FP_OFFSET = %d\n",
- MACHINE_CPROC_FP_OFFSET);
-#endif
-#ifdef MACHINE_CPROC_PC_OFFSET
- fprintf_unfiltered (file,
- "mips_dump_tdep: MACHINE_CPROC_PC_OFFSET = %d\n",
- MACHINE_CPROC_PC_OFFSET);
-#endif
-#ifdef MACHINE_CPROC_SP_OFFSET
- fprintf_unfiltered (file,
- "mips_dump_tdep: MACHINE_CPROC_SP_OFFSET = %d\n",
- MACHINE_CPROC_SP_OFFSET);
-#endif
- fprintf_unfiltered (file, "mips_dump_tdep: MIPS_DEFAULT_ABI = FIXME!\n");
- fprintf_unfiltered (file,
- "mips_dump_tdep: MIPS_EFI_SYMBOL_NAME = multi-arch!!\n");
- fprintf_unfiltered (file,
- "mips_dump_tdep: MIPS_LAST_ARG_REGNUM = %d (%d regs)\n",
- MIPS_LAST_ARG_REGNUM,
- MIPS_LAST_ARG_REGNUM - MIPS_A0_REGNUM + 1);
- fprintf_unfiltered (file,
- "mips_dump_tdep: MIPS_NUMREGS = %d\n", MIPS_NUMREGS);
- fprintf_unfiltered (file,
- "mips_dump_tdep: mips_abi_regsize() = %d\n",
- mips_abi_regsize (current_gdbarch));
- fprintf_unfiltered (file,
- "mips_dump_tdep: PRID_REGNUM = %d\n", PRID_REGNUM);
- fprintf_unfiltered (file,
- "mips_dump_tdep: PROC_FRAME_ADJUST = function?\n");
- fprintf_unfiltered (file,
- "mips_dump_tdep: PROC_FRAME_OFFSET = function?\n");
- fprintf_unfiltered (file, "mips_dump_tdep: PROC_FRAME_REG = function?\n");
- fprintf_unfiltered (file, "mips_dump_tdep: PROC_FREG_MASK = function?\n");
- fprintf_unfiltered (file, "mips_dump_tdep: PROC_FREG_OFFSET = function?\n");
- fprintf_unfiltered (file, "mips_dump_tdep: PROC_HIGH_ADDR = function?\n");
- fprintf_unfiltered (file, "mips_dump_tdep: PROC_LOW_ADDR = function?\n");
- fprintf_unfiltered (file, "mips_dump_tdep: PROC_PC_REG = function?\n");
- fprintf_unfiltered (file, "mips_dump_tdep: PROC_REG_MASK = function?\n");
- fprintf_unfiltered (file, "mips_dump_tdep: PROC_REG_OFFSET = function?\n");
- fprintf_unfiltered (file, "mips_dump_tdep: PROC_SYMBOL = function?\n");
- fprintf_unfiltered (file, "mips_dump_tdep: PS_REGNUM = %d\n", PS_REGNUM);
-#ifdef SAVED_BYTES
- fprintf_unfiltered (file,
- "mips_dump_tdep: SAVED_BYTES = %d\n", SAVED_BYTES);
-#endif
-#ifdef SAVED_FP
- fprintf_unfiltered (file, "mips_dump_tdep: SAVED_FP = %d\n", SAVED_FP);
-#endif
-#ifdef SAVED_PC
- fprintf_unfiltered (file, "mips_dump_tdep: SAVED_PC = %d\n", SAVED_PC);
-#endif
- fprintf_unfiltered (file,
- "mips_dump_tdep: SETUP_ARBITRARY_FRAME # %s\n",
- XSTRING (SETUP_ARBITRARY_FRAME (NUMARGS, ARGS)));
- fprintf_unfiltered (file,
- "mips_dump_tdep: SOFTWARE_SINGLE_STEP # %s\n",
- XSTRING (SOFTWARE_SINGLE_STEP (SIG, BP_P)));
- fprintf_unfiltered (file,
- "mips_dump_tdep: SOFTWARE_SINGLE_STEP_P () = %d\n",
- SOFTWARE_SINGLE_STEP_P ());
- fprintf_unfiltered (file,
- "mips_dump_tdep: STAB_REG_TO_REGNUM # %s\n",
- XSTRING (STAB_REG_TO_REGNUM (REGNUM)));
-#ifdef STACK_END_ADDR
- fprintf_unfiltered (file,
- "mips_dump_tdep: STACK_END_ADDR = %d\n",
- STACK_END_ADDR);
-#endif
- fprintf_unfiltered (file,
- "mips_dump_tdep: STEP_SKIPS_DELAY # %s\n",
- XSTRING (STEP_SKIPS_DELAY (PC)));
- fprintf_unfiltered (file,
- "mips_dump_tdep: STEP_SKIPS_DELAY_P = %d\n",
- STEP_SKIPS_DELAY_P);
- fprintf_unfiltered (file,
- "mips_dump_tdep: STOPPED_BY_WATCHPOINT # %s\n",
- XSTRING (STOPPED_BY_WATCHPOINT (WS)));
- fprintf_unfiltered (file,
- "mips_dump_tdep: TABULAR_REGISTER_OUTPUT = used?\n");
- fprintf_unfiltered (file,
- "mips_dump_tdep: TARGET_CAN_USE_HARDWARE_WATCHPOINT # %s\n",
- XSTRING (TARGET_CAN_USE_HARDWARE_WATCHPOINT
- (TYPE, CNT, OTHERTYPE)));
-#ifdef TRACE_CLEAR
- fprintf_unfiltered (file,
- "mips_dump_tdep: TRACE_CLEAR # %s\n",
- XSTRING (TRACE_CLEAR (THREAD, STATE)));
-#endif
-#ifdef TRACE_FLAVOR
- fprintf_unfiltered (file,
- "mips_dump_tdep: TRACE_FLAVOR = %d\n", TRACE_FLAVOR);
-#endif
-#ifdef TRACE_FLAVOR_SIZE
- fprintf_unfiltered (file,
- "mips_dump_tdep: TRACE_FLAVOR_SIZE = %d\n",
- TRACE_FLAVOR_SIZE);
-#endif
-#ifdef TRACE_SET
- fprintf_unfiltered (file,
- "mips_dump_tdep: TRACE_SET # %s\n",
- XSTRING (TRACE_SET (X, STATE)));
-#endif
-#ifdef UNUSED_REGNUM
- fprintf_unfiltered (file,
- "mips_dump_tdep: UNUSED_REGNUM = %d\n", UNUSED_REGNUM);
-#endif
- fprintf_unfiltered (file,
- "mips_dump_tdep: VM_MIN_ADDRESS = %ld\n",
- (long) VM_MIN_ADDRESS);
}
extern initialize_file_ftype _initialize_mips_tdep; /* -Wmissing-prototypes */
mips_abi_string = mips_abi_strings[MIPS_ABI_UNKNOWN];
if (MIPS_ABI_LAST + 1
!= sizeof (mips_abi_strings) / sizeof (mips_abi_strings[0]))
- internal_error (__FILE__, __LINE__, "mips_abi_strings out of sync");
+ internal_error (__FILE__, __LINE__, _("mips_abi_strings out of sync"));
gdbarch_register (bfd_arch_mips, mips_gdbarch_init, mips_dump_tdep);
/* Add root prefix command for all "set mips"/"show mips" commands */
add_prefix_cmd ("mips", no_class, set_mips_command,
- "Various MIPS specific commands.",
+ _("Various MIPS specific commands."),
&setmipscmdlist, "set mips ", 0, &setlist);
add_prefix_cmd ("mips", no_class, show_mips_command,
- "Various MIPS specific commands.",
+ _("Various MIPS specific commands."),
&showmipscmdlist, "show mips ", 0, &showlist);
/* Allow the user to override the saved register size. */
add_setshow_enum_cmd ("saved-gpreg-size", class_obscure,
- size_enums, &mips_abi_regsize_string, "\
-Set size of general purpose registers saved on the stack.\n", "\
-Show size of general purpose registers saved on the stack.\n", "\
+ size_enums, &mips_abi_regsize_string, _("\
+Set size of general purpose registers saved on the stack."), _("\
+Show size of general purpose registers saved on the stack."), _("\
This option can be set to one of:\n\
32 - Force GDB to treat saved GP registers as 32-bit\n\
64 - Force GDB to treat saved GP registers as 64-bit\n\
auto - Allow GDB to use the target's default setting or autodetect the\n\
- saved GP register size from information contained in the executable.\n\
- (default: auto)", "\
-Size of general purpose registers saved on the stack is %s.\n",
- NULL, NULL, &setmipscmdlist, &showmipscmdlist);
+ saved GP register size from information contained in the\n\
+ executable (default)."),
+ NULL,
+ NULL, /* FIXME: i18n: Size of general purpose registers saved on the stack is %s. */
+ &setmipscmdlist, &showmipscmdlist);
/* Allow the user to override the argument stack size. */
add_setshow_enum_cmd ("stack-arg-size", class_obscure,
- size_enums, &mips_stack_argsize_string, "\
-Set the amount of stack space reserved for each argument.\n", "\
-Show the amount of stack space reserved for each argument.\n", "\
+ size_enums, &mips_stack_argsize_string, _("\
+Set the amount of stack space reserved for each argument."), _("\
+Show the amount of stack space reserved for each argument."), _("\
This option can be set to one of:\n\
32 - Force GDB to allocate 32-bit chunks per argument\n\
64 - Force GDB to allocate 64-bit chunks per argument\n\
auto - Allow GDB to determine the correct setting from the current\n\
- target and executable (default)", "\
-The amount of stack space reserved for each argument is %s.\n",
- NULL, NULL, &setmipscmdlist, &showmipscmdlist);
+ target and executable (default)"),
+ NULL,
+ NULL, /* FIXME: i18n: The amount of stack space reserved for each argument is %s. */
+ &setmipscmdlist, &showmipscmdlist);
/* Allow the user to override the ABI. */
- c = add_set_enum_cmd
- ("abi", class_obscure, mips_abi_strings, &mips_abi_string,
- "Set the ABI used by this program.\n"
- "This option can be set to one of:\n"
- " auto - the default ABI associated with the current binary\n"
- " o32\n"
- " o64\n" " n32\n" " n64\n" " eabi32\n" " eabi64", &setmipscmdlist);
- set_cmd_sfunc (c, mips_abi_update);
- add_cmd ("abi", class_obscure, show_mips_abi,
- "Show ABI in use by MIPS target", &showmipscmdlist);
+ add_setshow_enum_cmd ("abi", class_obscure, mips_abi_strings,
+ &mips_abi_string, _("\
+Set the MIPS ABI used by this program."), _("\
+Show the MIPS ABI used by this program."), _("\
+This option can be set to one of:\n\
+ auto - the default ABI associated with the current binary\n\
+ o32\n\
+ o64\n\
+ n32\n\
+ n64\n\
+ eabi32\n\
+ eabi64"),
+ mips_abi_update,
+ show_mips_abi,
+ &setmipscmdlist, &showmipscmdlist);
/* Let the user turn off floating point and set the fence post for
heuristic_proc_start. */
add_prefix_cmd ("mipsfpu", class_support, set_mipsfpu_command,
- "Set use of MIPS floating-point coprocessor.",
+ _("Set use of MIPS floating-point coprocessor."),
&mipsfpulist, "set mipsfpu ", 0, &setlist);
add_cmd ("single", class_support, set_mipsfpu_single_command,
- "Select single-precision MIPS floating-point coprocessor.",
+ _("Select single-precision MIPS floating-point coprocessor."),
&mipsfpulist);
add_cmd ("double", class_support, set_mipsfpu_double_command,
- "Select double-precision MIPS floating-point coprocessor.",
+ _("Select double-precision MIPS floating-point coprocessor."),
&mipsfpulist);
add_alias_cmd ("on", "double", class_support, 1, &mipsfpulist);
add_alias_cmd ("yes", "double", class_support, 1, &mipsfpulist);
add_alias_cmd ("1", "double", class_support, 1, &mipsfpulist);
add_cmd ("none", class_support, set_mipsfpu_none_command,
- "Select no MIPS floating-point coprocessor.", &mipsfpulist);
+ _("Select no MIPS floating-point coprocessor."), &mipsfpulist);
add_alias_cmd ("off", "none", class_support, 1, &mipsfpulist);
add_alias_cmd ("no", "none", class_support, 1, &mipsfpulist);
add_alias_cmd ("0", "none", class_support, 1, &mipsfpulist);
add_cmd ("auto", class_support, set_mipsfpu_auto_command,
- "Select MIPS floating-point coprocessor automatically.",
+ _("Select MIPS floating-point coprocessor automatically."),
&mipsfpulist);
add_cmd ("mipsfpu", class_support, show_mipsfpu_command,
- "Show current use of MIPS floating-point coprocessor target.",
+ _("Show current use of MIPS floating-point coprocessor target."),
&showlist);
/* We really would like to have both "0" and "unlimited" work, but
command.c doesn't deal with that. So make it a var_zinteger
because the user can always use "999999" or some such for unlimited. */
add_setshow_zinteger_cmd ("heuristic-fence-post", class_support,
- &heuristic_fence_post, "\
-Set the distance searched for the start of a function.\n", "\
-Show the distance searched for the start of a function.\n", "\
+ &heuristic_fence_post, _("\
+Set the distance searched for the start of a function."), _("\
+Show the distance searched for the start of a function."), _("\
If you are debugging a stripped executable, GDB needs to search through the\n\
program for the start of a function. This command sets the distance of the\n\
-search. The only need to set it is when debugging a stripped executable.", "\
-The distance searched for the start of a function is %s.\n",
- reinit_frame_cache_sfunc, NULL,
+search. The only need to set it is when debugging a stripped executable."),
+ reinit_frame_cache_sfunc,
+ NULL, /* FIXME: i18n: The distance searched for the start of a function is %s. */
&setlist, &showlist);
/* Allow the user to control whether the upper bits of 64-bit
addresses should be zeroed. */
- add_setshow_auto_boolean_cmd ("mask-address", no_class, &mask_address_var, "\
-Set zeroing of upper 32 bits of 64-bit addresses.", "\
-Show zeroing of upper 32 bits of 64-bit addresses.", "\
+ add_setshow_auto_boolean_cmd ("mask-address", no_class,
+ &mask_address_var, _("\
+Set zeroing of upper 32 bits of 64-bit addresses."), _("\
+Show zeroing of upper 32 bits of 64-bit addresses."), _("\
Use \"on\" to enable the masking, \"off\" to disable it and \"auto\" to \n\
-allow GDB to determine the correct value.\n", "\
-Zerroing of upper 32 bits of 64-bit address is %s.",
- NULL, show_mask_address, &setmipscmdlist, &showmipscmdlist);
+allow GDB to determine the correct value."),
+ NULL, show_mask_address,
+ &setmipscmdlist, &showmipscmdlist);
/* Allow the user to control the size of 32 bit registers within the
raw remote packet. */
add_setshow_boolean_cmd ("remote-mips64-transfers-32bit-regs", class_obscure,
- &mips64_transfers_32bit_regs_p, "\
-Set compatibility with 64-bit MIPS target that transfers 32-bit quantities.", "\
-Show compatibility with 64-bit MIPS target that transfers 32-bit quantities.", "\
+ &mips64_transfers_32bit_regs_p, _("\
+Set compatibility with 64-bit MIPS target that transfers 32-bit quantities."),
+ _("\
+Show compatibility with 64-bit MIPS target that transfers 32-bit quantities."),
+ _("\
Use \"on\" to enable backward compatibility with older MIPS 64 GDB+target\n\
that would transfer 32 bits for some registers (e.g. SR, FSR) and\n\
-64 bits for others. Use \"off\" to disable compatibility mode", "\
-Compatibility with 64-bit MIPS target that transfers 32-bit quantities is %s.",
- set_mips64_transfers_32bit_regs, NULL, &setlist, &showlist);
+64 bits for others. Use \"off\" to disable compatibility mode"),
+ set_mips64_transfers_32bit_regs,
+ NULL, /* FIXME: i18n: Compatibility with 64-bit MIPS target that transfers 32-bit quantities is %s. */
+ &setlist, &showlist);
/* Debug this files internals. */
add_setshow_zinteger_cmd ("mips", class_maintenance,
- &mips_debug, "\
-Set mips debugging.\n", "\
-Show mips debugging.\n", "\
-When non-zero, mips specific debugging is enabled.\n", "\
-Mips debugging is currently %s.\n",
- NULL, NULL,
+ &mips_debug, _("\
+Set mips debugging."), _("\
+Show mips debugging."), _("\
+When non-zero, mips specific debugging is enabled."),
+ NULL,
+ NULL, /* FIXME: i18n: Mips debugging is currently %s. */
&setdebuglist, &showdebuglist);
}