#include "frame-unwind.h"
#include "frame-base.h"
#include "trad-frame.h"
+#include "infcall.h"
+
+static const struct objfile_data *mips_pdr_data;
static void set_reg_offset (CORE_ADDR *saved_regs, int regnum, CORE_ADDR off);
static struct type *mips_register_type (struct gdbarch *gdbarch, int regnum);
};
/* Some MIPS boards don't support floating point while others only
- support single-precision floating-point operations. See also
- FP_REGISTER_DOUBLE. */
+ support single-precision floating-point operations. */
enum mips_fpu_type
{
enum mips_fpu_type mips_fpu_type;
int mips_last_arg_regnum;
int mips_last_fp_arg_regnum;
- int mips_default_saved_regsize;
- int mips_fp_register_double;
- int mips_default_stack_argsize;
int default_mask_address_p;
/* Is the target using 64-bit raw integer registers but only
storing a left-aligned 32-bit value in each? */
}
int
-mips_regsize (struct gdbarch *gdbarch)
+mips_isa_regsize (struct gdbarch *gdbarch)
{
return (gdbarch_bfd_arch_info (gdbarch)->bits_per_word
/ gdbarch_bfd_arch_info (gdbarch)->bits_per_byte);
/* Return the currently configured (or set) saved register size. */
-static const char *mips_saved_regsize_string = size_auto;
+static const char *mips_abi_regsize_string = size_auto;
static unsigned int
-mips_saved_regsize (struct gdbarch_tdep *tdep)
+mips_abi_regsize (struct gdbarch *gdbarch)
{
- if (mips_saved_regsize_string == size_auto)
- return tdep->mips_default_saved_regsize;
- else if (mips_saved_regsize_string == size_64)
+ if (mips_abi_regsize_string == size_auto)
+ switch (mips_abi (gdbarch))
+ {
+ case MIPS_ABI_EABI32:
+ case MIPS_ABI_O32:
+ return 4;
+ case MIPS_ABI_N32:
+ case MIPS_ABI_N64:
+ case MIPS_ABI_O64:
+ case MIPS_ABI_EABI64:
+ return 8;
+ case MIPS_ABI_UNKNOWN:
+ case MIPS_ABI_LAST:
+ default:
+ internal_error (__FILE__, __LINE__, "bad switch");
+ }
+ else if (mips_abi_regsize_string == size_64)
return 8;
- else /* if (mips_saved_regsize_string == size_32) */
+ else /* if (mips_abi_regsize_string == size_32) */
return 4;
}
return 0;
}
-/* Indicate that the ABI makes use of double-precision registers
- provided by the FPU (rather than combining pairs of registers to
- form double-precision values). See also MIPS_FPU_TYPE. */
-#define FP_REGISTER_DOUBLE (gdbarch_tdep (current_gdbarch)->mips_fp_register_double)
-
/* The amount of space reserved on the stack for registers. This is
- different to MIPS_SAVED_REGSIZE as it determines the alignment of
+ different to MIPS_ABI_REGSIZE as it determines the alignment of
data allocated after the registers have run out. */
static const char *mips_stack_argsize_string = size_auto;
static unsigned int
-mips_stack_argsize (struct gdbarch_tdep *tdep)
+mips_stack_argsize (struct gdbarch *gdbarch)
{
if (mips_stack_argsize_string == size_auto)
- return tdep->mips_default_stack_argsize;
+ return mips_abi_regsize (gdbarch);
else if (mips_stack_argsize_string == size_64)
return 8;
else /* if (mips_stack_argsize_string == size_32) */
&& (regnum % NUM_REGS) < mips_regnum (current_gdbarch)->fp0 + 32)
{
/* The floating-point registers raw, or cooked, always match
- mips_regsize(), and also map 1:1, byte for byte. */
+ mips_isa_regsize(), and also map 1:1, byte for byte. */
switch (gdbarch_byte_order (gdbarch))
{
case BFD_ENDIAN_BIG:
- if (mips_regsize (gdbarch) == 4)
+ if (mips_isa_regsize (gdbarch) == 4)
return builtin_type_ieee_single_big;
else
return builtin_type_ieee_double_big;
case BFD_ENDIAN_LITTLE:
- if (mips_regsize (gdbarch) == 4)
+ if (mips_isa_regsize (gdbarch) == 4)
return builtin_type_ieee_single_little;
else
return builtin_type_ieee_double_little;
internal_error (__FILE__, __LINE__, "bad switch");
}
}
- else if (regnum >=
- (NUM_REGS + mips_regnum (current_gdbarch)->fp_control_status)
- && regnum <= NUM_REGS + LAST_EMBED_REGNUM)
- /* The pseudo/cooked view of the embedded registers is always
- 32-bit. The raw view is handled below. */
- return builtin_type_int32;
- else if (regnum >= NUM_REGS && mips_regsize (gdbarch)
- && gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p)
- /* The target, while using a 64-bit register buffer, is only
- transfering 32-bits of each integer register. Reflect this in
- the cooked/pseudo register value. */
- return builtin_type_int32;
- else if (mips_regsize (gdbarch) == 8)
- /* 64-bit ISA. */
- return builtin_type_int64;
+ else if (regnum < NUM_REGS)
+ {
+ /* The raw or ISA registers. These are all sized according to
+ the ISA regsize. */
+ if (mips_isa_regsize (gdbarch) == 4)
+ return builtin_type_int32;
+ else
+ return builtin_type_int64;
+ }
else
- /* 32-bit ISA. */
- return builtin_type_int32;
+ {
+ /* The cooked or ABI registers. These are sized according to
+ the ABI (with a few complications). */
+ if (regnum >= (NUM_REGS
+ + mips_regnum (current_gdbarch)->fp_control_status)
+ && regnum <= NUM_REGS + LAST_EMBED_REGNUM)
+ /* The pseudo/cooked view of the embedded registers is always
+ 32-bit. The raw view is handled below. */
+ return builtin_type_int32;
+ else if (gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p)
+ /* The target, while possibly using a 64-bit register buffer,
+ is only transfering 32-bits of each integer register.
+ Reflect this in the cooked/pseudo (ABI) register value. */
+ return builtin_type_int32;
+ else if (mips_abi_regsize (gdbarch) == 4)
+ /* The ABI is restricted to 32-bit registers (the ISA could be
+ 32- or 64-bit). */
+ return builtin_type_int32;
+ else
+ /* 64-bit ABI. */
+ return builtin_type_int64;
+ }
}
/* TARGET_READ_SP -- Remove useless bits from the stack pointer. */
if (gen_mask & 0x80000000)
{
cache->saved_regs[NUM_REGS + ireg].addr = reg_position;
- reg_position -= mips_saved_regsize (tdep);
+ reg_position -= mips_abi_regsize (gdbarch);
}
}
CORE_ADDR reg_position = (cache->base
+ PROC_REG_OFFSET (proc_desc));
if (inst & 0x20)
- reg_position -= mips_saved_regsize (tdep);
+ reg_position -= mips_abi_regsize (gdbarch);
/* Check if the s0 and s1 registers were pushed on the
stack. */
for (reg = 16; reg < sreg_count + 16; reg++)
{
cache->saved_regs[NUM_REGS + reg].addr = reg_position;
- reg_position -= mips_saved_regsize (tdep);
+ reg_position -= mips_abi_regsize (gdbarch);
}
}
}
for (ireg = MIPS_NUMREGS - 1; float_mask; --ireg, float_mask <<= 1)
if (float_mask & 0x80000000)
{
- if (mips_saved_regsize (tdep) == 4
+ if (mips_abi_regsize (gdbarch) == 4
&& TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
/* On a big endian 32 bit ABI, floating point registers
loop). */
if ((ireg & 1))
cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg]
- .addr = reg_position - mips_saved_regsize (tdep);
+ .addr = reg_position - mips_abi_regsize (gdbarch);
else
cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg]
- .addr = reg_position + mips_saved_regsize (tdep);
+ .addr = reg_position + mips_abi_regsize (gdbarch);
}
else
cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg]
.addr = reg_position;
- reg_position -= mips_saved_regsize (tdep);
+ reg_position -= mips_abi_regsize (gdbarch);
}
cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->pc]
{
static int blurb_printed = 0;
- warning
- ("Warning: GDB can't find the start of the function at 0x%s.",
- paddr_nz (pc));
+ warning ("GDB can't find the start of the function at 0x%s.",
+ paddr_nz (pc));
if (!blurb_printed)
{
{
PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
set_reg_offset (temp_saved_regs, reg, sp + offset);
- offset += mips_saved_regsize (tdep);
+ offset += mips_abi_regsize (current_gdbarch);
}
/* Check if the ra register was pushed on the stack. */
{
PROC_REG_MASK (&temp_proc_desc) |= 1 << RA_REGNUM;
set_reg_offset (temp_saved_regs, RA_REGNUM, sp + offset);
- offset -= mips_saved_regsize (tdep);
+ offset -= mips_abi_regsize (current_gdbarch);
}
/* Check if the s0 and s1 registers were pushed on the stack. */
{
PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
set_reg_offset (temp_saved_regs, reg, sp + offset);
- offset -= mips_saved_regsize (tdep);
+ offset -= mips_abi_regsize (current_gdbarch);
}
}
}
}
else if ((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */
{
- /* Irix 6.2 N32 ABI uses sd instructions for saving $gp and $ra,
- but the register size used is only 32 bits. Make the address
- for the saved register point to the lower 32 bits. */
+ /* Irix 6.2 N32 ABI uses sd instructions for saving $gp and
+ $ra. */
PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
- set_reg_offset (temp_saved_regs, reg,
- sp + low_word + 8 - mips_regsize (current_gdbarch));
+ set_reg_offset (temp_saved_regs, reg, sp + low_word);
}
else if (high_word == 0x27be) /* addiu $30,$sp,size */
{
struct obj_section *sec;
struct mips_objfile_private *priv;
- if (DEPRECATED_PC_IN_CALL_DUMMY (pc, 0, 0))
- return NULL;
-
find_pc_partial_function (pc, NULL, &startaddr, NULL);
if (addrptr)
*addrptr = startaddr;
sec = find_pc_section (pc);
if (sec != NULL)
{
- priv = (struct mips_objfile_private *) sec->objfile->obj_private;
+ priv = (struct mips_objfile_private *) objfile_data (sec->objfile, mips_pdr_data);
/* Search the ".pdr" section generated by GAS. This includes most of
the information normally found in ECOFF PDRs. */
priv = obstack_alloc (&sec->objfile->objfile_obstack,
sizeof (struct mips_objfile_private));
priv->size = 0;
- sec->objfile->obj_private = priv;
+ set_objfile_data (sec->objfile, mips_pdr_data, priv);
}
else if (priv == NULL)
{
else
priv->size = 0;
- sec->objfile->obj_private = priv;
+ set_objfile_data (sec->objfile, mips_pdr_data, priv);
}
the_bfd = NULL;
&& ((MIPS_FPU_TYPE == MIPS_FPU_DOUBLE && (len == 4 || len == 8))
|| (MIPS_FPU_TYPE == MIPS_FPU_SINGLE && len == 4)))
{
- if (!FP_REGISTER_DOUBLE && len == 8)
+ if (mips_abi_regsize (current_gdbarch) < 8 && len == 8)
{
/* We need to break a 64bit float in two 32 bit halves and
- spread them across a floating-point register pair. */
+ spread them across a floating-point register pair. */
lo->buf_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
hi->buf_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 0 : 4;
lo->reg_offset = ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
lo->reg = regnum + 0;
hi->reg = regnum + 1;
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
- && len < mips_saved_regsize (tdep))
+ && len < mips_abi_regsize (current_gdbarch))
{
/* "un-left-justify" the value in the low register */
- lo->reg_offset = mips_saved_regsize (tdep) - len;
+ lo->reg_offset = mips_abi_regsize (current_gdbarch) - len;
lo->len = len;
hi->reg_offset = 0;
hi->len = 0;
}
- else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG && len > mips_saved_regsize (tdep) /* odd-size structs */
- && len < mips_saved_regsize (tdep) * 2
+ else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG && len > mips_abi_regsize (current_gdbarch) /* odd-size structs */
+ && len < mips_abi_regsize (current_gdbarch) * 2
&& (TYPE_CODE (valtype) == TYPE_CODE_STRUCT ||
TYPE_CODE (valtype) == TYPE_CODE_UNION))
{
/* "un-left-justify" the value spread across two registers. */
- lo->reg_offset = 2 * mips_saved_regsize (tdep) - len;
- lo->len = mips_saved_regsize (tdep) - lo->reg_offset;
+ lo->reg_offset = 2 * mips_abi_regsize (current_gdbarch) - len;
+ lo->len = mips_abi_regsize (current_gdbarch) - lo->reg_offset;
hi->reg_offset = 0;
hi->len = len - lo->len;
}
/* Only perform a partial copy of the second register. */
lo->reg_offset = 0;
hi->reg_offset = 0;
- if (len > mips_saved_regsize (tdep))
+ if (len > mips_abi_regsize (current_gdbarch))
{
- lo->len = mips_saved_regsize (tdep);
- hi->len = len - mips_saved_regsize (tdep);
+ lo->len = mips_abi_regsize (current_gdbarch);
+ hi->len = len - mips_abi_regsize (current_gdbarch);
}
else
{
}
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
&& register_size (current_gdbarch, regnum) == 8
- && mips_saved_regsize (tdep) == 4)
+ && mips_abi_regsize (current_gdbarch) == 4)
{
/* Account for the fact that only the least-signficant part
of the register is being used */
mips_eabi_use_struct_convention (int gcc_p, struct type *type)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
- return (TYPE_LENGTH (type) > 2 * mips_saved_regsize (tdep));
+ return (TYPE_LENGTH (type) > 2 * mips_abi_regsize (current_gdbarch));
}
/* Should call_function pass struct by reference?
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
- return (len > mips_saved_regsize (tdep));
+ return (len > mips_abi_regsize (current_gdbarch));
return 0;
}
static CORE_ADDR
-mips_eabi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
passed in registers, but that's OK. */
for (argnum = 0; argnum < nargs; argnum++)
len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
if (mips_debug)
/* The EABI passes structures that do not fit in a register by
reference. */
- if (len > mips_saved_regsize (tdep)
+ if (len > mips_abi_regsize (gdbarch)
&& (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
{
- store_unsigned_integer (valbuf, mips_saved_regsize (tdep),
+ store_unsigned_integer (valbuf, mips_abi_regsize (gdbarch),
VALUE_ADDRESS (arg));
typecode = TYPE_CODE_PTR;
- len = mips_saved_regsize (tdep);
+ len = mips_abi_regsize (gdbarch);
val = valbuf;
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " push");
up before the check to see if there are any FP registers
left. Non MIPS_EABI targets also pass the FP in the integer
registers so also round up normal registers. */
- if (!FP_REGISTER_DOUBLE && fp_register_arg_p (typecode, arg_type))
+ if (mips_abi_regsize (gdbarch) < 8
+ && fp_register_arg_p (typecode, arg_type))
{
if ((float_argreg & 1))
float_argreg++;
if (fp_register_arg_p (typecode, arg_type)
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
{
- if (!FP_REGISTER_DOUBLE && len == 8)
+ if (mips_abi_regsize (gdbarch) < 8 && len == 8)
{
int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
unsigned long regval;
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
- int odd_sized_struct = ((len > mips_saved_regsize (tdep))
- && (len % mips_saved_regsize (tdep) != 0));
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
+ int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
+ && (len % mips_abi_regsize (gdbarch) != 0));
/* Note: Floating-point values that didn't fit into an FP
register are only written to memory. */
{
/* Remember if the argument was written to the stack. */
int stack_used_p = 0;
- int partial_len = (len < mips_saved_regsize (tdep)
- ? len : mips_saved_regsize (tdep));
+ int partial_len = (len < mips_abi_regsize (gdbarch)
+ ? len : mips_abi_regsize (gdbarch));
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " -- partial=%d",
stack_used_p = 1;
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
- if (mips_stack_argsize (tdep) == 8
+ if (mips_stack_argsize (gdbarch) == 8
&& (typecode == TYPE_CODE_INT
|| typecode == TYPE_CODE_PTR
|| typecode == TYPE_CODE_FLT) && len <= 4)
- longword_offset = mips_stack_argsize (tdep) - len;
+ longword_offset = mips_stack_argsize (gdbarch) - len;
else if ((typecode == TYPE_CODE_STRUCT
|| typecode == TYPE_CODE_UNION)
&& (TYPE_LENGTH (arg_type)
- < mips_stack_argsize (tdep)))
- longword_offset = mips_stack_argsize (tdep) - len;
+ < mips_stack_argsize (gdbarch)))
+ longword_offset = mips_stack_argsize (gdbarch) - len;
}
if (mips_debug)
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval,
- mips_saved_regsize (tdep)));
+ mips_abi_regsize (gdbarch)));
write_register (argreg, regval);
argreg++;
}
if (stack_used_p)
stack_offset += align_up (partial_len,
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
}
}
if (mips_debug)
/* N32/N64 ABI stuff. */
static CORE_ADDR
-mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
if (mips_debug)
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
- int odd_sized_struct = ((len > mips_saved_regsize (tdep))
- && (len % mips_saved_regsize (tdep) != 0));
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
+ int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
+ && (len % mips_abi_regsize (gdbarch) != 0));
/* Note: Floating-point values that didn't fit into an FP
register are only written to memory. */
while (len > 0)
{
/* Rememer if the argument was written to the stack. */
int stack_used_p = 0;
- int partial_len = (len < mips_saved_regsize (tdep)
- ? len : mips_saved_regsize (tdep));
+ int partial_len = (len < mips_abi_regsize (gdbarch)
+ ? len : mips_abi_regsize (gdbarch));
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " -- partial=%d",
stack_used_p = 1;
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
- if (mips_stack_argsize (tdep) == 8
+ if (mips_stack_argsize (gdbarch) == 8
&& (typecode == TYPE_CODE_INT
|| typecode == TYPE_CODE_PTR
|| typecode == TYPE_CODE_FLT) && len <= 4)
- longword_offset = mips_stack_argsize (tdep) - len;
+ longword_offset = mips_stack_argsize (gdbarch) - len;
}
if (mips_debug)
cagney/2001-07-23: gdb/179: Also, GCC, when
outputting LE O32 with sizeof (struct) <
- mips_saved_regsize(), generates a left shift as
+ mips_abi_regsize(), generates a left shift as
part of storing the argument in a register a
register (the left shift isn't generated when
- sizeof (struct) >= mips_saved_regsize()). Since
+ sizeof (struct) >= mips_abi_regsize()). Since
it is quite possible that this is GCC
contradicting the LE/O32 ABI, GDB has not been
adjusted to accommodate this. Either someone
accordingly. */
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
- && partial_len < mips_saved_regsize (tdep)
+ && partial_len < mips_abi_regsize (gdbarch)
&& (typecode == TYPE_CODE_STRUCT ||
typecode == TYPE_CODE_UNION))
- regval <<= ((mips_saved_regsize (tdep) - partial_len) *
+ regval <<= ((mips_abi_regsize (gdbarch) - partial_len) *
TARGET_CHAR_BIT);
if (mips_debug)
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval,
- mips_saved_regsize (tdep)));
+ mips_abi_regsize (gdbarch)));
write_register (argreg, regval);
argreg++;
}
if (stack_used_p)
stack_offset += align_up (partial_len,
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
}
}
if (mips_debug)
if (TYPE_CODE (type) == TYPE_CODE_STRUCT
|| TYPE_CODE (type) == TYPE_CODE_UNION
|| TYPE_CODE (type) == TYPE_CODE_ARRAY
- || TYPE_LENGTH (type) > 2 * mips_saved_regsize (tdep))
+ || TYPE_LENGTH (type) > 2 * mips_abi_regsize (gdbarch))
return RETURN_VALUE_STRUCT_CONVENTION;
else if (TYPE_CODE (type) == TYPE_CODE_FLT
&& tdep->mips_fpu_type != MIPS_FPU_NONE)
/* O32 ABI stuff. */
static CORE_ADDR
-mips_o32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
if (mips_debug)
"mips_o32_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
write_register (argreg++, struct_addr);
- stack_offset += mips_stack_argsize (tdep);
+ stack_offset += mips_stack_argsize (gdbarch);
}
/* Now load as many as possible of the first arguments into
up before the check to see if there are any FP registers
left. O32/O64 targets also pass the FP in the integer
registers so also round up normal registers. */
- if (!FP_REGISTER_DOUBLE && fp_register_arg_p (typecode, arg_type))
+ if (mips_abi_regsize (gdbarch) < 8
+ && fp_register_arg_p (typecode, arg_type))
{
if ((float_argreg & 1))
float_argreg++;
if (fp_register_arg_p (typecode, arg_type)
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
{
- if (!FP_REGISTER_DOUBLE && len == 8)
+ if (mips_abi_regsize (gdbarch) < 8 && len == 8)
{
int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
unsigned long regval;
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len));
write_register (argreg, regval);
- argreg += FP_REGISTER_DOUBLE ? 1 : 2;
+ argreg += (mips_abi_regsize (gdbarch) == 8) ? 1 : 2;
}
/* Reserve space for the FP register. */
- stack_offset += align_up (len, mips_stack_argsize (tdep));
+ stack_offset += align_up (len, mips_stack_argsize (gdbarch));
}
else
{
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
- int odd_sized_struct = ((len > mips_saved_regsize (tdep))
- && (len % mips_saved_regsize (tdep) != 0));
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
+ int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
+ && (len % mips_abi_regsize (gdbarch) != 0));
/* Structures should be aligned to eight bytes (even arg registers)
on MIPS_ABI_O32, if their first member has double precision. */
- if (mips_saved_regsize (tdep) < 8
+ if (mips_abi_regsize (gdbarch) < 8
&& mips_type_needs_double_align (arg_type))
{
if ((argreg & 1))
{
/* Remember if the argument was written to the stack. */
int stack_used_p = 0;
- int partial_len = (len < mips_saved_regsize (tdep)
- ? len : mips_saved_regsize (tdep));
+ int partial_len = (len < mips_abi_regsize (gdbarch)
+ ? len : mips_abi_regsize (gdbarch));
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " -- partial=%d",
stack_used_p = 1;
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
- if (mips_stack_argsize (tdep) == 8
+ if (mips_stack_argsize (gdbarch) == 8
&& (typecode == TYPE_CODE_INT
|| typecode == TYPE_CODE_PTR
|| typecode == TYPE_CODE_FLT) && len <= 4)
- longword_offset = mips_stack_argsize (tdep) - len;
+ longword_offset = mips_stack_argsize (gdbarch) - len;
}
if (mips_debug)
{
LONGEST regval = extract_signed_integer (val, partial_len);
/* Value may need to be sign extended, because
- mips_regsize() != mips_saved_regsize(). */
+ mips_isa_regsize() != mips_abi_regsize(). */
/* A non-floating-point argument being passed in a
general register. If a struct or union, and if
cagney/2001-07-23: gdb/179: Also, GCC, when
outputting LE O32 with sizeof (struct) <
- mips_saved_regsize(), generates a left shift as
+ mips_abi_regsize(), generates a left shift as
part of storing the argument in a register a
register (the left shift isn't generated when
- sizeof (struct) >= mips_saved_regsize()). Since
+ sizeof (struct) >= mips_abi_regsize()). Since
it is quite possible that this is GCC
contradicting the LE/O32 ABI, GDB has not been
adjusted to accommodate this. Either someone
identified as such and GDB gets tweaked
accordingly. */
- if (mips_saved_regsize (tdep) < 8
+ if (mips_abi_regsize (gdbarch) < 8
&& TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
- && partial_len < mips_saved_regsize (tdep)
+ && partial_len < mips_abi_regsize (gdbarch)
&& (typecode == TYPE_CODE_STRUCT ||
typecode == TYPE_CODE_UNION))
- regval <<= ((mips_saved_regsize (tdep) - partial_len) *
+ regval <<= ((mips_abi_regsize (gdbarch) - partial_len) *
TARGET_CHAR_BIT);
if (mips_debug)
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval,
- mips_saved_regsize (tdep)));
+ mips_abi_regsize (gdbarch)));
write_register (argreg, regval);
argreg++;
always allocated. */
stack_offset += align_up (partial_len,
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
}
}
if (mips_debug)
int regnum;
for (offset = 0, regnum = V0_REGNUM;
offset < TYPE_LENGTH (type);
- offset += mips_stack_argsize (tdep), regnum++)
+ offset += mips_stack_argsize (gdbarch), regnum++)
{
- int xfer = mips_stack_argsize (tdep);
+ int xfer = mips_stack_argsize (gdbarch);
if (offset + xfer > TYPE_LENGTH (type))
xfer = TYPE_LENGTH (type) - offset;
if (mips_debug)
ABI. */
static CORE_ADDR
-mips_o64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs,
struct value **args, CORE_ADDR sp,
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
if (mips_debug)
"mips_o64_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
write_register (argreg++, struct_addr);
- stack_offset += mips_stack_argsize (tdep);
+ stack_offset += mips_stack_argsize (gdbarch);
}
/* Now load as many as possible of the first arguments into
up before the check to see if there are any FP registers
left. O32/O64 targets also pass the FP in the integer
registers so also round up normal registers. */
- if (!FP_REGISTER_DOUBLE && fp_register_arg_p (typecode, arg_type))
+ if (mips_abi_regsize (gdbarch) < 8
+ && fp_register_arg_p (typecode, arg_type))
{
if ((float_argreg & 1))
float_argreg++;
if (fp_register_arg_p (typecode, arg_type)
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
{
- if (!FP_REGISTER_DOUBLE && len == 8)
+ if (mips_abi_regsize (gdbarch) < 8 && len == 8)
{
int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
unsigned long regval;
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len));
write_register (argreg, regval);
- argreg += FP_REGISTER_DOUBLE ? 1 : 2;
+ argreg += (mips_abi_regsize (gdbarch) == 8) ? 1 : 2;
}
/* Reserve space for the FP register. */
- stack_offset += align_up (len, mips_stack_argsize (tdep));
+ stack_offset += align_up (len, mips_stack_argsize (gdbarch));
}
else
{
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
- int odd_sized_struct = ((len > mips_saved_regsize (tdep))
- && (len % mips_saved_regsize (tdep) != 0));
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
+ int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
+ && (len % mips_abi_regsize (gdbarch) != 0));
/* Structures should be aligned to eight bytes (even arg registers)
on MIPS_ABI_O32, if their first member has double precision. */
- if (mips_saved_regsize (tdep) < 8
+ if (mips_abi_regsize (gdbarch) < 8
&& mips_type_needs_double_align (arg_type))
{
if ((argreg & 1))
{
/* Remember if the argument was written to the stack. */
int stack_used_p = 0;
- int partial_len = (len < mips_saved_regsize (tdep)
- ? len : mips_saved_regsize (tdep));
+ int partial_len = (len < mips_abi_regsize (gdbarch)
+ ? len : mips_abi_regsize (gdbarch));
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " -- partial=%d",
stack_used_p = 1;
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
- if (mips_stack_argsize (tdep) == 8
+ if (mips_stack_argsize (gdbarch) == 8
&& (typecode == TYPE_CODE_INT
|| typecode == TYPE_CODE_PTR
|| typecode == TYPE_CODE_FLT) && len <= 4)
- longword_offset = mips_stack_argsize (tdep) - len;
+ longword_offset = mips_stack_argsize (gdbarch) - len;
}
if (mips_debug)
{
LONGEST regval = extract_signed_integer (val, partial_len);
/* Value may need to be sign extended, because
- mips_regsize() != mips_saved_regsize(). */
+ mips_isa_regsize() != mips_abi_regsize(). */
/* A non-floating-point argument being passed in a
general register. If a struct or union, and if
cagney/2001-07-23: gdb/179: Also, GCC, when
outputting LE O32 with sizeof (struct) <
- mips_saved_regsize(), generates a left shift as
+ mips_abi_regsize(), generates a left shift as
part of storing the argument in a register a
register (the left shift isn't generated when
- sizeof (struct) >= mips_saved_regsize()). Since
+ sizeof (struct) >= mips_abi_regsize()). Since
it is quite possible that this is GCC
contradicting the LE/O32 ABI, GDB has not been
adjusted to accommodate this. Either someone
identified as such and GDB gets tweaked
accordingly. */
- if (mips_saved_regsize (tdep) < 8
+ if (mips_abi_regsize (gdbarch) < 8
&& TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
- && partial_len < mips_saved_regsize (tdep)
+ && partial_len < mips_abi_regsize (gdbarch)
&& (typecode == TYPE_CODE_STRUCT ||
typecode == TYPE_CODE_UNION))
- regval <<= ((mips_saved_regsize (tdep) - partial_len) *
+ regval <<= ((mips_abi_regsize (gdbarch) - partial_len) *
TARGET_CHAR_BIT);
if (mips_debug)
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval,
- mips_saved_regsize (tdep)));
+ mips_abi_regsize (gdbarch)));
write_register (argreg, regval);
argreg++;
always allocated. */
stack_offset += align_up (partial_len,
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
}
}
if (mips_debug)
struct gdbarch *gdbarch = get_frame_arch (frame);
/* do values for GP (int) regs */
char raw_buffer[MAX_REGISTER_SIZE];
- int ncols = (mips_regsize (gdbarch) == 8 ? 4 : 8); /* display cols per row */
+ int ncols = (mips_abi_regsize (gdbarch) == 8 ? 4 : 8); /* display cols per row */
int col, byte;
int regnum;
TYPE_CODE_FLT)
break; /* end the row: reached FP register */
fprintf_filtered (file,
- mips_regsize (current_gdbarch) == 8 ? "%17s" : "%9s",
+ mips_abi_regsize (current_gdbarch) == 8 ? "%17s" : "%9s",
REGISTER_NAME (regnum));
col++;
}
error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
/* pad small registers */
for (byte = 0;
- byte < (mips_regsize (current_gdbarch)
+ byte < (mips_abi_regsize (current_gdbarch)
- register_size (current_gdbarch, regnum)); byte++)
printf_filtered (" ");
/* Now print the register value in hex, endian order. */
return mips32_skip_prologue (pc);
}
-/* Exported procedure: Is PC in the signal trampoline code */
-
-static int
-mips_pc_in_sigtramp (CORE_ADDR pc, char *ignore)
-{
- if (sigtramp_address == 0)
- fixup_sigtramp ();
- return (pc >= sigtramp_address && pc < sigtramp_end);
-}
-
/* Root of all "set mips "/"show mips " commands. This will eventually be
used for all MIPS-specific commands. */
if (found_abi == MIPS_ABI_UNKNOWN && info.abfd != NULL)
bfd_map_over_sections (info.abfd, mips_find_abi_section, &found_abi);
- /* If we have no usefu BFD information, use the ABI from the last
+ /* If we have no useful BFD information, use the ABI from the last
MIPS architecture (if there is one). */
if (found_abi == MIPS_ABI_UNKNOWN && info.abfd == NULL && arches != NULL)
found_abi = gdbarch_tdep (arches->gdbarch)->found_abi;
case bfd_mach_mips3900:
case bfd_mach_mips4100:
case bfd_mach_mips4111:
+ case bfd_mach_mips4120:
fpu_type = MIPS_FPU_NONE;
break;
case bfd_mach_mips4650:
case MIPS_ABI_O32:
set_gdbarch_push_dummy_call (gdbarch, mips_o32_push_dummy_call);
set_gdbarch_return_value (gdbarch, mips_o32_return_value);
- tdep->mips_default_saved_regsize = 4;
- tdep->mips_default_stack_argsize = 4;
- tdep->mips_fp_register_double = 0;
tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1;
tdep->default_mask_address_p = 0;
mips_o64_store_return_value);
set_gdbarch_deprecated_extract_return_value (gdbarch,
mips_o64_extract_return_value);
- tdep->mips_default_saved_regsize = 8;
- tdep->mips_default_stack_argsize = 8;
- tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1;
tdep->default_mask_address_p = 0;
set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32);
set_gdbarch_long_long_bit (gdbarch, 64);
- set_gdbarch_use_struct_convention (gdbarch,
- always_use_struct_convention);
+ set_gdbarch_deprecated_use_struct_convention (gdbarch, always_use_struct_convention);
break;
case MIPS_ABI_EABI32:
set_gdbarch_push_dummy_call (gdbarch, mips_eabi_push_dummy_call);
mips_eabi_store_return_value);
set_gdbarch_deprecated_extract_return_value (gdbarch,
mips_eabi_extract_return_value);
- tdep->mips_default_saved_regsize = 4;
- tdep->mips_default_stack_argsize = 4;
- tdep->mips_fp_register_double = 0;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
set_gdbarch_long_long_bit (gdbarch, 64);
set_gdbarch_deprecated_reg_struct_has_addr
(gdbarch, mips_eabi_reg_struct_has_addr);
- set_gdbarch_use_struct_convention (gdbarch,
- mips_eabi_use_struct_convention);
+ set_gdbarch_deprecated_use_struct_convention (gdbarch, mips_eabi_use_struct_convention);
break;
case MIPS_ABI_EABI64:
set_gdbarch_push_dummy_call (gdbarch, mips_eabi_push_dummy_call);
mips_eabi_store_return_value);
set_gdbarch_deprecated_extract_return_value (gdbarch,
mips_eabi_extract_return_value);
- tdep->mips_default_saved_regsize = 8;
- tdep->mips_default_stack_argsize = 8;
- tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
set_gdbarch_long_long_bit (gdbarch, 64);
set_gdbarch_deprecated_reg_struct_has_addr
(gdbarch, mips_eabi_reg_struct_has_addr);
- set_gdbarch_use_struct_convention (gdbarch,
- mips_eabi_use_struct_convention);
+ set_gdbarch_deprecated_use_struct_convention (gdbarch, mips_eabi_use_struct_convention);
break;
case MIPS_ABI_N32:
set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call);
set_gdbarch_return_value (gdbarch, mips_n32n64_return_value);
- tdep->mips_default_saved_regsize = 8;
- tdep->mips_default_stack_argsize = 8;
- tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
case MIPS_ABI_N64:
set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call);
set_gdbarch_return_value (gdbarch, mips_n32n64_return_value);
- tdep->mips_default_saved_regsize = 8;
- tdep->mips_default_stack_argsize = 8;
- tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
set_gdbarch_register_type (gdbarch, mips_register_type);
set_gdbarch_print_registers_info (gdbarch, mips_print_registers_info);
- set_gdbarch_deprecated_pc_in_sigtramp (gdbarch, mips_pc_in_sigtramp);
set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips);
mips_mask_address_p (tdep),
tdep->default_mask_address_p);
}
- fprintf_unfiltered (file,
- "mips_dump_tdep: FP_REGISTER_DOUBLE = %d\n",
- FP_REGISTER_DOUBLE);
fprintf_unfiltered (file,
"mips_dump_tdep: MIPS_DEFAULT_FPU_TYPE = %d (%s)\n",
MIPS_DEFAULT_FPU_TYPE,
: MIPS_FPU_TYPE == MIPS_FPU_SINGLE ? "single"
: MIPS_FPU_TYPE == MIPS_FPU_DOUBLE ? "double"
: "???"));
- fprintf_unfiltered (file,
- "mips_dump_tdep: FP_REGISTER_DOUBLE = %d\n",
- FP_REGISTER_DOUBLE);
fprintf_unfiltered (file,
"mips_dump_tdep: mips_stack_argsize() = %d\n",
- mips_stack_argsize (tdep));
+ mips_stack_argsize (current_gdbarch));
fprintf_unfiltered (file, "mips_dump_tdep: A0_REGNUM = %d\n", A0_REGNUM);
fprintf_unfiltered (file,
"mips_dump_tdep: ADDR_BITS_REMOVE # %s\n",
fprintf_unfiltered (file,
"mips_dump_tdep: MIPS_NUMREGS = %d\n", MIPS_NUMREGS);
fprintf_unfiltered (file,
- "mips_dump_tdep: mips_saved_regsize() = %d\n",
- mips_saved_regsize (tdep));
+ "mips_dump_tdep: mips_abi_regsize() = %d\n",
+ mips_abi_regsize (current_gdbarch));
fprintf_unfiltered (file,
"mips_dump_tdep: PRID_REGNUM = %d\n", PRID_REGNUM);
fprintf_unfiltered (file,
gdbarch_register (bfd_arch_mips, mips_gdbarch_init, mips_dump_tdep);
+ mips_pdr_data = register_objfile_data ();
+
/* Add root prefix command for all "set mips"/"show mips" commands */
add_prefix_cmd ("mips", no_class, set_mips_command,
"Various MIPS specific commands.",
add_show_from_set (add_set_enum_cmd ("saved-gpreg-size",
class_obscure,
size_enums,
- &mips_saved_regsize_string, "\
+ &mips_abi_regsize_string, "\
Set size of general purpose registers saved on the stack.\n\
This option can be set to one of:\n\
32 - Force GDB to treat saved GP registers as 32-bit\n\
projects / deliverable / binutils-gdb.git / blobdiff