Create tdep->rx_psw_type and tdep->rx_fpsw_type lazily

[deliverable/binutils-gdb.git] / gdb / mn10300-tdep.c

diff --git a/gdb/mn10300-tdep.c b/gdb/mn10300-tdep.c
index 9ef88a8311c31a16fdfdc559cc921894b7b54a5a..542ef407623377f98594659996d4ce43a401e6fe 100644 (file)
--- a/gdb/mn10300-tdep.c
+++ b/gdb/mn10300-tdep.c
@@ -322,15 +322,9 @@ mn10300_write_pc (struct regcache *regcache, CORE_ADDR val)
    The Matsushita mn10x00 processors have single byte instructions
    so we need a single byte breakpoint.  Matsushita hasn't defined
    one, so we defined it ourselves.  */
+constexpr gdb_byte mn10300_break_insn[] = {0xff};
 
-static const unsigned char *
-mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
-                           int *bp_size)
-{
-  static gdb_byte breakpoint[] = {0xff};
-  *bp_size = 1;
-  return breakpoint;
-}
+typedef BP_MANIPULATION (mn10300_break_insn) mn10300_breakpoint;
 
 /* Model the semantics of pushing a register onto the stack.  This
    is a helper function for mn10300_analyze_prologue, below.  */
@@ -1444,7 +1438,10 @@ mn10300_gdbarch_init (struct gdbarch_info info,
   /* Stack unwinding.  */
   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
   /* Breakpoints.  */
-  set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc);
+  set_gdbarch_breakpoint_kind_from_pc (gdbarch,
+                                      mn10300_breakpoint::kind_from_pc);
+  set_gdbarch_sw_breakpoint_from_kind (gdbarch,
+                                      mn10300_breakpoint::bp_from_kind);
   /* decr_pc_after_break?  */
   /* Disassembly.  */
   set_gdbarch_print_insn (gdbarch, print_insn_mn10300);