return read_memory_integer (read_register (SP_REGNUM), 4);
}
-void
+static void
mn10300_extract_return_value (struct type *type, char *regbuf, char *valbuf)
{
if (TYPE_CODE (type) == TYPE_CODE_PTR)
if (fi == NULL || movm_args == 0)
return;
- if (movm_args & 0x10)
+ if (movm_args & movm_other_bit)
+ {
+ /* The `other' bit leaves a blank area of four bytes at the
+ beginning of its block of saved registers, making it 32 bytes
+ long in total. */
+ fi->saved_regs[LAR_REGNUM] = fi->frame + offset + 4;
+ fi->saved_regs[LIR_REGNUM] = fi->frame + offset + 8;
+ fi->saved_regs[MDR_REGNUM] = fi->frame + offset + 12;
+ fi->saved_regs[A0_REGNUM + 1] = fi->frame + offset + 16;
+ fi->saved_regs[A0_REGNUM] = fi->frame + offset + 20;
+ fi->saved_regs[D0_REGNUM + 1] = fi->frame + offset + 24;
+ fi->saved_regs[D0_REGNUM] = fi->frame + offset + 28;
+ offset += 32;
+ }
+ if (movm_args & movm_a3_bit)
{
fi->saved_regs[A3_REGNUM] = fi->frame + offset;
offset += 4;
}
- if (movm_args & 0x20)
+ if (movm_args & movm_a2_bit)
{
fi->saved_regs[A2_REGNUM] = fi->frame + offset;
offset += 4;
}
- if (movm_args & 0x40)
+ if (movm_args & movm_d3_bit)
{
fi->saved_regs[D3_REGNUM] = fi->frame + offset;
offset += 4;
}
- if (movm_args & 0x80)
+ if (movm_args & movm_d2_bit)
{
fi->saved_regs[D2_REGNUM] = fi->frame + offset;
offset += 4;
}
- if (AM33_MODE && movm_args & 0x02)
+ if (AM33_MODE)
{
- fi->saved_regs[E0_REGNUM + 5] = fi->frame + offset;
- fi->saved_regs[E0_REGNUM + 4] = fi->frame + offset + 4;
- fi->saved_regs[E0_REGNUM + 3] = fi->frame + offset + 8;
- fi->saved_regs[E0_REGNUM + 2] = fi->frame + offset + 12;
+ if (movm_args & movm_exother_bit)
+ {
+ fi->saved_regs[MCVF_REGNUM] = fi->frame + offset;
+ fi->saved_regs[MCRL_REGNUM] = fi->frame + offset + 4;
+ fi->saved_regs[MCRH_REGNUM] = fi->frame + offset + 8;
+ fi->saved_regs[MDRQ_REGNUM] = fi->frame + offset + 12;
+ fi->saved_regs[E0_REGNUM + 1] = fi->frame + offset + 16;
+ fi->saved_regs[E0_REGNUM + 0] = fi->frame + offset + 20;
+ offset += 24;
+ }
+ if (movm_args & movm_exreg1_bit)
+ {
+ fi->saved_regs[E0_REGNUM + 7] = fi->frame + offset;
+ fi->saved_regs[E0_REGNUM + 6] = fi->frame + offset + 4;
+ fi->saved_regs[E0_REGNUM + 5] = fi->frame + offset + 8;
+ fi->saved_regs[E0_REGNUM + 4] = fi->frame + offset + 12;
+ offset += 16;
+ }
+ if (movm_args & movm_exreg0_bit)
+ {
+ fi->saved_regs[E0_REGNUM + 3] = fi->frame + offset;
+ fi->saved_regs[E0_REGNUM + 2] = fi->frame + offset + 4;
+ offset += 8;
+ }
}
}
return addr;
}
+
+/* Function: saved_regs_size
+ Return the size in bytes of the register save area, based on the
+ saved_regs array in FI. */
+static int
+saved_regs_size (struct frame_info *fi)
+{
+ int adjust = 0;
+ int i;
+
+ /* Reserve four bytes for every register saved. */
+ for (i = 0; i < NUM_REGS; i++)
+ if (fi->saved_regs[i])
+ adjust += 4;
+
+ /* If we saved LIR, then it's most likely we used a `movm'
+ instruction with the `other' bit set, in which case the SP is
+ decremented by an extra four bytes, "to simplify calculation
+ of the transfer area", according to the processor manual. */
+ if (fi->saved_regs[LIR_REGNUM])
+ adjust += 4;
+
+ return adjust;
+}
+
+
/* Function: frame_chain
Figure out and return the caller's frame pointer given current
frame_info struct.
}
else
{
- int adjust = 0;
-
- adjust += (fi->saved_regs[D2_REGNUM] ? 4 : 0);
- adjust += (fi->saved_regs[D3_REGNUM] ? 4 : 0);
- adjust += (fi->saved_regs[A2_REGNUM] ? 4 : 0);
- adjust += (fi->saved_regs[A3_REGNUM] ? 4 : 0);
- if (AM33_MODE)
- {
- adjust += (fi->saved_regs[E0_REGNUM + 5] ? 4 : 0);
- adjust += (fi->saved_regs[E0_REGNUM + 4] ? 4 : 0);
- adjust += (fi->saved_regs[E0_REGNUM + 3] ? 4 : 0);
- adjust += (fi->saved_regs[E0_REGNUM + 2] ? 4 : 0);
- }
+ int adjust = saved_regs_size (fi);
/* Our caller does not have a frame pointer. So his frame starts
at the base of our frame (fi->frame) + register save space
static CORE_ADDR
mn10300_frame_saved_pc (struct frame_info *fi)
{
- int adjust = 0;
-
- adjust += (fi->saved_regs[D2_REGNUM] ? 4 : 0);
- adjust += (fi->saved_regs[D3_REGNUM] ? 4 : 0);
- adjust += (fi->saved_regs[A2_REGNUM] ? 4 : 0);
- adjust += (fi->saved_regs[A3_REGNUM] ? 4 : 0);
- if (AM33_MODE)
- {
- adjust += (fi->saved_regs[E0_REGNUM + 5] ? 4 : 0);
- adjust += (fi->saved_regs[E0_REGNUM + 4] ? 4 : 0);
- adjust += (fi->saved_regs[E0_REGNUM + 3] ? 4 : 0);
- adjust += (fi->saved_regs[E0_REGNUM + 2] ? 4 : 0);
- }
+ int adjust = saved_regs_size (fi);
return (read_memory_integer (fi->frame + adjust, REGISTER_SIZE));
}
return 4;
}
+/* If DWARF2 is a register number appearing in Dwarf2 debug info, then
+ mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
+ register number. Why don't Dwarf2 and GDB use the same numbering?
+ Who knows? But since people have object files lying around with
+ the existing Dwarf2 numbering, and other people have written stubs
+ to work with the existing GDB, neither of them can change. So we
+ just have to cope. */
+static int
+mn10300_dwarf2_reg_to_regnum (int dwarf2)
+{
+ /* This table is supposed to be shaped like the REGISTER_NAMES
+ initializer in gcc/config/mn10300/mn10300.h. Registers which
+ appear in GCC's numbering, but have no counterpart in GDB's
+ world, are marked with a -1. */
+ static int dwarf2_to_gdb[] = {
+ 0, 1, 2, 3, 4, 5, 6, 7, -1, 8,
+ 15, 16, 17, 18, 19, 20, 21, 22
+ };
+ int gdb;
+
+ if (dwarf2 < 0
+ || dwarf2 >= (sizeof (dwarf2_to_gdb) / sizeof (dwarf2_to_gdb[0]))
+ || dwarf2_to_gdb[dwarf2] == -1)
+ internal_error (__FILE__, __LINE__,
+ "bogus register number in debug info: %d", dwarf2);
+
+ return dwarf2_to_gdb[dwarf2];
+}
+
static void
mn10300_print_register (const char *name, int regnum, int reg_width)
{
set_gdbarch_max_register_virtual_size (gdbarch, 4);
set_gdbarch_register_virtual_size (gdbarch, mn10300_register_virtual_size);
set_gdbarch_register_virtual_type (gdbarch, mn10300_register_virtual_type);
+ set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
set_gdbarch_do_registers_info (gdbarch, mn10300_do_registers_info);
set_gdbarch_fp_regnum (gdbarch, 31);
/* Calling functions in the inferior from GDB. */
set_gdbarch_call_dummy_p (gdbarch, 1);
- set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 0);
+ set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
+ set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
set_gdbarch_call_dummy_address (gdbarch, entry_point_address);