/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
- Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
- 2007, 2008, 2009 Free Software Foundation, Inc.
+ Copyright (C) 1996-2018 Free Software Foundation, Inc.
This file is part of GDB.
#include "dis-asm.h"
#include "gdbtypes.h"
#include "regcache.h"
-#include "gdb_string.h"
-#include "gdb_assert.h"
-#include "gdbcore.h" /* for write_memory_unsigned_integer */
+#include "gdbcore.h" /* For write_memory_unsigned_integer. */
#include "value.h"
-#include "gdbtypes.h"
#include "frame.h"
#include "frame-unwind.h"
#include "frame-base.h"
/* The am33-2 has 64 registers. */
#define MN10300_MAX_NUM_REGS 64
+/* Big enough to hold the size of the largest register in bytes. */
+#define MN10300_MAX_REGISTER_SIZE 64
+
/* This structure holds the results of a prologue analysis. */
struct mn10300_prologue
{
case TYPE_CODE_FLT:
case TYPE_CODE_PTR:
case TYPE_CODE_REF:
+ case TYPE_CODE_RVALUE_REF:
return TYPE_LENGTH (type);
case TYPE_CODE_COMPLEX:
static void
mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type,
- struct regcache *regcache, const void *valbuf)
+ struct regcache *regcache, const gdb_byte *valbuf)
{
int len = TYPE_LENGTH (type);
int reg, regsz;
regcache_raw_write (regcache, reg, valbuf);
gdb_assert (regsz == register_size (gdbarch, reg + 1));
regcache_raw_write_part (regcache, reg+1, 0,
- len - regsz, (char *) valbuf + regsz);
+ len - regsz, valbuf + regsz);
}
else
internal_error (__FILE__, __LINE__,
mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
struct regcache *regcache, void *valbuf)
{
- char buf[MAX_REGISTER_SIZE];
+ gdb_byte buf[MN10300_MAX_REGISTER_SIZE];
int len = TYPE_LENGTH (type);
int reg, regsz;
reg = 0;
regsz = register_size (gdbarch, reg);
+ gdb_assert (regsz <= MN10300_MAX_REGISTER_SIZE);
if (len <= regsz)
{
regcache_raw_read (regcache, reg, buf);
from WRITEBUF into REGCACHE. */
static enum return_value_convention
-mn10300_return_value (struct gdbarch *gdbarch, struct type *func_type,
+mn10300_return_value (struct gdbarch *gdbarch, struct value *function,
struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
return RETURN_VALUE_REGISTER_CONVENTION;
}
-static char *
-register_name (int reg, char **regs, long sizeof_regs)
+static const char *
+register_name (int reg, const char **regs, long sizeof_regs)
{
if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
return NULL;
static const char *
mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
{
- static char *regs[] =
+ static const char *regs[] =
{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
"sp", "pc", "mdr", "psw", "lir", "lar", "", "",
"", "", "", "", "", "", "", "",
static const char *
am33_register_name (struct gdbarch *gdbarch, int reg)
{
- static char *regs[] =
+ static const char *regs[] =
{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
"sp", "pc", "mdr", "psw", "lir", "lar", "",
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
static const char *
am33_2_register_name (struct gdbarch *gdbarch, int reg)
{
- static char *regs[] =
+ static const char *regs[] =
{
"d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
"sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
return builtin_type (gdbarch)->builtin_int;
}
-static CORE_ADDR
-mn10300_read_pc (struct regcache *regcache)
-{
- ULONGEST val;
- regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val);
- return val;
-}
-
-static void
-mn10300_write_pc (struct regcache *regcache, CORE_ADDR val)
-{
- regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val);
-}
-
/* The breakpoint instruction must be the same size as the smallest
instruction in the instruction set.
The Matsushita mn10x00 processors have single byte instructions
so we need a single byte breakpoint. Matsushita hasn't defined
one, so we defined it ourselves. */
+constexpr gdb_byte mn10300_break_insn[] = {0xff};
-const static unsigned char *
-mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
- int *bp_size)
-{
- static char breakpoint[] = {0xff};
- *bp_size = 1;
- return breakpoint;
-}
+typedef BP_MANIPULATION (mn10300_break_insn) mn10300_breakpoint;
/* Model the semantics of pushing a register onto the stack. This
is a helper function for mn10300_analyze_prologue, below. */
push_reg (pv_t *regs, struct pv_area *stack, int regnum)
{
regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
- pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]);
+ stack->store (regs[E_SP_REGNUM], 4, regs[regnum]);
}
/* Translate an "r" register number extracted from an instruction encoding
return E_E0_REGNUM + rreg;
}
-/* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
+/* Find saved registers in a 'struct pv_area'; we pass this to pv_area::scan.
If VALUE is a saved register, ADDR says it was saved at a constant
offset from the frame base, and SIZE indicates that the whole
struct mn10300_prologue *result)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- CORE_ADDR pc, next_pc;
+ CORE_ADDR pc;
int rn;
pv_t regs[MN10300_MAX_NUM_REGS];
- struct pv_area *stack;
- struct cleanup *back_to;
CORE_ADDR after_last_frame_setup_insn = start_pc;
int am33_mode = AM33_MODE (gdbarch);
regs[rn] = pv_register (rn, 0);
result->reg_offset[rn] = 1;
}
- stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
- back_to = make_cleanup_free_pv_area (stack);
+ pv_area stack (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
- /* The typical call instruction will have saved the return address on the
- stack. Space for the return address has already been preallocated in
- the caller's frame. It's possible, such as when using -mrelax with gcc
- that other registers were saved as well. If this happens, we really
- have no chance of deciphering the frame. DWARF info can save the day
- when this happens. */
- pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
+ /* The typical call instruction will have saved the return address on the
+ stack. Space for the return address has already been preallocated in
+ the caller's frame. It's possible, such as when using -mrelax with gcc
+ that other registers were saved as well. If this happens, we really
+ have no chance of deciphering the frame. DWARF info can save the day
+ when this happens. */
+ stack.store (regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
pc = start_pc;
while (pc < limit_pc)
if ((save_mask & movm_exreg0_bit) && am33_mode)
{
- push_reg (regs, stack, E_E2_REGNUM);
- push_reg (regs, stack, E_E3_REGNUM);
+ push_reg (regs, &stack, E_E2_REGNUM);
+ push_reg (regs, &stack, E_E3_REGNUM);
}
if ((save_mask & movm_exreg1_bit) && am33_mode)
{
- push_reg (regs, stack, E_E4_REGNUM);
- push_reg (regs, stack, E_E5_REGNUM);
- push_reg (regs, stack, E_E6_REGNUM);
- push_reg (regs, stack, E_E7_REGNUM);
+ push_reg (regs, &stack, E_E4_REGNUM);
+ push_reg (regs, &stack, E_E5_REGNUM);
+ push_reg (regs, &stack, E_E6_REGNUM);
+ push_reg (regs, &stack, E_E7_REGNUM);
}
if ((save_mask & movm_exother_bit) && am33_mode)
{
- push_reg (regs, stack, E_E0_REGNUM);
- push_reg (regs, stack, E_E1_REGNUM);
- push_reg (regs, stack, E_MDRQ_REGNUM);
- push_reg (regs, stack, E_MCRH_REGNUM);
- push_reg (regs, stack, E_MCRL_REGNUM);
- push_reg (regs, stack, E_MCVF_REGNUM);
+ push_reg (regs, &stack, E_E0_REGNUM);
+ push_reg (regs, &stack, E_E1_REGNUM);
+ push_reg (regs, &stack, E_MDRQ_REGNUM);
+ push_reg (regs, &stack, E_MCRH_REGNUM);
+ push_reg (regs, &stack, E_MCRL_REGNUM);
+ push_reg (regs, &stack, E_MCVF_REGNUM);
}
if (save_mask & movm_d2_bit)
- push_reg (regs, stack, E_D2_REGNUM);
+ push_reg (regs, &stack, E_D2_REGNUM);
if (save_mask & movm_d3_bit)
- push_reg (regs, stack, E_D3_REGNUM);
+ push_reg (regs, &stack, E_D3_REGNUM);
if (save_mask & movm_a2_bit)
- push_reg (regs, stack, E_A2_REGNUM);
+ push_reg (regs, &stack, E_A2_REGNUM);
if (save_mask & movm_a3_bit)
- push_reg (regs, stack, E_A3_REGNUM);
+ push_reg (regs, &stack, E_A3_REGNUM);
if (save_mask & movm_other_bit)
{
- push_reg (regs, stack, E_D0_REGNUM);
- push_reg (regs, stack, E_D1_REGNUM);
- push_reg (regs, stack, E_A0_REGNUM);
- push_reg (regs, stack, E_A1_REGNUM);
- push_reg (regs, stack, E_MDR_REGNUM);
- push_reg (regs, stack, E_LIR_REGNUM);
- push_reg (regs, stack, E_LAR_REGNUM);
+ push_reg (regs, &stack, E_D0_REGNUM);
+ push_reg (regs, &stack, E_D1_REGNUM);
+ push_reg (regs, &stack, E_A0_REGNUM);
+ push_reg (regs, &stack, E_A1_REGNUM);
+ push_reg (regs, &stack, E_MDR_REGNUM);
+ push_reg (regs, &stack, E_LIR_REGNUM);
+ push_reg (regs, &stack, E_LAR_REGNUM);
/* The `other' bit leaves a blank area of four bytes at
the beginning of its block of saved registers, making
it 32 bytes long in total. */
rN = buf[0] & 0x0f;
fsM = (Y << 4) | sM;
- pv_area_store (stack, regs[translate_rreg (rN)], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[translate_rreg (rN)], 4,
+ regs[E_FS0_REGNUM + fsM]);
pc += 3;
}
sM = (buf[0] & 0xf0) >> 4;
fsM = (Y << 4) | sM;
- pv_area_store (stack, regs[E_SP_REGNUM], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[E_SP_REGNUM], 4,
+ regs[E_FS0_REGNUM + fsM]);
pc += 3;
}
Z = (buf[1] & 0x02) >> 1;
fsM = (Z << 4) | sM;
- pv_area_store (stack,
- pv_add (regs[translate_rreg (rN)],
- regs[translate_rreg (rI)]),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add (regs[translate_rreg (rN)],
+ regs[translate_rreg (rI)]),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d8 = extract_signed_integer (&buf[1], 1, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d8),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d8),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d24 = extract_signed_integer (&buf[1], 3, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d24),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d24),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 6;
}
fsM = (Y << 4) | sM;
d32 = extract_signed_integer (&buf[1], 4, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d32),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d32),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 7;
}
fsM = (Y << 4) | sM;
d8 = extract_signed_integer (&buf[1], 1, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d8),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d8),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d24 = extract_signed_integer (&buf[1], 3, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d24),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d24),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 6;
}
fsM = (Y << 4) | sM;
d32 = extract_signed_integer (&buf[1], 4, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d32),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d32),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 7;
}
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4,
+ regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
pc += 3;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
pc += 4;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
pc += 6;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
pc += 7;
}
/* Record where all the registers were saved. */
- pv_area_scan (stack, check_for_saved, (void *) result);
+ stack.scan (check_for_saved, (void *) result);
result->prologue_end = after_last_frame_setup_insn;
-
- do_cleanups (back_to);
}
/* Function: skip_prologue
static CORE_ADDR
mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
{
- char *name;
+ const char *name;
CORE_ADDR func_addr, func_end;
struct mn10300_prologue p;
stop_addr = func_start;
mn10300_analyze_prologue (get_frame_arch (this_frame),
- func_start, stop_addr, *this_prologue_cache);
+ func_start, stop_addr,
+ ((struct mn10300_prologue *)
+ *this_prologue_cache));
}
- return *this_prologue_cache;
+ return (struct mn10300_prologue *) *this_prologue_cache;
}
/* Given the next frame and a prologue cache, return this frame's
void **this_prologue_cache,
struct frame_id *this_id)
{
- *this_id = frame_id_build (mn10300_frame_base (this_frame, this_prologue_cache),
+ *this_id = frame_id_build (mn10300_frame_base (this_frame,
+ this_prologue_cache),
get_frame_func (this_frame));
}
mn10300_frame_prev_register (struct frame_info *this_frame,
void **this_prologue_cache, int regnum)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
struct mn10300_prologue *p
= mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache);
- int reg_size = register_size (get_frame_arch (this_frame), regnum);
if (regnum == E_SP_REGNUM)
return frame_unwind_got_constant (this_frame, regnum, frame_base);
static const struct frame_unwind mn10300_frame_unwind = {
NORMAL_FRAME,
+ default_frame_unwind_stop_reason,
mn10300_frame_this_id,
mn10300_frame_prev_register,
NULL,
int len, arg_len;
int stack_offset = 0;
int argnum;
- char *val, valbuf[MAX_REGISTER_SIZE];
+ const gdb_byte *val;
+ gdb_byte valbuf[MN10300_MAX_REGISTER_SIZE];
/* This should be a nop, but align the stack just in case something
went wrong. Stacks are four byte aligned on the mn10300. */
else
regs_used = 0;
- /* Push all arguments onto the stack. */
+ /* Push all arguments onto the stack. */
for (argnum = 0; argnum < nargs; argnum++)
{
/* FIXME what about structs? Unions? */
{
/* Change to pointer-to-type. */
arg_len = push_size;
+ gdb_assert (push_size <= MN10300_MAX_REGISTER_SIZE);
store_unsigned_integer (valbuf, push_size, byte_order,
value_address (*args));
val = &valbuf[0];
else
{
arg_len = TYPE_LENGTH (value_type (*args));
- val = (char *) value_contents (*args);
+ val = value_contents (*args);
}
while (regs_used < 2 && arg_len > 0)
Note that we don't update the return value though because that's
the value of the stack just after pushing the arguments, but prior
to performing the call. This value is needed in order to
- construct the frame ID of the dummy call. */
+ construct the frame ID of the dummy call. */
{
CORE_ADDR func_addr = find_function_addr (target_func, NULL);
CORE_ADDR unwound_sp
appear in GCC's numbering, but have no counterpart in GDB's
world, are marked with a -1. */
static int dwarf2_to_gdb[] = {
- 0, 1, 2, 3, 4, 5, 6, 7, -1, 8,
- 15, 16, 17, 18, 19, 20, 21, 22,
- 32, 33, 34, 35, 36, 37, 38, 39,
- 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55,
- 56, 57, 58, 59, 60, 61, 62, 63,
- 9, 11
+ E_D0_REGNUM, E_D1_REGNUM, E_D2_REGNUM, E_D3_REGNUM,
+ E_A0_REGNUM, E_A1_REGNUM, E_A2_REGNUM, E_A3_REGNUM,
+ -1, E_SP_REGNUM,
+
+ E_E0_REGNUM, E_E1_REGNUM, E_E2_REGNUM, E_E3_REGNUM,
+ E_E4_REGNUM, E_E5_REGNUM, E_E6_REGNUM, E_E7_REGNUM,
+
+ E_FS0_REGNUM + 0, E_FS0_REGNUM + 1, E_FS0_REGNUM + 2, E_FS0_REGNUM + 3,
+ E_FS0_REGNUM + 4, E_FS0_REGNUM + 5, E_FS0_REGNUM + 6, E_FS0_REGNUM + 7,
+
+ E_FS0_REGNUM + 8, E_FS0_REGNUM + 9, E_FS0_REGNUM + 10, E_FS0_REGNUM + 11,
+ E_FS0_REGNUM + 12, E_FS0_REGNUM + 13, E_FS0_REGNUM + 14, E_FS0_REGNUM + 15,
+
+ E_FS0_REGNUM + 16, E_FS0_REGNUM + 17, E_FS0_REGNUM + 18, E_FS0_REGNUM + 19,
+ E_FS0_REGNUM + 20, E_FS0_REGNUM + 21, E_FS0_REGNUM + 22, E_FS0_REGNUM + 23,
+
+ E_FS0_REGNUM + 24, E_FS0_REGNUM + 25, E_FS0_REGNUM + 26, E_FS0_REGNUM + 27,
+ E_FS0_REGNUM + 28, E_FS0_REGNUM + 29, E_FS0_REGNUM + 30, E_FS0_REGNUM + 31,
+
+ E_MDR_REGNUM, E_PSW_REGNUM, E_PC_REGNUM
};
if (dwarf2 < 0
|| dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb))
- {
- warning (_("Bogus register number in debug info: %d"), dwarf2);
- return -1;
- }
+ return -1;
return dwarf2_to_gdb[dwarf2];
}
if (arches != NULL)
return arches->gdbarch;
- tdep = xmalloc (sizeof (struct gdbarch_tdep));
+ tdep = XCNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
switch (info.bfd_arch_info->mach)
set_gdbarch_num_regs (gdbarch, num_regs);
set_gdbarch_register_type (gdbarch, mn10300_register_type);
set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
- set_gdbarch_read_pc (gdbarch, mn10300_read_pc);
- set_gdbarch_write_pc (gdbarch, mn10300_write_pc);
set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
/* Stack unwinding. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
/* Breakpoints. */
- set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc);
- /* decr_pc_after_break? */
- /* Disassembly. */
- set_gdbarch_print_insn (gdbarch, print_insn_mn10300);
+ set_gdbarch_breakpoint_kind_from_pc (gdbarch,
+ mn10300_breakpoint::kind_from_pc);
+ set_gdbarch_sw_breakpoint_from_kind (gdbarch,
+ mn10300_breakpoint::bp_from_kind);
+ /* decr_pc_after_break? */
/* Stage 2 */
set_gdbarch_return_value (gdbarch, mn10300_return_value);
return gdbarch;
}
-/* Dump out the mn10300 specific architecture information. */
+/* Dump out the mn10300 specific architecture information. */
static void
mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
tdep->am33_mode);
}
-/* Provide a prototype to silence -Wmissing-prototypes. */
-extern initialize_file_ftype _initialize_mn10300_tdep;
-
void
_initialize_mn10300_tdep (void)
{