/* Target-dependent code for GDB, the GNU debugger.
- Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
- 1997, 2000, 2001 Free Software Foundation, Inc.
+ Copyright (C) 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
+ Free Software Foundation, Inc.
This file is part of GDB.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ Boston, MA 02110-1301, USA. */
#include "defs.h"
#include "frame.h"
#include "symfile.h"
#include "objfiles.h"
#include "regcache.h"
-
+#include "value.h"
+#include "osabi.h"
+#include "regset.h"
+#include "solib-svr4.h"
#include "ppc-tdep.h"
-
-/* The following two instructions are used in the signal trampoline
- code on linux/ppc */
-#define INSTR_LI_R0_0x7777 0x38007777
-#define INSTR_SC 0x44000002
-
-/* Since the *-tdep.c files are platform independent (i.e, they may be
- used to build cross platform debuggers), we can't include system
- headers. Therefore, details concerning the sigcontext structure
- must be painstakingly rerecorded. What's worse, if these details
- ever change in the header files, they'll have to be changed here
- as well. */
-
-/* __SIGNAL_FRAMESIZE from <asm/ptrace.h> */
-#define PPC_LINUX_SIGNAL_FRAMESIZE 64
-
-/* From <asm/sigcontext.h>, offsetof(struct sigcontext_struct, regs) == 0x1c */
-#define PPC_LINUX_REGS_PTR_OFFSET (PPC_LINUX_SIGNAL_FRAMESIZE + 0x1c)
-
-/* From <asm/sigcontext.h>,
- offsetof(struct sigcontext_struct, handler) == 0x14 */
-#define PPC_LINUX_HANDLER_PTR_OFFSET (PPC_LINUX_SIGNAL_FRAMESIZE + 0x14)
+#include "trad-frame.h"
+#include "frame-unwind.h"
+#include "tramp-frame.h"
/* From <asm/ptrace.h>, values for PT_NIP, PT_R1, and PT_LNK */
#define PPC_LINUX_PT_R0 0
#define PPC_LINUX_PT_FPR31 (PPC_LINUX_PT_FPR0 + 2*31)
#define PPC_LINUX_PT_FPSCR (PPC_LINUX_PT_FPR0 + 2*32 + 1)
-static int ppc_linux_at_sigtramp_return_path (CORE_ADDR pc);
-
-/* Determine if pc is in a signal trampoline...
-
- Ha! That's not what this does at all. wait_for_inferior in infrun.c
- calls IN_SIGTRAMP in order to detect entry into a signal trampoline
- just after delivery of a signal. But on linux, signal trampolines
- are used for the return path only. The kernel sets things up so that
- the signal handler is called directly.
-
- If we use in_sigtramp2() in place of in_sigtramp() (see below)
- we'll (often) end up with stop_pc in the trampoline and prev_pc in
- the (now exited) handler. The code there will cause a temporary
- breakpoint to be set on prev_pc which is not very likely to get hit
- again.
-
- If this is confusing, think of it this way... the code in
- wait_for_inferior() needs to be able to detect entry into a signal
- trampoline just after a signal is delivered, not after the handler
- has been run.
-
- So, we define in_sigtramp() below to return 1 if the following is
- true:
-
- 1) The previous frame is a real signal trampoline.
-
- - and -
-
- 2) pc is at the first or second instruction of the corresponding
- handler.
- Why the second instruction? It seems that wait_for_inferior()
- never sees the first instruction when single stepping. When a
- signal is delivered while stepping, the next instruction that
- would've been stepped over isn't, instead a signal is delivered and
- the first instruction of the handler is stepped over instead. That
- puts us on the second instruction. (I added the test for the
- first instruction long after the fact, just in case the observed
- behavior is ever fixed.)
-
- IN_SIGTRAMP is called from blockframe.c as well in order to set
- the signal_handler_caller flag. Because of our strange definition
- of in_sigtramp below, we can't rely on signal_handler_caller getting
- set correctly from within blockframe.c. This is why we take pains
- to set it in init_extra_frame_info(). */
-
-int
-ppc_linux_in_sigtramp (CORE_ADDR pc, char *func_name)
-{
- CORE_ADDR lr;
- CORE_ADDR sp;
- CORE_ADDR tramp_sp;
- char buf[4];
- CORE_ADDR handler;
-
- lr = read_register (PPC_LR_REGNUM);
- if (!ppc_linux_at_sigtramp_return_path (lr))
- return 0;
-
- sp = read_register (SP_REGNUM);
-
- if (target_read_memory (sp, buf, sizeof (buf)) != 0)
- return 0;
-
- tramp_sp = extract_unsigned_integer (buf, 4);
-
- if (target_read_memory (tramp_sp + PPC_LINUX_HANDLER_PTR_OFFSET, buf,
- sizeof (buf)) != 0)
- return 0;
-
- handler = extract_unsigned_integer (buf, 4);
-
- return (pc == handler || pc == handler + 4);
-}
-
-/*
- * The signal handler trampoline is on the stack and consists of exactly
- * two instructions. The easiest and most accurate way of determining
- * whether the pc is in one of these trampolines is by inspecting the
- * instructions. It'd be faster though if we could find a way to do this
- * via some simple address comparisons.
- */
-static int
-ppc_linux_at_sigtramp_return_path (CORE_ADDR pc)
-{
- char buf[12];
- unsigned long pcinsn;
- if (target_read_memory (pc - 4, buf, sizeof (buf)) != 0)
- return 0;
-
- /* extract the instruction at the pc */
- pcinsn = extract_unsigned_integer (buf + 4, 4);
-
- return (
- (pcinsn == INSTR_LI_R0_0x7777
- && extract_unsigned_integer (buf + 8, 4) == INSTR_SC)
- ||
- (pcinsn == INSTR_SC
- && extract_unsigned_integer (buf, 4) == INSTR_LI_R0_0x7777));
-}
-
-CORE_ADDR
+static CORE_ADDR
ppc_linux_skip_trampoline_code (CORE_ADDR pc)
{
- char buf[4];
+ gdb_byte buf[4];
struct obj_section *sect;
struct objfile *objfile;
unsigned long insn;
/* Get address of the relocation entry (Elf32_Rela) */
if (target_read_memory (plt_table + reloc_index, buf, 4) != 0)
return 0;
- reloc = extract_address (buf, 4);
+ reloc = extract_unsigned_integer (buf, 4);
sect = find_pc_section (reloc);
if (!sect)
/* Fetch the string; we don't know how long it is. Is it possible
that the following will fail because we're trying to fetch too
much? */
- if (target_read_memory (strtab + symidx, symname, sizeof (symname)) != 0)
+ if (target_read_memory (strtab + symidx, (gdb_byte *) symname,
+ sizeof (symname)) != 0)
return 0;
/* This might not work right if we have multiple symbols with the
same name; the only way to really get it right is to perform
the same sort of lookup as the dynamic linker. */
- msymbol = lookup_minimal_symbol_text (symname, NULL, NULL);
+ msymbol = lookup_minimal_symbol_text (symname, NULL);
if (!msymbol)
return 0;
return SYMBOL_VALUE_ADDRESS (msymbol);
}
-/* The rs6000 version of FRAME_SAVED_PC will almost work for us. The
- signal handler details are different, so we'll handle those here
- and call the rs6000 version to do the rest. */
-CORE_ADDR
-ppc_linux_frame_saved_pc (struct frame_info *fi)
-{
- if (fi->signal_handler_caller)
- {
- CORE_ADDR regs_addr =
- read_memory_integer (fi->frame + PPC_LINUX_REGS_PTR_OFFSET, 4);
- /* return the NIP in the regs array */
- return read_memory_integer (regs_addr + 4 * PPC_LINUX_PT_NIP, 4);
- }
- else if (fi->next && fi->next->signal_handler_caller)
- {
- CORE_ADDR regs_addr =
- read_memory_integer (fi->next->frame + PPC_LINUX_REGS_PTR_OFFSET, 4);
- /* return LNK in the regs array */
- return read_memory_integer (regs_addr + 4 * PPC_LINUX_PT_LNK, 4);
- }
- else
- return rs6000_frame_saved_pc (fi);
-}
-
-void
-ppc_linux_init_extra_frame_info (int fromleaf, struct frame_info *fi)
-{
- rs6000_init_extra_frame_info (fromleaf, fi);
-
- if (fi->next != 0)
- {
- /* We're called from get_prev_frame_info; check to see if
- this is a signal frame by looking to see if the pc points
- at trampoline code */
- if (ppc_linux_at_sigtramp_return_path (fi->pc))
- fi->signal_handler_caller = 1;
- else
- fi->signal_handler_caller = 0;
- }
-}
-
-int
-ppc_linux_frameless_function_invocation (struct frame_info *fi)
-{
- /* We'll find the wrong thing if we let
- rs6000_frameless_function_invocation () search for a signal trampoline */
- if (ppc_linux_at_sigtramp_return_path (fi->pc))
- return 0;
- else
- return rs6000_frameless_function_invocation (fi);
-}
-
-void
-ppc_linux_frame_init_saved_regs (struct frame_info *fi)
-{
- if (fi->signal_handler_caller)
- {
- CORE_ADDR regs_addr;
- int i;
- if (fi->saved_regs)
- return;
-
- frame_saved_regs_zalloc (fi);
-
- regs_addr =
- read_memory_integer (fi->frame + PPC_LINUX_REGS_PTR_OFFSET, 4);
- fi->saved_regs[PC_REGNUM] = regs_addr + 4 * PPC_LINUX_PT_NIP;
- fi->saved_regs[PPC_PS_REGNUM] = regs_addr + 4 * PPC_LINUX_PT_MSR;
- fi->saved_regs[PPC_CR_REGNUM] = regs_addr + 4 * PPC_LINUX_PT_CCR;
- fi->saved_regs[PPC_LR_REGNUM] = regs_addr + 4 * PPC_LINUX_PT_LNK;
- fi->saved_regs[PPC_CTR_REGNUM] = regs_addr + 4 * PPC_LINUX_PT_CTR;
- fi->saved_regs[PPC_XER_REGNUM] = regs_addr + 4 * PPC_LINUX_PT_XER;
- fi->saved_regs[PPC_MQ_REGNUM] = regs_addr + 4 * PPC_LINUX_PT_MQ;
- for (i = 0; i < 32; i++)
- fi->saved_regs[PPC_GP0_REGNUM + i] = regs_addr + 4 * PPC_LINUX_PT_R0 + 4 * i;
- for (i = 0; i < 32; i++)
- fi->saved_regs[FP0_REGNUM + i] = regs_addr + 4 * PPC_LINUX_PT_FPR0 + 8 * i;
- }
- else
- rs6000_frame_init_saved_regs (fi);
-}
-
-CORE_ADDR
-ppc_linux_frame_chain (struct frame_info *thisframe)
-{
- /* Kernel properly constructs the frame chain for the handler */
- if (thisframe->signal_handler_caller)
- return read_memory_integer ((thisframe)->frame, 4);
- else
- return rs6000_frame_chain (thisframe);
-}
-
-/* FIXME: Move the following to rs6000-tdep.c (or some other file where
- it may be used generically by ports which use either the SysV ABI or
- the EABI */
-
-/* round2 rounds x up to the nearest multiple of s assuming that s is a
- power of 2 */
-
-#undef round2
-#define round2(x,s) ((((long) (x) - 1) & ~(long)((s)-1)) + (s))
-
-/* Pass the arguments in either registers, or in the stack. Using the
- ppc sysv ABI, the first eight words of the argument list (that might
- be less than eight parameters if some parameters occupy more than one
- word) are passed in r3..r10 registers. float and double parameters are
- passed in fpr's, in addition to that. Rest of the parameters if any
- are passed in user stack.
-
- If the function is returning a structure, then the return address is passed
- in r3, then the first 7 words of the parametes can be passed in registers,
- starting from r4. */
-
-CORE_ADDR
-ppc_sysv_abi_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
- int struct_return, CORE_ADDR struct_addr)
-{
- int argno;
- int greg, freg;
- int argstkspace;
- int structstkspace;
- int argoffset;
- int structoffset;
- value_ptr arg;
- struct type *type;
- int len;
- char old_sp_buf[4];
- CORE_ADDR saved_sp;
-
- greg = struct_return ? 4 : 3;
- freg = 1;
- argstkspace = 0;
- structstkspace = 0;
-
- /* Figure out how much new stack space is required for arguments
- which don't fit in registers. Unlike the PowerOpen ABI, the
- SysV ABI doesn't reserve any extra space for parameters which
- are put in registers. */
- for (argno = 0; argno < nargs; argno++)
- {
- arg = args[argno];
- type = check_typedef (VALUE_TYPE (arg));
- len = TYPE_LENGTH (type);
-
- if (TYPE_CODE (type) == TYPE_CODE_FLT)
- {
- if (freg <= 8)
- freg++;
- else
- {
- /* SysV ABI converts floats to doubles when placed in
- memory and requires 8 byte alignment */
- if (argstkspace & 0x4)
- argstkspace += 4;
- argstkspace += 8;
- }
- }
- else if (TYPE_CODE (type) == TYPE_CODE_INT && len == 8) /* long long */
- {
- if (greg > 9)
- {
- greg = 11;
- if (argstkspace & 0x4)
- argstkspace += 4;
- argstkspace += 8;
- }
- else
- {
- if ((greg & 1) == 0)
- greg++;
- greg += 2;
- }
- }
- else
- {
- if (len > 4
- || TYPE_CODE (type) == TYPE_CODE_STRUCT
- || TYPE_CODE (type) == TYPE_CODE_UNION)
- {
- /* Rounding to the nearest multiple of 8 may not be necessary,
- but it is safe. Particularly since we don't know the
- field types of the structure */
- structstkspace += round2 (len, 8);
- }
- if (greg <= 10)
- greg++;
- else
- argstkspace += 4;
- }
- }
-
- /* Get current SP location */
- saved_sp = read_sp ();
-
- sp -= argstkspace + structstkspace;
-
- /* Allocate space for backchain and callee's saved lr */
- sp -= 8;
-
- /* Make sure that we maintain 16 byte alignment */
- sp &= ~0x0f;
-
- /* Update %sp before proceeding any further */
- write_register (SP_REGNUM, sp);
-
- /* write the backchain */
- store_address (old_sp_buf, 4, saved_sp);
- write_memory (sp, old_sp_buf, 4);
-
- argoffset = 8;
- structoffset = argoffset + argstkspace;
- freg = 1;
- greg = 3;
- /* Fill in r3 with the return structure, if any */
- if (struct_return)
- {
- char val_buf[4];
- store_address (val_buf, 4, struct_addr);
- memcpy (®isters[REGISTER_BYTE (greg)], val_buf, 4);
- greg++;
- }
- /* Now fill in the registers and stack... */
- for (argno = 0; argno < nargs; argno++)
- {
- arg = args[argno];
- type = check_typedef (VALUE_TYPE (arg));
- len = TYPE_LENGTH (type);
-
- if (TYPE_CODE (type) == TYPE_CODE_FLT)
- {
- if (freg <= 8)
- {
- if (len > 8)
- printf_unfiltered (
- "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
- memcpy (®isters[REGISTER_BYTE (FP0_REGNUM + freg)],
- VALUE_CONTENTS (arg), len);
- freg++;
- }
- else
- {
- /* SysV ABI converts floats to doubles when placed in
- memory and requires 8 byte alignment */
- /* FIXME: Convert floats to doubles */
- if (argoffset & 0x4)
- argoffset += 4;
- write_memory (sp + argoffset, (char *) VALUE_CONTENTS (arg), len);
- argoffset += 8;
- }
- }
- else if (TYPE_CODE (type) == TYPE_CODE_INT && len == 8) /* long long */
- {
- if (greg > 9)
- {
- greg = 11;
- if (argoffset & 0x4)
- argoffset += 4;
- write_memory (sp + argoffset, (char *) VALUE_CONTENTS (arg), len);
- argoffset += 8;
- }
- else
- {
- if ((greg & 1) == 0)
- greg++;
-
- memcpy (®isters[REGISTER_BYTE (greg)],
- VALUE_CONTENTS (arg), 4);
- memcpy (®isters[REGISTER_BYTE (greg + 1)],
- VALUE_CONTENTS (arg) + 4, 4);
- greg += 2;
- }
- }
- else
- {
- char val_buf[4];
- if (len > 4
- || TYPE_CODE (type) == TYPE_CODE_STRUCT
- || TYPE_CODE (type) == TYPE_CODE_UNION)
- {
- write_memory (sp + structoffset, VALUE_CONTENTS (arg), len);
- store_address (val_buf, 4, sp + structoffset);
- structoffset += round2 (len, 8);
- }
- else
- {
- memset (val_buf, 0, 4);
- memcpy (val_buf, VALUE_CONTENTS (arg), len);
- }
- if (greg <= 10)
- {
- *(int *) ®isters[REGISTER_BYTE (greg)] = 0;
- memcpy (®isters[REGISTER_BYTE (greg)], val_buf, 4);
- greg++;
- }
- else
- {
- write_memory (sp + argoffset, val_buf, 4);
- argoffset += 4;
- }
- }
- }
-
- target_store_registers (-1);
- return sp;
-}
-
/* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint
in much the same fashion as memory_remove_breakpoint in mem-break.c,
but is careful not to write back the previous contents if the code
regard to removing breakpoints in some potentially self modifying
code. */
int
-ppc_linux_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
+ppc_linux_memory_remove_breakpoint (struct bp_target_info *bp_tgt)
{
- unsigned char *bp;
+ CORE_ADDR addr = bp_tgt->placed_address;
+ const unsigned char *bp;
int val;
int bplen;
- char old_contents[BREAKPOINT_MAX];
+ gdb_byte old_contents[BREAKPOINT_MAX];
/* Determine appropriate breakpoint contents and size for this address. */
- bp = BREAKPOINT_FROM_PC (&addr, &bplen);
+ bp = gdbarch_breakpoint_from_pc (current_gdbarch, &addr, &bplen);
if (bp == NULL)
- error ("Software breakpoints not implemented for this target.");
+ error (_("Software breakpoints not implemented for this target."));
val = target_read_memory (addr, old_contents, bplen);
program modified the code on us, so it is wrong to put back the
old value */
if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
- val = target_write_memory (addr, contents_cache, bplen);
+ val = target_write_memory (addr, bp_tgt->shadow_contents, bplen);
return val;
}
+
+/* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather
+ than the 32 bit SYSV R4 ABI structure return convention - all
+ structures, no matter their size, are put in memory. Vectors,
+ which were added later, do get returned in a register though. */
+
+static enum return_value_convention
+ppc_linux_return_value (struct gdbarch *gdbarch, struct type *valtype,
+ struct regcache *regcache, gdb_byte *readbuf,
+ const gdb_byte *writebuf)
+{
+ if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
+ || TYPE_CODE (valtype) == TYPE_CODE_UNION)
+ && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
+ && TYPE_VECTOR (valtype)))
+ return RETURN_VALUE_STRUCT_CONVENTION;
+ else
+ return ppc_sysv_abi_return_value (gdbarch, valtype, regcache, readbuf,
+ writebuf);
+}
+
+/* Macros for matching instructions. Note that, since all the
+ operands are masked off before they're or-ed into the instruction,
+ you can use -1 to make masks. */
+
+#define insn_d(opcd, rts, ra, d) \
+ ((((opcd) & 0x3f) << 26) \
+ | (((rts) & 0x1f) << 21) \
+ | (((ra) & 0x1f) << 16) \
+ | ((d) & 0xffff))
+
+#define insn_ds(opcd, rts, ra, d, xo) \
+ ((((opcd) & 0x3f) << 26) \
+ | (((rts) & 0x1f) << 21) \
+ | (((ra) & 0x1f) << 16) \
+ | ((d) & 0xfffc) \
+ | ((xo) & 0x3))
+
+#define insn_xfx(opcd, rts, spr, xo) \
+ ((((opcd) & 0x3f) << 26) \
+ | (((rts) & 0x1f) << 21) \
+ | (((spr) & 0x1f) << 16) \
+ | (((spr) & 0x3e0) << 6) \
+ | (((xo) & 0x3ff) << 1))
+
+/* Read a PPC instruction from memory. PPC instructions are always
+ big-endian, no matter what endianness the program is running in, so
+ we can't use read_memory_integer or one of its friends here. */
+static unsigned int
+read_insn (CORE_ADDR pc)
+{
+ unsigned char buf[4];
+
+ read_memory (pc, buf, 4);
+ return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
+}
+
+
+/* An instruction to match. */
+struct insn_pattern
+{
+ unsigned int mask; /* mask the insn with this... */
+ unsigned int data; /* ...and see if it matches this. */
+ int optional; /* If non-zero, this insn may be absent. */
+};
+
+/* Return non-zero if the instructions at PC match the series
+ described in PATTERN, or zero otherwise. PATTERN is an array of
+ 'struct insn_pattern' objects, terminated by an entry whose mask is
+ zero.
+
+ When the match is successful, fill INSN[i] with what PATTERN[i]
+ matched. If PATTERN[i] is optional, and the instruction wasn't
+ present, set INSN[i] to 0 (which is not a valid PPC instruction).
+ INSN should have as many elements as PATTERN. Note that, if
+ PATTERN contains optional instructions which aren't present in
+ memory, then INSN will have holes, so INSN[i] isn't necessarily the
+ i'th instruction in memory. */
+static int
+insns_match_pattern (CORE_ADDR pc,
+ struct insn_pattern *pattern,
+ unsigned int *insn)
+{
+ int i;
+
+ for (i = 0; pattern[i].mask; i++)
+ {
+ insn[i] = read_insn (pc);
+ if ((insn[i] & pattern[i].mask) == pattern[i].data)
+ pc += 4;
+ else if (pattern[i].optional)
+ insn[i] = 0;
+ else
+ return 0;
+ }
+
+ return 1;
+}
+
+
+/* Return the 'd' field of the d-form instruction INSN, properly
+ sign-extended. */
+static CORE_ADDR
+insn_d_field (unsigned int insn)
+{
+ return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
+}
+
+
+/* Return the 'ds' field of the ds-form instruction INSN, with the two
+ zero bits concatenated at the right, and properly
+ sign-extended. */
+static CORE_ADDR
+insn_ds_field (unsigned int insn)
+{
+ return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
+}
+
+
+/* If DESC is the address of a 64-bit PowerPC GNU/Linux function
+ descriptor, return the descriptor's entry point. */
+static CORE_ADDR
+ppc64_desc_entry_point (CORE_ADDR desc)
+{
+ /* The first word of the descriptor is the entry point. */
+ return (CORE_ADDR) read_memory_unsigned_integer (desc, 8);
+}
+
+
+/* Pattern for the standard linkage function. These are built by
+ build_plt_stub in elf64-ppc.c, whose GLINK argument is always
+ zero. */
+static struct insn_pattern ppc64_standard_linkage[] =
+ {
+ /* addis r12, r2, <any> */
+ { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
+
+ /* std r2, 40(r1) */
+ { -1, insn_ds (62, 2, 1, 40, 0), 0 },
+
+ /* ld r11, <any>(r12) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
+
+ /* addis r12, r12, 1 <optional> */
+ { insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 },
+
+ /* ld r2, <any>(r12) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
+
+ /* addis r12, r12, 1 <optional> */
+ { insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 },
+
+ /* mtctr r11 */
+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467),
+ 0 },
+
+ /* ld r11, <any>(r12) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
+
+ /* bctr */
+ { -1, 0x4e800420, 0 },
+
+ { 0, 0, 0 }
+ };
+#define PPC64_STANDARD_LINKAGE_LEN \
+ (sizeof (ppc64_standard_linkage) / sizeof (ppc64_standard_linkage[0]))
+
+/* When the dynamic linker is doing lazy symbol resolution, the first
+ call to a function in another object will go like this:
+
+ - The user's function calls the linkage function:
+
+ 100007c4: 4b ff fc d5 bl 10000498
+ 100007c8: e8 41 00 28 ld r2,40(r1)
+
+ - The linkage function loads the entry point (and other stuff) from
+ the function descriptor in the PLT, and jumps to it:
+
+ 10000498: 3d 82 00 00 addis r12,r2,0
+ 1000049c: f8 41 00 28 std r2,40(r1)
+ 100004a0: e9 6c 80 98 ld r11,-32616(r12)
+ 100004a4: e8 4c 80 a0 ld r2,-32608(r12)
+ 100004a8: 7d 69 03 a6 mtctr r11
+ 100004ac: e9 6c 80 a8 ld r11,-32600(r12)
+ 100004b0: 4e 80 04 20 bctr
+
+ - But since this is the first time that PLT entry has been used, it
+ sends control to its glink entry. That loads the number of the
+ PLT entry and jumps to the common glink0 code:
+
+ 10000c98: 38 00 00 00 li r0,0
+ 10000c9c: 4b ff ff dc b 10000c78
+
+ - The common glink0 code then transfers control to the dynamic
+ linker's fixup code:
+
+ 10000c78: e8 41 00 28 ld r2,40(r1)
+ 10000c7c: 3d 82 00 00 addis r12,r2,0
+ 10000c80: e9 6c 80 80 ld r11,-32640(r12)
+ 10000c84: e8 4c 80 88 ld r2,-32632(r12)
+ 10000c88: 7d 69 03 a6 mtctr r11
+ 10000c8c: e9 6c 80 90 ld r11,-32624(r12)
+ 10000c90: 4e 80 04 20 bctr
+
+ Eventually, this code will figure out how to skip all of this,
+ including the dynamic linker. At the moment, we just get through
+ the linkage function. */
+
+/* If the current thread is about to execute a series of instructions
+ at PC matching the ppc64_standard_linkage pattern, and INSN is the result
+ from that pattern match, return the code address to which the
+ standard linkage function will send them. (This doesn't deal with
+ dynamic linker lazy symbol resolution stubs.) */
+static CORE_ADDR
+ppc64_standard_linkage_target (CORE_ADDR pc, unsigned int *insn)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+
+ /* The address of the function descriptor this linkage function
+ references. */
+ CORE_ADDR desc
+ = ((CORE_ADDR) read_register (tdep->ppc_gp0_regnum + 2)
+ + (insn_d_field (insn[0]) << 16)
+ + insn_ds_field (insn[2]));
+
+ /* The first word of the descriptor is the entry point. Return that. */
+ return ppc64_desc_entry_point (desc);
+}
+
+
+/* Given that we've begun executing a call trampoline at PC, return
+ the entry point of the function the trampoline will go to. */
+static CORE_ADDR
+ppc64_skip_trampoline_code (CORE_ADDR pc)
+{
+ unsigned int ppc64_standard_linkage_insn[PPC64_STANDARD_LINKAGE_LEN];
+
+ if (insns_match_pattern (pc, ppc64_standard_linkage,
+ ppc64_standard_linkage_insn))
+ return ppc64_standard_linkage_target (pc, ppc64_standard_linkage_insn);
+ else
+ return 0;
+}
+
+
+/* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG) on PPC64
+ GNU/Linux.
+
+ Usually a function pointer's representation is simply the address
+ of the function. On GNU/Linux on the 64-bit PowerPC however, a
+ function pointer is represented by a pointer to a TOC entry. This
+ TOC entry contains three words, the first word is the address of
+ the function, the second word is the TOC pointer (r2), and the
+ third word is the static chain value. Throughout GDB it is
+ currently assumed that a function pointer contains the address of
+ the function, which is not easy to fix. In addition, the
+ conversion of a function address to a function pointer would
+ require allocation of a TOC entry in the inferior's memory space,
+ with all its drawbacks. To be able to call C++ virtual methods in
+ the inferior (which are called via function pointers),
+ find_function_addr uses this function to get the function address
+ from a function pointer. */
+
+/* If ADDR points at what is clearly a function descriptor, transform
+ it into the address of the corresponding function. Be
+ conservative, otherwize GDB will do the transformation on any
+ random addresses such as occures when there is no symbol table. */
+
+static CORE_ADDR
+ppc64_linux_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
+ CORE_ADDR addr,
+ struct target_ops *targ)
+{
+ struct section_table *s = target_section_by_addr (targ, addr);
+
+ /* Check if ADDR points to a function descriptor. */
+ if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
+ return get_target_memory_unsigned (targ, addr, 8);
+
+ return addr;
+}
+
+static void
+right_supply_register (struct regcache *regcache, int wordsize, int regnum,
+ const bfd_byte *buf)
+{
+ regcache_raw_supply (regcache, regnum,
+ (buf + wordsize - register_size (current_gdbarch, regnum)));
+}
+
+/* Extract the register values found in the WORDSIZED ABI GREGSET,
+ storing their values in REGCACHE. Note that some are left-aligned,
+ while others are right aligned. */
+
+void
+ppc_linux_supply_gregset (struct regcache *regcache,
+ int regnum, const void *gregs, size_t size,
+ int wordsize)
+{
+ int regi;
+ struct gdbarch *regcache_arch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *regcache_tdep = gdbarch_tdep (regcache_arch);
+ const bfd_byte *buf = gregs;
+
+ for (regi = 0; regi < ppc_num_gprs; regi++)
+ right_supply_register (regcache, wordsize,
+ regcache_tdep->ppc_gp0_regnum + regi,
+ buf + wordsize * regi);
+
+ right_supply_register (regcache, wordsize, gdbarch_pc_regnum (regcache_arch),
+ buf + wordsize * PPC_LINUX_PT_NIP);
+ right_supply_register (regcache, wordsize, regcache_tdep->ppc_lr_regnum,
+ buf + wordsize * PPC_LINUX_PT_LNK);
+ regcache_raw_supply (regcache, regcache_tdep->ppc_cr_regnum,
+ buf + wordsize * PPC_LINUX_PT_CCR);
+ regcache_raw_supply (regcache, regcache_tdep->ppc_xer_regnum,
+ buf + wordsize * PPC_LINUX_PT_XER);
+ regcache_raw_supply (regcache, regcache_tdep->ppc_ctr_regnum,
+ buf + wordsize * PPC_LINUX_PT_CTR);
+ if (regcache_tdep->ppc_mq_regnum != -1)
+ right_supply_register (regcache, wordsize, regcache_tdep->ppc_mq_regnum,
+ buf + wordsize * PPC_LINUX_PT_MQ);
+ right_supply_register (regcache, wordsize, regcache_tdep->ppc_ps_regnum,
+ buf + wordsize * PPC_LINUX_PT_MSR);
+}
+
+static void
+ppc32_linux_supply_gregset (const struct regset *regset,
+ struct regcache *regcache,
+ int regnum, const void *gregs, size_t size)
+{
+ ppc_linux_supply_gregset (regcache, regnum, gregs, size, 4);
+}
+
+static struct regset ppc32_linux_gregset = {
+ NULL, ppc32_linux_supply_gregset
+};
+
+static void
+ppc64_linux_supply_gregset (const struct regset *regset,
+ struct regcache * regcache,
+ int regnum, const void *gregs, size_t size)
+{
+ ppc_linux_supply_gregset (regcache, regnum, gregs, size, 8);
+}
+
+static struct regset ppc64_linux_gregset = {
+ NULL, ppc64_linux_supply_gregset
+};
+
+void
+ppc_linux_supply_fpregset (const struct regset *regset,
+ struct regcache * regcache,
+ int regnum, const void *fpset, size_t size)
+{
+ int regi;
+ struct gdbarch *regcache_arch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *regcache_tdep = gdbarch_tdep (regcache_arch);
+ const bfd_byte *buf = fpset;
+
+ if (! ppc_floating_point_unit_p (regcache_arch))
+ return;
+
+ for (regi = 0; regi < ppc_num_fprs; regi++)
+ regcache_raw_supply (regcache,
+ regcache_tdep->ppc_fp0_regnum + regi,
+ buf + 8 * regi);
+
+ /* The FPSCR is stored in the low order word of the last
+ doubleword in the fpregset. */
+ regcache_raw_supply (regcache, regcache_tdep->ppc_fpscr_regnum,
+ buf + 8 * 32 + 4);
+}
+
+static struct regset ppc_linux_fpregset = { NULL, ppc_linux_supply_fpregset };
+
+static const struct regset *
+ppc_linux_regset_from_core_section (struct gdbarch *core_arch,
+ const char *sect_name, size_t sect_size)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (core_arch);
+ if (strcmp (sect_name, ".reg") == 0)
+ {
+ if (tdep->wordsize == 4)
+ return &ppc32_linux_gregset;
+ else
+ return &ppc64_linux_gregset;
+ }
+ if (strcmp (sect_name, ".reg2") == 0)
+ return &ppc_linux_fpregset;
+ return NULL;
+}
+
+static void
+ppc_linux_sigtramp_cache (struct frame_info *next_frame,
+ struct trad_frame_cache *this_cache,
+ CORE_ADDR func, LONGEST offset,
+ int bias)
+{
+ CORE_ADDR base;
+ CORE_ADDR regs;
+ CORE_ADDR gpregs;
+ CORE_ADDR fpregs;
+ int i;
+ struct gdbarch *gdbarch = get_frame_arch (next_frame);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
+ if (bias > 0 && frame_pc_unwind (next_frame) != func)
+ /* See below, some signal trampolines increment the stack as their
+ first instruction, need to compensate for that. */
+ base -= bias;
+
+ /* Find the address of the register buffer pointer. */
+ regs = base + offset;
+ /* Use that to find the address of the corresponding register
+ buffers. */
+ gpregs = read_memory_unsigned_integer (regs, tdep->wordsize);
+ fpregs = gpregs + 48 * tdep->wordsize;
+
+ /* General purpose. */
+ for (i = 0; i < 32; i++)
+ {
+ int regnum = i + tdep->ppc_gp0_regnum;
+ trad_frame_set_reg_addr (this_cache, regnum, gpregs + i * tdep->wordsize);
+ }
+ trad_frame_set_reg_addr (this_cache, PC_REGNUM, gpregs + 32 * tdep->wordsize);
+ trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum,
+ gpregs + 35 * tdep->wordsize);
+ trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum,
+ gpregs + 36 * tdep->wordsize);
+ trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum,
+ gpregs + 37 * tdep->wordsize);
+ trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum,
+ gpregs + 38 * tdep->wordsize);
+
+ if (ppc_floating_point_unit_p (gdbarch))
+ {
+ /* Floating point registers. */
+ for (i = 0; i < 32; i++)
+ {
+ int regnum = i + FP0_REGNUM;
+ trad_frame_set_reg_addr (this_cache, regnum,
+ fpregs + i * tdep->wordsize);
+ }
+ trad_frame_set_reg_addr (this_cache, tdep->ppc_fpscr_regnum,
+ fpregs + 32 * tdep->wordsize);
+ }
+ trad_frame_set_id (this_cache, frame_id_build (base, func));
+}
+
+static void
+ppc32_linux_sigaction_cache_init (const struct tramp_frame *self,
+ struct frame_info *next_frame,
+ struct trad_frame_cache *this_cache,
+ CORE_ADDR func)
+{
+ ppc_linux_sigtramp_cache (next_frame, this_cache, func,
+ 0xd0 /* Offset to ucontext_t. */
+ + 0x30 /* Offset to .reg. */,
+ 0);
+}
+
+static void
+ppc64_linux_sigaction_cache_init (const struct tramp_frame *self,
+ struct frame_info *next_frame,
+ struct trad_frame_cache *this_cache,
+ CORE_ADDR func)
+{
+ ppc_linux_sigtramp_cache (next_frame, this_cache, func,
+ 0x80 /* Offset to ucontext_t. */
+ + 0xe0 /* Offset to .reg. */,
+ 128);
+}
+
+static void
+ppc32_linux_sighandler_cache_init (const struct tramp_frame *self,
+ struct frame_info *next_frame,
+ struct trad_frame_cache *this_cache,
+ CORE_ADDR func)
+{
+ ppc_linux_sigtramp_cache (next_frame, this_cache, func,
+ 0x40 /* Offset to ucontext_t. */
+ + 0x1c /* Offset to .reg. */,
+ 0);
+}
+
+static void
+ppc64_linux_sighandler_cache_init (const struct tramp_frame *self,
+ struct frame_info *next_frame,
+ struct trad_frame_cache *this_cache,
+ CORE_ADDR func)
+{
+ ppc_linux_sigtramp_cache (next_frame, this_cache, func,
+ 0x80 /* Offset to struct sigcontext. */
+ + 0x38 /* Offset to .reg. */,
+ 128);
+}
+
+static struct tramp_frame ppc32_linux_sigaction_tramp_frame = {
+ SIGTRAMP_FRAME,
+ 4,
+ {
+ { 0x380000ac, -1 }, /* li r0, 172 */
+ { 0x44000002, -1 }, /* sc */
+ { TRAMP_SENTINEL_INSN },
+ },
+ ppc32_linux_sigaction_cache_init
+};
+static struct tramp_frame ppc64_linux_sigaction_tramp_frame = {
+ SIGTRAMP_FRAME,
+ 4,
+ {
+ { 0x38210080, -1 }, /* addi r1,r1,128 */
+ { 0x380000ac, -1 }, /* li r0, 172 */
+ { 0x44000002, -1 }, /* sc */
+ { TRAMP_SENTINEL_INSN },
+ },
+ ppc64_linux_sigaction_cache_init
+};
+static struct tramp_frame ppc32_linux_sighandler_tramp_frame = {
+ SIGTRAMP_FRAME,
+ 4,
+ {
+ { 0x38000077, -1 }, /* li r0,119 */
+ { 0x44000002, -1 }, /* sc */
+ { TRAMP_SENTINEL_INSN },
+ },
+ ppc32_linux_sighandler_cache_init
+};
+static struct tramp_frame ppc64_linux_sighandler_tramp_frame = {
+ SIGTRAMP_FRAME,
+ 4,
+ {
+ { 0x38210080, -1 }, /* addi r1,r1,128 */
+ { 0x38000077, -1 }, /* li r0,119 */
+ { 0x44000002, -1 }, /* sc */
+ { TRAMP_SENTINEL_INSN },
+ },
+ ppc64_linux_sighandler_cache_init
+};
+
+static void
+ppc_linux_init_abi (struct gdbarch_info info,
+ struct gdbarch *gdbarch)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ /* NOTE: jimb/2004-03-26: The System V ABI PowerPC Processor
+ Supplement says that long doubles are sixteen bytes long.
+ However, as one of the known warts of its ABI, PPC GNU/Linux uses
+ eight-byte long doubles. GCC only recently got 128-bit long
+ double support on PPC, so it may be changing soon. The
+ Linux[sic] Standards Base says that programs that use 'long
+ double' on PPC GNU/Linux are non-conformant. */
+ /* NOTE: cagney/2005-01-25: True for both 32- and 64-bit. */
+ set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
+
+ if (tdep->wordsize == 4)
+ {
+ /* Until November 2001, gcc did not comply with the 32 bit SysV
+ R4 ABI requirement that structures less than or equal to 8
+ bytes should be returned in registers. Instead GCC was using
+ the the AIX/PowerOpen ABI - everything returned in memory
+ (well ignoring vectors that is). When this was corrected, it
+ wasn't fixed for GNU/Linux native platform. Use the
+ PowerOpen struct convention. */
+ set_gdbarch_return_value (gdbarch, ppc_linux_return_value);
+
+ set_gdbarch_memory_remove_breakpoint (gdbarch,
+ ppc_linux_memory_remove_breakpoint);
+
+ /* Shared library handling. */
+ set_gdbarch_skip_trampoline_code (gdbarch,
+ ppc_linux_skip_trampoline_code);
+ set_solib_svr4_fetch_link_map_offsets
+ (gdbarch, svr4_ilp32_fetch_link_map_offsets);
+
+ /* Trampolines. */
+ tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sigaction_tramp_frame);
+ tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sighandler_tramp_frame);
+ }
+
+ if (tdep->wordsize == 8)
+ {
+ /* Handle PPC64 GNU/Linux function pointers (which are really
+ function descriptors). */
+ set_gdbarch_convert_from_func_ptr_addr
+ (gdbarch, ppc64_linux_convert_from_func_ptr_addr);
+ set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code);
+
+ /* Shared library handling. */
+ set_solib_svr4_fetch_link_map_offsets
+ (gdbarch, svr4_lp64_fetch_link_map_offsets);
+
+ /* Trampolines. */
+ tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sigaction_tramp_frame);
+ tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sighandler_tramp_frame);
+ }
+ set_gdbarch_regset_from_core_section (gdbarch, ppc_linux_regset_from_core_section);
+
+ /* Enable TLS support. */
+ set_gdbarch_fetch_tls_load_module_address (gdbarch,
+ svr4_fetch_objfile_link_map);
+}
+
+void
+_initialize_ppc_linux_tdep (void)
+{
+ /* Register for all sub-familes of the POWER/PowerPC: 32-bit and
+ 64-bit PowerPC, and the older rs6k. */
+ gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX,
+ ppc_linux_init_abi);
+ gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX,
+ ppc_linux_init_abi);
+ gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX,
+ ppc_linux_init_abi);
+}