/* Target-dependent code for GDB, the GNU debugger.
Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
- 1997, 2000, 2001, 2002 Free Software Foundation, Inc.
+ 1997, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
This file is part of GDB.
#include "objfiles.h"
#include "regcache.h"
#include "value.h"
-
+#include "osabi.h"
+#include "regset.h"
#include "solib-svr4.h"
#include "ppc-tdep.h"
+#include "trad-frame.h"
+#include "frame-unwind.h"
+
+/* The following instructions are used in the signal trampoline code
+ on GNU/Linux PPC. The kernel used to use magic syscalls 0x6666 and
+ 0x7777 but now uses the sigreturn syscalls. We check for both. */
+#define INSTR_LI_R0_0x6666 0x38006666
+#define INSTR_LI_R0_0x7777 0x38007777
+#define INSTR_LI_R0_NR_sigreturn 0x38000077
+#define INSTR_LI_R0_NR_rt_sigreturn 0x380000AC
-/* The following two instructions are used in the signal trampoline
- code on GNU/Linux PPC. */
-#define INSTR_LI_R0_0x7777 0x38007777
-#define INSTR_SC 0x44000002
+#define INSTR_SC 0x44000002
/* Since the *-tdep.c files are platform independent (i.e, they may be
used to build cross platform debuggers), we can't include system
/* Determine if pc is in a signal trampoline...
Ha! That's not what this does at all. wait_for_inferior in
- infrun.c calls PC_IN_SIGTRAMP in order to detect entry into a
+ infrun.c calls get_frame_type() in order to detect entry into a
signal trampoline just after delivery of a signal. But on
GNU/Linux, signal trampolines are used for the return path only.
The kernel sets things up so that the signal handler is called
signal is delivered while stepping, the next instruction that
would've been stepped over isn't, instead a signal is delivered and
the first instruction of the handler is stepped over instead. That
- puts us on the second instruction. (I added the test for the
- first instruction long after the fact, just in case the observed
- behavior is ever fixed.)
-
- PC_IN_SIGTRAMP is called from blockframe.c as well in order to set
- the signal_handler_caller flag. Because of our strange definition
- of in_sigtramp below, we can't rely on signal_handler_caller
- getting set correctly from within blockframe.c. This is why we
- take pains to set it in init_extra_frame_info(). */
+ puts us on the second instruction. (I added the test for the first
+ instruction long after the fact, just in case the observed behavior
+ is ever fixed.) */
int
ppc_linux_in_sigtramp (CORE_ADDR pc, char *func_name)
return (pc == handler || pc == handler + 4);
}
+static int
+insn_is_sigreturn (unsigned long pcinsn)
+{
+ switch(pcinsn)
+ {
+ case INSTR_LI_R0_0x6666:
+ case INSTR_LI_R0_0x7777:
+ case INSTR_LI_R0_NR_sigreturn:
+ case INSTR_LI_R0_NR_rt_sigreturn:
+ return 1;
+ default:
+ return 0;
+ }
+}
+
/*
* The signal handler trampoline is on the stack and consists of exactly
* two instructions. The easiest and most accurate way of determining
pcinsn = extract_unsigned_integer (buf + 4, 4);
return (
- (pcinsn == INSTR_LI_R0_0x7777
+ (insn_is_sigreturn (pcinsn)
&& extract_unsigned_integer (buf + 8, 4) == INSTR_SC)
||
(pcinsn == INSTR_SC
- && extract_unsigned_integer (buf, 4) == INSTR_LI_R0_0x7777));
+ && insn_is_sigreturn (extract_unsigned_integer (buf, 4))));
}
-CORE_ADDR
+static CORE_ADDR
ppc_linux_skip_trampoline_code (CORE_ADDR pc)
{
char buf[4];
/* Get address of the relocation entry (Elf32_Rela) */
if (target_read_memory (plt_table + reloc_index, buf, 4) != 0)
return 0;
- reloc = extract_address (buf, 4);
+ reloc = extract_unsigned_integer (buf, 4);
sect = find_pc_section (reloc);
if (!sect)
/* This might not work right if we have multiple symbols with the
same name; the only way to really get it right is to perform
the same sort of lookup as the dynamic linker. */
- msymbol = lookup_minimal_symbol_text (symname, NULL, NULL);
+ msymbol = lookup_minimal_symbol_text (symname, NULL);
if (!msymbol)
return 0;
return SYMBOL_VALUE_ADDRESS (msymbol);
}
-/* The rs6000 version of FRAME_SAVED_PC will almost work for us. The
- signal handler details are different, so we'll handle those here
- and call the rs6000 version to do the rest. */
-CORE_ADDR
-ppc_linux_frame_saved_pc (struct frame_info *fi)
-{
- if (fi->signal_handler_caller)
- {
- CORE_ADDR regs_addr =
- read_memory_integer (fi->frame + PPC_LINUX_REGS_PTR_OFFSET, 4);
- /* return the NIP in the regs array */
- return read_memory_integer (regs_addr + 4 * PPC_LINUX_PT_NIP, 4);
- }
- else if (fi->next && fi->next->signal_handler_caller)
- {
- CORE_ADDR regs_addr =
- read_memory_integer (fi->next->frame + PPC_LINUX_REGS_PTR_OFFSET, 4);
- /* return LNK in the regs array */
- return read_memory_integer (regs_addr + 4 * PPC_LINUX_PT_LNK, 4);
- }
- else
- return rs6000_frame_saved_pc (fi);
-}
-
-void
-ppc_linux_init_extra_frame_info (int fromleaf, struct frame_info *fi)
-{
- rs6000_init_extra_frame_info (fromleaf, fi);
-
- if (fi->next != 0)
- {
- /* We're called from get_prev_frame_info; check to see if
- this is a signal frame by looking to see if the pc points
- at trampoline code */
- if (ppc_linux_at_sigtramp_return_path (fi->pc))
- fi->signal_handler_caller = 1;
- else
- fi->signal_handler_caller = 0;
- }
-}
-
-int
-ppc_linux_frameless_function_invocation (struct frame_info *fi)
-{
- /* We'll find the wrong thing if we let
- rs6000_frameless_function_invocation () search for a signal trampoline */
- if (ppc_linux_at_sigtramp_return_path (fi->pc))
- return 0;
- else
- return rs6000_frameless_function_invocation (fi);
-}
-
-void
-ppc_linux_frame_init_saved_regs (struct frame_info *fi)
-{
- if (fi->signal_handler_caller)
- {
- CORE_ADDR regs_addr;
- int i;
- if (fi->saved_regs)
- return;
-
- frame_saved_regs_zalloc (fi);
-
- regs_addr =
- read_memory_integer (fi->frame + PPC_LINUX_REGS_PTR_OFFSET, 4);
- fi->saved_regs[PC_REGNUM] = regs_addr + 4 * PPC_LINUX_PT_NIP;
- fi->saved_regs[gdbarch_tdep (current_gdbarch)->ppc_ps_regnum] =
- regs_addr + 4 * PPC_LINUX_PT_MSR;
- fi->saved_regs[gdbarch_tdep (current_gdbarch)->ppc_cr_regnum] =
- regs_addr + 4 * PPC_LINUX_PT_CCR;
- fi->saved_regs[gdbarch_tdep (current_gdbarch)->ppc_lr_regnum] =
- regs_addr + 4 * PPC_LINUX_PT_LNK;
- fi->saved_regs[gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum] =
- regs_addr + 4 * PPC_LINUX_PT_CTR;
- fi->saved_regs[gdbarch_tdep (current_gdbarch)->ppc_xer_regnum] =
- regs_addr + 4 * PPC_LINUX_PT_XER;
- fi->saved_regs[gdbarch_tdep (current_gdbarch)->ppc_mq_regnum] =
- regs_addr + 4 * PPC_LINUX_PT_MQ;
- for (i = 0; i < 32; i++)
- fi->saved_regs[gdbarch_tdep (current_gdbarch)->ppc_gp0_regnum + i] =
- regs_addr + 4 * PPC_LINUX_PT_R0 + 4 * i;
- for (i = 0; i < 32; i++)
- fi->saved_regs[FP0_REGNUM + i] = regs_addr + 4 * PPC_LINUX_PT_FPR0 + 8 * i;
- }
- else
- rs6000_frame_init_saved_regs (fi);
-}
-
-CORE_ADDR
-ppc_linux_frame_chain (struct frame_info *thisframe)
-{
- /* Kernel properly constructs the frame chain for the handler */
- if (thisframe->signal_handler_caller)
- return read_memory_integer ((thisframe)->frame, 4);
- else
- return rs6000_frame_chain (thisframe);
-}
-
-/* FIXME: Move the following to rs6000-tdep.c (or some other file where
- it may be used generically by ports which use either the SysV ABI or
- the EABI */
-
-/* Until November 2001, gcc was not complying to the SYSV ABI for
- returning structures less than or equal to 8 bytes in size. It was
- returning everything in memory. When this was corrected, it wasn't
- fixed for native platforms. */
-int
-ppc_sysv_abi_broken_use_struct_convention (int gcc_p, struct type *value_type)
-{
- if (TYPE_LENGTH (value_type) == 16
- && TYPE_VECTOR (value_type))
- return 0;
-
- return generic_use_struct_convention (gcc_p, value_type);
-}
-
-/* Structures 8 bytes or less long are returned in the r3 & r4
- registers, according to the SYSV ABI. */
-int
-ppc_sysv_abi_use_struct_convention (int gcc_p, struct type *value_type)
-{
- if (TYPE_LENGTH (value_type) == 16
- && TYPE_VECTOR (value_type))
- return 0;
-
- return (TYPE_LENGTH (value_type) > 8);
-}
-
-/* round2 rounds x up to the nearest multiple of s assuming that s is a
- power of 2 */
-
-#undef round2
-#define round2(x,s) ((((long) (x) - 1) & ~(long)((s)-1)) + (s))
-
-/* Pass the arguments in either registers, or in the stack. Using the
- ppc sysv ABI, the first eight words of the argument list (that might
- be less than eight parameters if some parameters occupy more than one
- word) are passed in r3..r10 registers. float and double parameters are
- passed in fpr's, in addition to that. Rest of the parameters if any
- are passed in user stack.
-
- If the function is returning a structure, then the return address is passed
- in r3, then the first 7 words of the parametes can be passed in registers,
- starting from r4. */
-
-CORE_ADDR
-ppc_sysv_abi_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
- int struct_return, CORE_ADDR struct_addr)
-{
- int argno;
- /* Next available general register for non-float, non-vector arguments. */
- int greg;
- /* Next available floating point register for float arguments. */
- int freg;
- /* Next available vector register for vector arguments. */
- int vreg;
- int argstkspace;
- int structstkspace;
- int argoffset;
- int structoffset;
- struct value *arg;
- struct type *type;
- int len;
- char old_sp_buf[4];
- CORE_ADDR saved_sp;
-
- greg = struct_return ? 4 : 3;
- freg = 1;
- vreg = 2;
- argstkspace = 0;
- structstkspace = 0;
-
- /* Figure out how much new stack space is required for arguments
- which don't fit in registers. Unlike the PowerOpen ABI, the
- SysV ABI doesn't reserve any extra space for parameters which
- are put in registers. */
- for (argno = 0; argno < nargs; argno++)
- {
- arg = args[argno];
- type = check_typedef (VALUE_TYPE (arg));
- len = TYPE_LENGTH (type);
-
- if (TYPE_CODE (type) == TYPE_CODE_FLT)
- {
- if (freg <= 8)
- freg++;
- else
- {
- /* SysV ABI converts floats to doubles when placed in
- memory and requires 8 byte alignment */
- if (argstkspace & 0x4)
- argstkspace += 4;
- argstkspace += 8;
- }
- }
- else if (TYPE_CODE (type) == TYPE_CODE_INT && len == 8) /* long long */
- {
- if (greg > 9)
- {
- greg = 11;
- if (argstkspace & 0x4)
- argstkspace += 4;
- argstkspace += 8;
- }
- else
- {
- if ((greg & 1) == 0)
- greg++;
- greg += 2;
- }
- }
- else if (!TYPE_VECTOR (type))
- {
- if (len > 4
- || TYPE_CODE (type) == TYPE_CODE_STRUCT
- || TYPE_CODE (type) == TYPE_CODE_UNION)
- {
- /* Rounding to the nearest multiple of 8 may not be necessary,
- but it is safe. Particularly since we don't know the
- field types of the structure */
- structstkspace += round2 (len, 8);
- }
- if (greg <= 10)
- greg++;
- else
- argstkspace += 4;
- }
- else
- {
- if (len == 16
- && TYPE_CODE (type) == TYPE_CODE_ARRAY
- && TYPE_VECTOR (type))
- {
- if (vreg <= 13)
- vreg++;
- else
- {
- /* Vector arguments must be aligned to 16 bytes on
- the stack. */
- argstkspace += round2 (argstkspace, 16);
- argstkspace += 16;
- }
- }
- }
- }
-
- /* Get current SP location */
- saved_sp = read_sp ();
-
- sp -= argstkspace + structstkspace;
-
- /* Allocate space for backchain and callee's saved lr */
- sp -= 8;
-
- /* Make sure that we maintain 16 byte alignment */
- sp &= ~0x0f;
-
- /* Update %sp before proceeding any further */
- write_register (SP_REGNUM, sp);
-
- /* write the backchain */
- store_address (old_sp_buf, 4, saved_sp);
- write_memory (sp, old_sp_buf, 4);
-
- argoffset = 8;
- structoffset = argoffset + argstkspace;
- freg = 1;
- greg = 3;
- vreg = 2;
- /* Fill in r3 with the return structure, if any */
- if (struct_return)
- {
- char val_buf[4];
- store_address (val_buf, 4, struct_addr);
- memcpy (®isters[REGISTER_BYTE (greg)], val_buf, 4);
- greg++;
- }
- /* Now fill in the registers and stack... */
- for (argno = 0; argno < nargs; argno++)
- {
- arg = args[argno];
- type = check_typedef (VALUE_TYPE (arg));
- len = TYPE_LENGTH (type);
-
- if (TYPE_CODE (type) == TYPE_CODE_FLT)
- {
- if (freg <= 8)
- {
- if (len > 8)
- printf_unfiltered (
- "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
- memcpy (®isters[REGISTER_BYTE (FP0_REGNUM + freg)],
- VALUE_CONTENTS (arg), len);
- freg++;
- }
- else
- {
- /* SysV ABI converts floats to doubles when placed in
- memory and requires 8 byte alignment */
- /* FIXME: Convert floats to doubles */
- if (argoffset & 0x4)
- argoffset += 4;
- write_memory (sp + argoffset, (char *) VALUE_CONTENTS (arg), len);
- argoffset += 8;
- }
- }
- else if (TYPE_CODE (type) == TYPE_CODE_INT && len == 8) /* long long */
- {
- if (greg > 9)
- {
- greg = 11;
- if (argoffset & 0x4)
- argoffset += 4;
- write_memory (sp + argoffset, (char *) VALUE_CONTENTS (arg), len);
- argoffset += 8;
- }
- else
- {
- if ((greg & 1) == 0)
- greg++;
-
- memcpy (®isters[REGISTER_BYTE (greg)],
- VALUE_CONTENTS (arg), 4);
- memcpy (®isters[REGISTER_BYTE (greg + 1)],
- VALUE_CONTENTS (arg) + 4, 4);
- greg += 2;
- }
- }
- else if (!TYPE_VECTOR (type))
- {
- char val_buf[4];
- if (len > 4
- || TYPE_CODE (type) == TYPE_CODE_STRUCT
- || TYPE_CODE (type) == TYPE_CODE_UNION)
- {
- write_memory (sp + structoffset, VALUE_CONTENTS (arg), len);
- store_address (val_buf, 4, sp + structoffset);
- structoffset += round2 (len, 8);
- }
- else
- {
- memset (val_buf, 0, 4);
- memcpy (val_buf, VALUE_CONTENTS (arg), len);
- }
- if (greg <= 10)
- {
- memcpy (®isters[REGISTER_BYTE (greg)], val_buf, 4);
- greg++;
- }
- else
- {
- write_memory (sp + argoffset, val_buf, 4);
- argoffset += 4;
- }
- }
- else
- {
- if (len == 16
- && TYPE_CODE (type) == TYPE_CODE_ARRAY
- && TYPE_VECTOR (type))
- {
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
- char *v_val_buf = alloca (16);
- memset (v_val_buf, 0, 16);
- memcpy (v_val_buf, VALUE_CONTENTS (arg), len);
- if (vreg <= 13)
- {
- memcpy (®isters[REGISTER_BYTE (tdep->ppc_vr0_regnum
- + vreg)],
- v_val_buf, 16);
- vreg++;
- }
- else
- {
- write_memory (sp + argoffset, v_val_buf, 16);
- argoffset += 16;
- }
- }
- }
- }
-
- target_store_registers (-1);
- return sp;
-}
-
/* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint
in much the same fashion as memory_remove_breakpoint in mem-break.c,
but is careful not to write back the previous contents if the code
return val;
}
+/* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather
+ than the 32 bit SYSV R4 ABI structure return convention - all
+ structures, no matter their size, are put in memory. Vectors,
+ which were added later, do get returned in a register though. */
+
+static enum return_value_convention
+ppc_linux_return_value (struct gdbarch *gdbarch, struct type *valtype,
+ struct regcache *regcache, void *readbuf,
+ const void *writebuf)
+{
+ if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
+ || TYPE_CODE (valtype) == TYPE_CODE_UNION)
+ && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
+ && TYPE_VECTOR (valtype)))
+ return RETURN_VALUE_STRUCT_CONVENTION;
+ else
+ return ppc_sysv_abi_return_value (gdbarch, valtype, regcache, readbuf,
+ writebuf);
+}
+
/* Fetch (and possibly build) an appropriate link_map_offsets
structure for GNU/Linux PPC targets using the struct offsets
defined in link.h (but without actual reference to that file).
return lmp;
}
+
+
+/* Macros for matching instructions. Note that, since all the
+ operands are masked off before they're or-ed into the instruction,
+ you can use -1 to make masks. */
+
+#define insn_d(opcd, rts, ra, d) \
+ ((((opcd) & 0x3f) << 26) \
+ | (((rts) & 0x1f) << 21) \
+ | (((ra) & 0x1f) << 16) \
+ | ((d) & 0xffff))
+
+#define insn_ds(opcd, rts, ra, d, xo) \
+ ((((opcd) & 0x3f) << 26) \
+ | (((rts) & 0x1f) << 21) \
+ | (((ra) & 0x1f) << 16) \
+ | ((d) & 0xfffc) \
+ | ((xo) & 0x3))
+
+#define insn_xfx(opcd, rts, spr, xo) \
+ ((((opcd) & 0x3f) << 26) \
+ | (((rts) & 0x1f) << 21) \
+ | (((spr) & 0x1f) << 16) \
+ | (((spr) & 0x3e0) << 6) \
+ | (((xo) & 0x3ff) << 1))
+
+/* Read a PPC instruction from memory. PPC instructions are always
+ big-endian, no matter what endianness the program is running in, so
+ we can't use read_memory_integer or one of its friends here. */
+static unsigned int
+read_insn (CORE_ADDR pc)
+{
+ unsigned char buf[4];
+
+ read_memory (pc, buf, 4);
+ return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
+}
+
+
+/* An instruction to match. */
+struct insn_pattern
+{
+ unsigned int mask; /* mask the insn with this... */
+ unsigned int data; /* ...and see if it matches this. */
+ int optional; /* If non-zero, this insn may be absent. */
+};
+
+/* Return non-zero if the instructions at PC match the series
+ described in PATTERN, or zero otherwise. PATTERN is an array of
+ 'struct insn_pattern' objects, terminated by an entry whose mask is
+ zero.
+
+ When the match is successful, fill INSN[i] with what PATTERN[i]
+ matched. If PATTERN[i] is optional, and the instruction wasn't
+ present, set INSN[i] to 0 (which is not a valid PPC instruction).
+ INSN should have as many elements as PATTERN. Note that, if
+ PATTERN contains optional instructions which aren't present in
+ memory, then INSN will have holes, so INSN[i] isn't necessarily the
+ i'th instruction in memory. */
+static int
+insns_match_pattern (CORE_ADDR pc,
+ struct insn_pattern *pattern,
+ unsigned int *insn)
+{
+ int i;
+
+ for (i = 0; pattern[i].mask; i++)
+ {
+ insn[i] = read_insn (pc);
+ if ((insn[i] & pattern[i].mask) == pattern[i].data)
+ pc += 4;
+ else if (pattern[i].optional)
+ insn[i] = 0;
+ else
+ return 0;
+ }
+
+ return 1;
+}
+
+
+/* Return the 'd' field of the d-form instruction INSN, properly
+ sign-extended. */
+static CORE_ADDR
+insn_d_field (unsigned int insn)
+{
+ return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
+}
+
+
+/* Return the 'ds' field of the ds-form instruction INSN, with the two
+ zero bits concatenated at the right, and properly
+ sign-extended. */
+static CORE_ADDR
+insn_ds_field (unsigned int insn)
+{
+ return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
+}
+
+
+/* If DESC is the address of a 64-bit PowerPC GNU/Linux function
+ descriptor, return the descriptor's entry point. */
+static CORE_ADDR
+ppc64_desc_entry_point (CORE_ADDR desc)
+{
+ /* The first word of the descriptor is the entry point. */
+ return (CORE_ADDR) read_memory_unsigned_integer (desc, 8);
+}
+
+
+/* Pattern for the standard linkage function. These are built by
+ build_plt_stub in elf64-ppc.c, whose GLINK argument is always
+ zero. */
+static struct insn_pattern ppc64_standard_linkage[] =
+ {
+ /* addis r12, r2, <any> */
+ { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
+
+ /* std r2, 40(r1) */
+ { -1, insn_ds (62, 2, 1, 40, 0), 0 },
+
+ /* ld r11, <any>(r12) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
+
+ /* addis r12, r12, 1 <optional> */
+ { insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 },
+
+ /* ld r2, <any>(r12) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
+
+ /* addis r12, r12, 1 <optional> */
+ { insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 },
+
+ /* mtctr r11 */
+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467),
+ 0 },
+
+ /* ld r11, <any>(r12) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
+
+ /* bctr */
+ { -1, 0x4e800420, 0 },
+
+ { 0, 0, 0 }
+ };
+#define PPC64_STANDARD_LINKAGE_LEN \
+ (sizeof (ppc64_standard_linkage) / sizeof (ppc64_standard_linkage[0]))
+
+
+/* Recognize a 64-bit PowerPC GNU/Linux linkage function --- what GDB
+ calls a "solib trampoline". */
+static int
+ppc64_in_solib_call_trampoline (CORE_ADDR pc, char *name)
+{
+ /* Detecting solib call trampolines on PPC64 GNU/Linux is a pain.
+
+ It's not specifically solib call trampolines that are the issue.
+ Any call from one function to another function that uses a
+ different TOC requires a trampoline, to save the caller's TOC
+ pointer and then load the callee's TOC. An executable or shared
+ library may have more than one TOC, so even intra-object calls
+ may require a trampoline. Since executable and shared libraries
+ will all have their own distinct TOCs, every inter-object call is
+ also an inter-TOC call, and requires a trampoline --- so "solib
+ call trampolines" are just a special case.
+
+ The 64-bit PowerPC GNU/Linux ABI calls these call trampolines
+ "linkage functions". Since they need to be near the functions
+ that call them, they all appear in .text, not in any special
+ section. The .plt section just contains an array of function
+ descriptors, from which the linkage functions load the callee's
+ entry point, TOC value, and environment pointer. So
+ in_plt_section is useless. The linkage functions don't have any
+ special linker symbols to name them, either.
+
+ The only way I can see to recognize them is to actually look at
+ their code. They're generated by ppc_build_one_stub and some
+ other functions in bfd/elf64-ppc.c, so that should show us all
+ the instruction sequences we need to recognize. */
+ unsigned int insn[PPC64_STANDARD_LINKAGE_LEN];
+
+ return insns_match_pattern (pc, ppc64_standard_linkage, insn);
+}
+
+
+/* When the dynamic linker is doing lazy symbol resolution, the first
+ call to a function in another object will go like this:
+
+ - The user's function calls the linkage function:
+
+ 100007c4: 4b ff fc d5 bl 10000498
+ 100007c8: e8 41 00 28 ld r2,40(r1)
+
+ - The linkage function loads the entry point (and other stuff) from
+ the function descriptor in the PLT, and jumps to it:
+
+ 10000498: 3d 82 00 00 addis r12,r2,0
+ 1000049c: f8 41 00 28 std r2,40(r1)
+ 100004a0: e9 6c 80 98 ld r11,-32616(r12)
+ 100004a4: e8 4c 80 a0 ld r2,-32608(r12)
+ 100004a8: 7d 69 03 a6 mtctr r11
+ 100004ac: e9 6c 80 a8 ld r11,-32600(r12)
+ 100004b0: 4e 80 04 20 bctr
+
+ - But since this is the first time that PLT entry has been used, it
+ sends control to its glink entry. That loads the number of the
+ PLT entry and jumps to the common glink0 code:
+
+ 10000c98: 38 00 00 00 li r0,0
+ 10000c9c: 4b ff ff dc b 10000c78
+
+ - The common glink0 code then transfers control to the dynamic
+ linker's fixup code:
+
+ 10000c78: e8 41 00 28 ld r2,40(r1)
+ 10000c7c: 3d 82 00 00 addis r12,r2,0
+ 10000c80: e9 6c 80 80 ld r11,-32640(r12)
+ 10000c84: e8 4c 80 88 ld r2,-32632(r12)
+ 10000c88: 7d 69 03 a6 mtctr r11
+ 10000c8c: e9 6c 80 90 ld r11,-32624(r12)
+ 10000c90: 4e 80 04 20 bctr
+
+ Eventually, this code will figure out how to skip all of this,
+ including the dynamic linker. At the moment, we just get through
+ the linkage function. */
+
+/* If the current thread is about to execute a series of instructions
+ at PC matching the ppc64_standard_linkage pattern, and INSN is the result
+ from that pattern match, return the code address to which the
+ standard linkage function will send them. (This doesn't deal with
+ dynamic linker lazy symbol resolution stubs.) */
+static CORE_ADDR
+ppc64_standard_linkage_target (CORE_ADDR pc, unsigned int *insn)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+
+ /* The address of the function descriptor this linkage function
+ references. */
+ CORE_ADDR desc
+ = ((CORE_ADDR) read_register (tdep->ppc_gp0_regnum + 2)
+ + (insn_d_field (insn[0]) << 16)
+ + insn_ds_field (insn[2]));
+
+ /* The first word of the descriptor is the entry point. Return that. */
+ return ppc64_desc_entry_point (desc);
+}
+
+
+/* Given that we've begun executing a call trampoline at PC, return
+ the entry point of the function the trampoline will go to. */
+static CORE_ADDR
+ppc64_skip_trampoline_code (CORE_ADDR pc)
+{
+ unsigned int ppc64_standard_linkage_insn[PPC64_STANDARD_LINKAGE_LEN];
+
+ if (insns_match_pattern (pc, ppc64_standard_linkage,
+ ppc64_standard_linkage_insn))
+ return ppc64_standard_linkage_target (pc, ppc64_standard_linkage_insn);
+ else
+ return 0;
+}
+
+
+/* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG) on PPC64
+ GNU/Linux.
+
+ Usually a function pointer's representation is simply the address
+ of the function. On GNU/Linux on the 64-bit PowerPC however, a
+ function pointer is represented by a pointer to a TOC entry. This
+ TOC entry contains three words, the first word is the address of
+ the function, the second word is the TOC pointer (r2), and the
+ third word is the static chain value. Throughout GDB it is
+ currently assumed that a function pointer contains the address of
+ the function, which is not easy to fix. In addition, the
+ conversion of a function address to a function pointer would
+ require allocation of a TOC entry in the inferior's memory space,
+ with all its drawbacks. To be able to call C++ virtual methods in
+ the inferior (which are called via function pointers),
+ find_function_addr uses this function to get the function address
+ from a function pointer. */
+
+/* If ADDR points at what is clearly a function descriptor, transform
+ it into the address of the corresponding function. Be
+ conservative, otherwize GDB will do the transformation on any
+ random addresses such as occures when there is no symbol table. */
+
+static CORE_ADDR
+ppc64_linux_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
+ CORE_ADDR addr,
+ struct target_ops *targ)
+{
+ struct section_table *s = target_section_by_addr (targ, addr);
+
+ /* Check if ADDR points to a function descriptor. */
+ if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
+ return get_target_memory_unsigned (targ, addr, 8);
+
+ return addr;
+}
+
+static void
+right_supply_register (struct regcache *regcache, int wordsize, int regnum,
+ const bfd_byte *buf)
+{
+ regcache_raw_supply (regcache, regnum,
+ (buf + wordsize
+ - register_size (current_gdbarch, regnum)));
+}
+
+/* Extract the register values found in the WORDSIZED ABI GREGSET,
+ storing their values in REGCACHE. Note that some are left-aligned,
+ while others are right aligned. */
+
+void
+ppc_linux_supply_gregset (struct regcache *regcache,
+ int regnum, const void *gregs, size_t size,
+ int wordsize)
+{
+ int regi;
+ struct gdbarch *regcache_arch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *regcache_tdep = gdbarch_tdep (regcache_arch);
+ const bfd_byte *buf = gregs;
+
+ for (regi = 0; regi < ppc_num_gprs; regi++)
+ right_supply_register (regcache, wordsize,
+ regcache_tdep->ppc_gp0_regnum + regi,
+ buf + wordsize * regi);
+
+ right_supply_register (regcache, wordsize, gdbarch_pc_regnum (regcache_arch),
+ buf + wordsize * PPC_LINUX_PT_NIP);
+ right_supply_register (regcache, wordsize, regcache_tdep->ppc_lr_regnum,
+ buf + wordsize * PPC_LINUX_PT_LNK);
+ regcache_raw_supply (regcache, regcache_tdep->ppc_cr_regnum,
+ buf + wordsize * PPC_LINUX_PT_CCR);
+ regcache_raw_supply (regcache, regcache_tdep->ppc_xer_regnum,
+ buf + wordsize * PPC_LINUX_PT_XER);
+ regcache_raw_supply (regcache, regcache_tdep->ppc_ctr_regnum,
+ buf + wordsize * PPC_LINUX_PT_CTR);
+ if (regcache_tdep->ppc_mq_regnum != -1)
+ right_supply_register (regcache, wordsize, regcache_tdep->ppc_mq_regnum,
+ buf + wordsize * PPC_LINUX_PT_MQ);
+ right_supply_register (regcache, wordsize, regcache_tdep->ppc_ps_regnum,
+ buf + wordsize * PPC_LINUX_PT_MSR);
+}
+
+static void
+ppc32_linux_supply_gregset (const struct regset *regset,
+ struct regcache *regcache,
+ int regnum, const void *gregs, size_t size)
+{
+ ppc_linux_supply_gregset (regcache, regnum, gregs, size, 4);
+}
+
+static struct regset ppc32_linux_gregset = {
+ NULL, ppc32_linux_supply_gregset
+};
+
+struct ppc_linux_sigtramp_cache
+{
+ CORE_ADDR base;
+ struct trad_frame_saved_reg *saved_regs;
+};
+
+static struct ppc_linux_sigtramp_cache *
+ppc_linux_sigtramp_cache (struct frame_info *next_frame, void **this_cache)
+{
+ CORE_ADDR regs;
+ CORE_ADDR gpregs;
+ CORE_ADDR fpregs;
+ int i;
+ struct ppc_linux_sigtramp_cache *cache;
+ struct gdbarch *gdbarch = get_frame_arch (next_frame);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if ((*this_cache) != NULL)
+ return (*this_cache);
+ cache = FRAME_OBSTACK_ZALLOC (struct ppc_linux_sigtramp_cache);
+ (*this_cache) = cache;
+ cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
+
+ cache->base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
+
+ /* Find the register pointer, which gives the address of the
+ register buffers. */
+ if (tdep->wordsize == 4)
+ regs = (cache->base
+ + 0xd0 /* Offset to ucontext_t. */
+ + 0x30 /* Offset to .reg. */);
+ else
+ regs = (cache->base
+ + 0x80 /* Offset to ucontext_t. */
+ + 0xe0 /* Offset to .reg. */);
+ /* And the corresponding register buffers. */
+ gpregs = read_memory_unsigned_integer (regs, tdep->wordsize);
+ fpregs = gpregs + 48 * tdep->wordsize;
+
+ /* General purpose. */
+ for (i = 0; i < ppc_num_gprs; i++)
+ {
+ int regnum = i + tdep->ppc_gp0_regnum;
+ cache->saved_regs[regnum].addr = gpregs + i * tdep->wordsize;
+ }
+ cache->saved_regs[PC_REGNUM].addr = gpregs + 32 * tdep->wordsize;
+ cache->saved_regs[tdep->ppc_ctr_regnum].addr = gpregs + 35 * tdep->wordsize;
+ cache->saved_regs[tdep->ppc_lr_regnum].addr = gpregs + 36 * tdep->wordsize;
+ cache->saved_regs[tdep->ppc_xer_regnum].addr = gpregs + 37 * tdep->wordsize;
+ cache->saved_regs[tdep->ppc_cr_regnum].addr = gpregs + 38 * tdep->wordsize;
+
+ /* Floating point registers. */
+ if (ppc_floating_point_unit_p (gdbarch))
+ {
+ for (i = 0; i < ppc_num_fprs; i++)
+ {
+ int regnum = i + tdep->ppc_fp0_regnum;
+ cache->saved_regs[regnum].addr = fpregs + i * tdep->wordsize;
+ }
+ cache->saved_regs[tdep->ppc_fpscr_regnum].addr
+ = fpregs + 32 * tdep->wordsize;
+ }
+
+ return cache;
+}
+
+static void
+ppc_linux_sigtramp_this_id (struct frame_info *next_frame, void **this_cache,
+ struct frame_id *this_id)
+{
+ struct ppc_linux_sigtramp_cache *info
+ = ppc_linux_sigtramp_cache (next_frame, this_cache);
+ (*this_id) = frame_id_build (info->base, frame_pc_unwind (next_frame));
+}
+
+static void
+ppc_linux_sigtramp_prev_register (struct frame_info *next_frame,
+ void **this_cache,
+ int regnum, int *optimizedp,
+ enum lval_type *lvalp, CORE_ADDR *addrp,
+ int *realnump, void *valuep)
+{
+ struct ppc_linux_sigtramp_cache *info
+ = ppc_linux_sigtramp_cache (next_frame, this_cache);
+ trad_frame_prev_register (next_frame, info->saved_regs, regnum,
+ optimizedp, lvalp, addrp, realnump, valuep);
+}
+
+static const struct frame_unwind ppc_linux_sigtramp_unwind =
+{
+ SIGTRAMP_FRAME,
+ ppc_linux_sigtramp_this_id,
+ ppc_linux_sigtramp_prev_register
+};
+
+static const struct frame_unwind *
+ppc_linux_sigtramp_sniffer (struct frame_info *next_frame)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
+ if (frame_pc_unwind (next_frame)
+ > frame_unwind_register_unsigned (next_frame, SP_REGNUM))
+ /* Assume anything that is vaguely on the stack is a signal
+ trampoline. */
+ return &ppc_linux_sigtramp_unwind;
+ else
+ return NULL;
+}
+
+static void
+ppc64_linux_supply_gregset (const struct regset *regset,
+ struct regcache * regcache,
+ int regnum, const void *gregs, size_t size)
+{
+ ppc_linux_supply_gregset (regcache, regnum, gregs, size, 8);
+}
+
+static struct regset ppc64_linux_gregset = {
+ NULL, ppc64_linux_supply_gregset
+};
+
+void
+ppc_linux_supply_fpregset (const struct regset *regset,
+ struct regcache * regcache,
+ int regnum, const void *fpset, size_t size)
+{
+ int regi;
+ struct gdbarch *regcache_arch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *regcache_tdep = gdbarch_tdep (regcache_arch);
+ const bfd_byte *buf = fpset;
+
+ if (! ppc_floating_point_unit_p (regcache_arch))
+ return;
+
+ for (regi = 0; regi < ppc_num_fprs; regi++)
+ regcache_raw_supply (regcache,
+ regcache_tdep->ppc_fp0_regnum + regi,
+ buf + 8 * regi);
+
+ /* The FPSCR is stored in the low order word of the last
+ doubleword in the fpregset. */
+ regcache_raw_supply (regcache, regcache_tdep->ppc_fpscr_regnum,
+ buf + 8 * 32 + 4);
+}
+
+static struct regset ppc_linux_fpregset = { NULL, ppc_linux_supply_fpregset };
+
+static const struct regset *
+ppc_linux_regset_from_core_section (struct gdbarch *core_arch,
+ const char *sect_name, size_t sect_size)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (core_arch);
+ if (strcmp (sect_name, ".reg") == 0)
+ {
+ if (tdep->wordsize == 4)
+ return &ppc32_linux_gregset;
+ else
+ return &ppc64_linux_gregset;
+ }
+ if (strcmp (sect_name, ".reg2") == 0)
+ return &ppc_linux_fpregset;
+ return NULL;
+}
+
+static void
+ppc_linux_init_abi (struct gdbarch_info info,
+ struct gdbarch *gdbarch)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (tdep->wordsize == 4)
+ {
+ /* NOTE: jimb/2004-03-26: The System V ABI PowerPC Processor
+ Supplement says that long doubles are sixteen bytes long.
+ However, as one of the known warts of its ABI, PPC GNU/Linux
+ uses eight-byte long doubles. GCC only recently got 128-bit
+ long double support on PPC, so it may be changing soon. The
+ Linux Standards Base says that programs that use 'long
+ double' on PPC GNU/Linux are non-conformant. */
+ set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
+
+ /* Until November 2001, gcc did not comply with the 32 bit SysV
+ R4 ABI requirement that structures less than or equal to 8
+ bytes should be returned in registers. Instead GCC was using
+ the the AIX/PowerOpen ABI - everything returned in memory
+ (well ignoring vectors that is). When this was corrected, it
+ wasn't fixed for GNU/Linux native platform. Use the
+ PowerOpen struct convention. */
+ set_gdbarch_return_value (gdbarch, ppc_linux_return_value);
+
+ set_gdbarch_memory_remove_breakpoint (gdbarch,
+ ppc_linux_memory_remove_breakpoint);
+
+ /* Shared library handling. */
+ set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section);
+ set_gdbarch_skip_trampoline_code (gdbarch,
+ ppc_linux_skip_trampoline_code);
+ set_solib_svr4_fetch_link_map_offsets
+ (gdbarch, ppc_linux_svr4_fetch_link_map_offsets);
+ }
+
+ if (tdep->wordsize == 8)
+ {
+ /* Handle PPC64 GNU/Linux function pointers (which are really
+ function descriptors). */
+ set_gdbarch_convert_from_func_ptr_addr
+ (gdbarch, ppc64_linux_convert_from_func_ptr_addr);
+
+ set_gdbarch_in_solib_call_trampoline
+ (gdbarch, ppc64_in_solib_call_trampoline);
+ set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code);
+
+ /* PPC64 malloc's entry-point is called ".malloc". */
+ set_gdbarch_name_of_malloc (gdbarch, ".malloc");
+ }
+ set_gdbarch_regset_from_core_section (gdbarch, ppc_linux_regset_from_core_section);
+ frame_unwind_append_sniffer (gdbarch, ppc_linux_sigtramp_sniffer);
+}
+
+void
+_initialize_ppc_linux_tdep (void)
+{
+ /* Register for all sub-familes of the POWER/PowerPC: 32-bit and
+ 64-bit PowerPC, and the older rs6k. */
+ gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX,
+ ppc_linux_init_abi);
+ gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX,
+ ppc_linux_init_abi);
+ gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX,
+ ppc_linux_init_abi);
+}