/* Target-dependent code for GDB, the GNU debugger.
Copyright (C) 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
- 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
Free Software Foundation, Inc.
This file is part of GDB.
#include "features/rs6000/powerpc-32l.c"
#include "features/rs6000/powerpc-altivec32l.c"
+#include "features/rs6000/powerpc-vsx32l.c"
+#include "features/rs6000/powerpc-isa205-32l.c"
+#include "features/rs6000/powerpc-isa205-altivec32l.c"
+#include "features/rs6000/powerpc-isa205-vsx32l.c"
#include "features/rs6000/powerpc-64l.c"
#include "features/rs6000/powerpc-altivec64l.c"
+#include "features/rs6000/powerpc-vsx64l.c"
+#include "features/rs6000/powerpc-isa205-64l.c"
+#include "features/rs6000/powerpc-isa205-altivec64l.c"
+#include "features/rs6000/powerpc-isa205-vsx64l.c"
#include "features/rs6000/powerpc-e500l.c"
else in the event that some other platform has similar needs with
regard to removing breakpoints in some potentially self modifying
code. */
-int
+static int
ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
struct bp_target_info *bp_tgt)
{
/* Pattern for the standard linkage function. These are built by
build_plt_stub in elf64-ppc.c, whose GLINK argument is always
zero. */
-static struct insn_pattern ppc64_standard_linkage[] =
+static struct insn_pattern ppc64_standard_linkage1[] =
{
/* addis r12, r2, <any> */
{ insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
/* addis r12, r12, 1 <optional> */
- { insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 },
+ { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
/* ld r2, <any>(r12) */
{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
/* addis r12, r12, 1 <optional> */
- { insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 },
+ { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
+
+ /* mtctr r11 */
+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
+
+ /* ld r11, <any>(r12) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
+
+ /* bctr */
+ { -1, 0x4e800420, 0 },
+
+ { 0, 0, 0 }
+ };
+#define PPC64_STANDARD_LINKAGE1_LEN \
+ (sizeof (ppc64_standard_linkage1) / sizeof (ppc64_standard_linkage1[0]))
+
+static struct insn_pattern ppc64_standard_linkage2[] =
+ {
+ /* addis r12, r2, <any> */
+ { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
+
+ /* std r2, 40(r1) */
+ { -1, insn_ds (62, 2, 1, 40, 0), 0 },
+
+ /* ld r11, <any>(r12) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
+
+ /* addi r12, r12, <any> <optional> */
+ { insn_d (-1, -1, -1, 0), insn_d (14, 12, 12, 0), 1 },
/* mtctr r11 */
- { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467),
- 0 },
+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
+
+ /* ld r2, <any>(r12) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
/* ld r11, <any>(r12) */
{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
{ 0, 0, 0 }
};
-#define PPC64_STANDARD_LINKAGE_LEN \
- (sizeof (ppc64_standard_linkage) / sizeof (ppc64_standard_linkage[0]))
+#define PPC64_STANDARD_LINKAGE2_LEN \
+ (sizeof (ppc64_standard_linkage2) / sizeof (ppc64_standard_linkage2[0]))
+
+static struct insn_pattern ppc64_standard_linkage3[] =
+ {
+ /* std r2, 40(r1) */
+ { -1, insn_ds (62, 2, 1, 40, 0), 0 },
+
+ /* ld r11, <any>(r2) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
+
+ /* addi r2, r2, <any> <optional> */
+ { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 },
+
+ /* mtctr r11 */
+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
+
+ /* ld r11, <any>(r2) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
+
+ /* ld r2, <any>(r2) */
+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
+
+ /* bctr */
+ { -1, 0x4e800420, 0 },
+
+ { 0, 0, 0 }
+ };
+#define PPC64_STANDARD_LINKAGE3_LEN \
+ (sizeof (ppc64_standard_linkage3) / sizeof (ppc64_standard_linkage3[0]))
+
/* When the dynamic linker is doing lazy symbol resolution, the first
call to a function in another object will go like this:
standard linkage function will send them. (This doesn't deal with
dynamic linker lazy symbol resolution stubs.) */
static CORE_ADDR
-ppc64_standard_linkage_target (struct frame_info *frame,
- CORE_ADDR pc, unsigned int *insn)
+ppc64_standard_linkage1_target (struct frame_info *frame,
+ CORE_ADDR pc, unsigned int *insn)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
+
+ /* The address of the function descriptor this linkage function
+ references. */
+ CORE_ADDR desc
+ = ((CORE_ADDR) get_frame_register_unsigned (frame,
+ tdep->ppc_gp0_regnum + 2)
+ + (insn_d_field (insn[0]) << 16)
+ + insn_ds_field (insn[2]));
+
+ /* The first word of the descriptor is the entry point. Return that. */
+ return ppc64_desc_entry_point (desc);
+}
+
+static struct core_regset_section ppc_linux_vsx_regset_sections[] =
+{
+ { ".reg", 268 },
+ { ".reg2", 264 },
+ { ".reg-ppc-vmx", 544 },
+ { ".reg-ppc-vsx", 256 },
+ { NULL, 0}
+};
+
+static struct core_regset_section ppc_linux_vmx_regset_sections[] =
+{
+ { ".reg", 268 },
+ { ".reg2", 264 },
+ { ".reg-ppc-vmx", 544 },
+ { NULL, 0}
+};
+
+static struct core_regset_section ppc_linux_fp_regset_sections[] =
+{
+ { ".reg", 268 },
+ { ".reg2", 264 },
+ { NULL, 0}
+};
+
+static CORE_ADDR
+ppc64_standard_linkage2_target (struct frame_info *frame,
+ CORE_ADDR pc, unsigned int *insn)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
return ppc64_desc_entry_point (desc);
}
+static CORE_ADDR
+ppc64_standard_linkage3_target (struct frame_info *frame,
+ CORE_ADDR pc, unsigned int *insn)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
+
+ /* The address of the function descriptor this linkage function
+ references. */
+ CORE_ADDR desc
+ = ((CORE_ADDR) get_frame_register_unsigned (frame,
+ tdep->ppc_gp0_regnum + 2)
+ + insn_ds_field (insn[1]));
+
+ /* The first word of the descriptor is the entry point. Return that. */
+ return ppc64_desc_entry_point (desc);
+}
+
/* Given that we've begun executing a call trampoline at PC, return
the entry point of the function the trampoline will go to. */
static CORE_ADDR
ppc64_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
{
- unsigned int ppc64_standard_linkage_insn[PPC64_STANDARD_LINKAGE_LEN];
-
- if (insns_match_pattern (pc, ppc64_standard_linkage,
- ppc64_standard_linkage_insn))
- return ppc64_standard_linkage_target (frame, pc,
- ppc64_standard_linkage_insn);
+ unsigned int ppc64_standard_linkage1_insn[PPC64_STANDARD_LINKAGE1_LEN];
+ unsigned int ppc64_standard_linkage2_insn[PPC64_STANDARD_LINKAGE2_LEN];
+ unsigned int ppc64_standard_linkage3_insn[PPC64_STANDARD_LINKAGE3_LEN];
+ CORE_ADDR target;
+
+ if (insns_match_pattern (pc, ppc64_standard_linkage1,
+ ppc64_standard_linkage1_insn))
+ pc = ppc64_standard_linkage1_target (frame, pc,
+ ppc64_standard_linkage1_insn);
+ else if (insns_match_pattern (pc, ppc64_standard_linkage2,
+ ppc64_standard_linkage2_insn))
+ pc = ppc64_standard_linkage2_target (frame, pc,
+ ppc64_standard_linkage2_insn);
+ else if (insns_match_pattern (pc, ppc64_standard_linkage3,
+ ppc64_standard_linkage3_insn))
+ pc = ppc64_standard_linkage3_target (frame, pc,
+ ppc64_standard_linkage3_insn);
else
return 0;
+
+ /* The PLT descriptor will either point to the already resolved target
+ address, or else to a glink stub. As the latter carry synthetic @plt
+ symbols, find_solib_trampoline_target should be able to resolve them. */
+ target = find_solib_trampoline_target (frame, pc);
+ return target? target : pc;
}
CORE_ADDR addr,
struct target_ops *targ)
{
- struct section_table *s = target_section_by_addr (targ, addr);
+ struct target_section *s = target_section_by_addr (targ, addr);
/* Check if ADDR points to a function descriptor. */
if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
- return get_target_memory_unsigned (targ, addr, 8);
+ {
+ /* There may be relocations that need to be applied to the .opd
+ section. Unfortunately, this function may be called at a time
+ where these relocations have not yet been performed -- this can
+ happen for example shortly after a library has been loaded with
+ dlopen, but ld.so has not yet applied the relocations.
+
+ To cope with both the case where the relocation has been applied,
+ and the case where it has not yet been applied, we do *not* read
+ the (maybe) relocated value from target memory, but we instead
+ read the non-relocated value from the BFD, and apply the relocation
+ offset manually.
+
+ This makes the assumption that all .opd entries are always relocated
+ by the same offset the section itself was relocated. This should
+ always be the case for GNU/Linux executables and shared libraries.
+ Note that other kind of object files (e.g. those added via
+ add-symbol-files) will currently never end up here anyway, as this
+ function accesses *target* sections only; only the main exec and
+ shared libraries are ever added to the target. */
+
+ gdb_byte buf[8];
+ int res;
+
+ res = bfd_get_section_contents (s->bfd, s->the_bfd_section,
+ &buf, addr - s->addr, 8);
+ if (res != 0)
+ return extract_unsigned_integer (buf, 8)
+ - bfd_section_vma (s->bfd, s->the_bfd_section) + s->addr;
+ }
return addr;
}
NULL
};
+static const struct regset ppc32_linux_vsxregset = {
+ &ppc32_linux_reg_offsets,
+ ppc_supply_vsxregset,
+ ppc_collect_vsxregset,
+ NULL
+};
+
const struct regset *
ppc_linux_gregset (int wordsize)
{
return &ppc32_linux_fpregset;
if (strcmp (sect_name, ".reg-ppc-vmx") == 0)
return &ppc32_linux_vrregset;
+ if (strcmp (sect_name, ".reg-ppc-vsx") == 0)
+ return &ppc32_linux_vsxregset;
return NULL;
}
bfd *abfd)
{
asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx");
+ asection *vsx = bfd_get_section_by_name (abfd, ".reg-ppc-vsx");
asection *section = bfd_get_section_by_name (abfd, ".reg");
if (! section)
return NULL;
switch (bfd_section_size (abfd, section))
{
case 48 * 4:
- return altivec? tdesc_powerpc_altivec32l : tdesc_powerpc_32l;
+ if (vsx)
+ return tdesc_powerpc_vsx32l;
+ else if (altivec)
+ return tdesc_powerpc_altivec32l;
+ else
+ return tdesc_powerpc_32l;
case 48 * 8:
- return altivec? tdesc_powerpc_altivec64l : tdesc_powerpc_64l;
+ if (vsx)
+ return tdesc_powerpc_vsx64l;
+ else if (altivec)
+ return tdesc_powerpc_altivec64l;
+ else
+ return tdesc_powerpc_64l;
default:
return NULL;
if (tdep->wordsize == 8)
{
- /* Handle the 64-bit SVR4 minimal-symbol convention of using "FN"
- for the descriptor and ".FN" for the entry-point -- a user
- specifying "break FN" will unexpectedly end up with a breakpoint
- on the descriptor and not the function. This architecture method
- transforms any breakpoints on descriptors into breakpoints on the
- corresponding entry point. */
- set_gdbarch_adjust_breakpoint_address
- (gdbarch, ppc64_sysv_abi_adjust_breakpoint_address);
-
/* Handle PPC GNU/Linux 64-bit function pointers (which are really
function descriptors). */
set_gdbarch_convert_from_func_ptr_addr
set_gdbarch_regset_from_core_section (gdbarch, ppc_linux_regset_from_core_section);
set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description);
+ /* Supported register sections. */
+ if (tdesc_find_feature (info.target_desc,
+ "org.gnu.gdb.power.vsx"))
+ set_gdbarch_core_regset_sections (gdbarch, ppc_linux_vsx_regset_sections);
+ else if (tdesc_find_feature (info.target_desc,
+ "org.gnu.gdb.power.altivec"))
+ set_gdbarch_core_regset_sections (gdbarch, ppc_linux_vmx_regset_sections);
+ else
+ set_gdbarch_core_regset_sections (gdbarch, ppc_linux_fp_regset_sections);
+
/* Enable TLS support. */
set_gdbarch_fetch_tls_load_module_address (gdbarch,
svr4_fetch_objfile_link_map);
}
}
+/* Provide a prototype to silence -Wmissing-prototypes. */
+extern initialize_file_ftype _initialize_ppc_linux_tdep;
+
void
_initialize_ppc_linux_tdep (void)
{
/* Initialize the Linux target descriptions. */
initialize_tdesc_powerpc_32l ();
initialize_tdesc_powerpc_altivec32l ();
+ initialize_tdesc_powerpc_vsx32l ();
+ initialize_tdesc_powerpc_isa205_32l ();
+ initialize_tdesc_powerpc_isa205_altivec32l ();
+ initialize_tdesc_powerpc_isa205_vsx32l ();
initialize_tdesc_powerpc_64l ();
initialize_tdesc_powerpc_altivec64l ();
+ initialize_tdesc_powerpc_vsx64l ();
+ initialize_tdesc_powerpc_isa205_64l ();
+ initialize_tdesc_powerpc_isa205_altivec64l ();
+ initialize_tdesc_powerpc_isa205_vsx64l ();
initialize_tdesc_powerpc_e500l ();
}