void *readbuf,
const void *writebuf);
CORE_ADDR ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
- CORE_ADDR func_addr,
+ struct value *function,
struct regcache *regcache,
CORE_ADDR bp_addr, int nargs,
struct value **args, CORE_ADDR sp,
int struct_return,
CORE_ADDR struct_addr);
CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
- CORE_ADDR func_addr,
+ struct value *function,
struct regcache *regcache,
CORE_ADDR bp_addr, int nargs,
struct value **args, CORE_ADDR sp,
/* From rs6000-tdep.c... */
int altivec_register_p (int regno);
+int spe_register_p (int regno);
-/* Return non-zero when the architecture has an FPU (or at least when
- the ABI is using the FPU). */
+/* Return non-zero if the architecture described by GDBARCH has
+ floating-point registers (f0 --- f31 and fpscr). */
int ppc_floating_point_unit_p (struct gdbarch *gdbarch);
/* Register set description. */
struct gdbarch_tdep
{
int wordsize; /* size in bytes of fixed-point word */
- int *regoff; /* byte offsets in register arrays */
const struct reg *regs; /* from current variant */
int ppc_gp0_regnum; /* GPR register 0 */
int ppc_toc_regnum; /* TOC register */
int ppc_lr_regnum; /* Link register */
int ppc_ctr_regnum; /* Count register */
int ppc_xer_regnum; /* Integer exception register */
+
+ /* On PPC and RS6000 variants that have no floating-point
+ registers, the next two members will be -1. */
int ppc_fp0_regnum; /* floating-point register 0 */
int ppc_fpscr_regnum; /* Floating point status and condition
register */
+
int ppc_mq_regnum; /* Multiply/Divide extension register */
int ppc_vr0_regnum; /* First AltiVec register */
int ppc_vrsave_regnum; /* Last AltiVec register */
int ppc_ev0_regnum; /* First ev register */
int ppc_ev31_regnum; /* Last ev register */
+ int ppc_acc_regnum; /* SPE 'acc' register */
+ int ppc_spefscr_regnum; /* SPE 'spefscr' register */
int lr_frame_offset; /* Offset to ABI specific location where
link register is saved. */
};