2004-08-13 Michael Chastain <mec.gnu@mindspring.com>

[deliverable/binutils-gdb.git] / gdb / ppcnbsd-tdep.c

diff --git a/gdb/ppcnbsd-tdep.c b/gdb/ppcnbsd-tdep.c
index 891b74fc8200a957500400f27492ed069691b458..44b30772109b238448a8c2e23c7a76c6e380e1c3 100644 (file)
--- a/gdb/ppcnbsd-tdep.c
+++ b/gdb/ppcnbsd-tdep.c
@@ -34,7 +34,7 @@
 #include "nbsd-tdep.h"
 #include "tramp-frame.h"
 #include "trad-frame.h"
-
+#include "gdb_assert.h"
 #include "solib-svr4.h"
 
 #define REG_FIXREG_OFFSET(x)   ((x) * 4)
@@ -55,26 +55,32 @@ ppcnbsd_supply_reg (char *regs, int regno)
   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
   int i;
 
-  for (i = 0; i <= 31; i++)
+  for (i = 0; i < ppc_num_gprs; i++)
     {
-      if (regno == i || regno == -1)
-       supply_register (i, regs + REG_FIXREG_OFFSET (i));
+      if (regno == tdep->ppc_gp0_regnum + i || regno == -1)
+       regcache_raw_supply (current_regcache, tdep->ppc_gp0_regnum + i,
+                            regs + REG_FIXREG_OFFSET (i));
     }
 
   if (regno == tdep->ppc_lr_regnum || regno == -1)
-    supply_register (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
+    regcache_raw_supply (current_regcache, tdep->ppc_lr_regnum,
+                        regs + REG_LR_OFFSET);
 
   if (regno == tdep->ppc_cr_regnum || regno == -1)
-    supply_register (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
+    regcache_raw_supply (current_regcache, tdep->ppc_cr_regnum,
+                        regs + REG_CR_OFFSET);
 
   if (regno == tdep->ppc_xer_regnum || regno == -1)
-    supply_register (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
+    regcache_raw_supply (current_regcache, tdep->ppc_xer_regnum,
+                        regs + REG_XER_OFFSET);
 
   if (regno == tdep->ppc_ctr_regnum || regno == -1)
-    supply_register (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
+    regcache_raw_supply (current_regcache, tdep->ppc_ctr_regnum,
+                        regs + REG_CTR_OFFSET);
 
   if (regno == PC_REGNUM || regno == -1)
-    supply_register (PC_REGNUM, regs + REG_PC_OFFSET);
+    regcache_raw_supply (current_regcache, PC_REGNUM,
+                        regs + REG_PC_OFFSET);
 }
 
 void
@@ -83,26 +89,31 @@ ppcnbsd_fill_reg (char *regs, int regno)
   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
   int i;
 
-  for (i = 0; i <= 31; i++)
+  for (i = 0; i < ppc_num_gprs; i++)
     {
-      if (regno == i || regno == -1)
-       regcache_collect (i, regs + REG_FIXREG_OFFSET (i));
+      if (regno == tdep->ppc_gp0_regnum + i || regno == -1)
+       regcache_raw_collect (current_regcache, tdep->ppc_gp0_regnum + i,
+                             regs + REG_FIXREG_OFFSET (i));
     }
 
   if (regno == tdep->ppc_lr_regnum || regno == -1)
-    regcache_collect (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
+    regcache_raw_collect (current_regcache, tdep->ppc_lr_regnum,
+                         regs + REG_LR_OFFSET);
 
   if (regno == tdep->ppc_cr_regnum || regno == -1)
-    regcache_collect (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
+    regcache_raw_collect (current_regcache, tdep->ppc_cr_regnum,
+                         regs + REG_CR_OFFSET);
 
   if (regno == tdep->ppc_xer_regnum || regno == -1)
-    regcache_collect (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
+    regcache_raw_collect (current_regcache, tdep->ppc_xer_regnum,
+                         regs + REG_XER_OFFSET);
 
   if (regno == tdep->ppc_ctr_regnum || regno == -1)
-    regcache_collect (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
+    regcache_raw_collect (current_regcache, tdep->ppc_ctr_regnum,
+                         regs + REG_CTR_OFFSET);
 
   if (regno == PC_REGNUM || regno == -1)
-    regcache_collect (PC_REGNUM, regs + REG_PC_OFFSET);
+    regcache_raw_collect (current_regcache, PC_REGNUM, regs + REG_PC_OFFSET);
 }
 
 void
@@ -111,15 +122,28 @@ ppcnbsd_supply_fpreg (char *fpregs, int regno)
   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
   int i;
 
+  /* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
+     point registers.  Traditionally, GDB's register set has still
+     listed the floating point registers for such machines, so this
+     code is harmless.  However, the new E500 port actually omits the
+     floating point registers entirely from the register set --- they
+     don't even have register numbers assigned to them.
+
+     It's not clear to me how best to update this code, so this assert
+     will alert the first person to encounter the NetBSD/E500
+     combination to the problem.  */
+  gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
+
   for (i = 0; i < ppc_num_fprs; i++)
     {
       if (regno == tdep->ppc_fp0_regnum + i || regno == -1)
-       supply_register (tdep->ppc_fp0_regnum + i,
-                         fpregs + FPREG_FPR_OFFSET (i));
+       regcache_raw_supply (current_regcache, tdep->ppc_fp0_regnum + i,
+                            fpregs + FPREG_FPR_OFFSET (i));
     }
 
   if (regno == tdep->ppc_fpscr_regnum || regno == -1)
-    supply_register (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
+    regcache_raw_supply (current_regcache, tdep->ppc_fpscr_regnum,
+                        fpregs + FPREG_FPSCR_OFFSET);
 }
 
 void
@@ -128,15 +152,28 @@ ppcnbsd_fill_fpreg (char *fpregs, int regno)
   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
   int i;
 
+  /* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
+     point registers.  Traditionally, GDB's register set has still
+     listed the floating point registers for such machines, so this
+     code is harmless.  However, the new E500 port actually omits the
+     floating point registers entirely from the register set --- they
+     don't even have register numbers assigned to them.
+
+     It's not clear to me how best to update this code, so this assert
+     will alert the first person to encounter the NetBSD/E500
+     combination to the problem.  */
+  gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
+
   for (i = 0; i < ppc_num_fprs; i++)
     {
       if (regno == tdep->ppc_fp0_regnum + i || regno == -1)
-       regcache_collect (tdep->ppc_fp0_regnum + i,
-                          fpregs + FPREG_FPR_OFFSET (i));
+       regcache_raw_collect (current_regcache, tdep->ppc_fp0_regnum + i,
+                             fpregs + FPREG_FPR_OFFSET (i));
     }
 
   if (regno == tdep->ppc_fpscr_regnum || regno == -1)
-    regcache_collect (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
+    regcache_raw_collect (current_regcache, tdep->ppc_fpscr_regnum,
+                         fpregs + FPREG_FPSCR_OFFSET);
 }
 
 static void
@@ -240,7 +277,7 @@ ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
 
   base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
   offset = base + 0x18 + 2 * tdep->wordsize;
-  for (i = 0; i < 32; i++)
+  for (i = 0; i < ppc_num_gprs; i++)
     {
       int regnum = i + tdep->ppc_gp0_regnum;
       trad_frame_set_reg_addr (this_cache, regnum, offset);
@@ -267,14 +304,15 @@ ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
    instruction, or zero if it isn't a signal trampoline.  */
 
 static const struct tramp_frame ppcnbsd_sigtramp = {
+  SIGTRAMP_FRAME,
   4, /* insn size */
   { /* insn */
-    0x38610018, /* addi r3,r1,24 */
-    0x38000127, /* li r0,295 */
-    0x44000002, /* sc */
-    0x38000001, /* li r0,1 */
-    0x44000002, /* sc */
-    TRAMP_SENTINEL_INSN
+    { 0x38610018, -1 }, /* addi r3,r1,24 */
+    { 0x38000127, -1 }, /* li r0,295 */
+    { 0x44000002, -1 }, /* sc */
+    { 0x38000001, -1 }, /* li r0,1 */
+    { 0x44000002, -1 }, /* sc */
+    { TRAMP_SENTINEL_INSN, -1 }
   },
   ppcnbsd_sigtramp_cache_init
 };