S12Z: Disassembly: Fallback to show the address if the symbol table is empty.

[deliverable/binutils-gdb.git] / gdb / riscv-tdep.h

diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h
index 4fc05976ba81ea231285303fabb6b49441db20b8..8a2454eb668dc85c2c21b3de1adb9b6df8e98030 100644 (file)
--- a/gdb/riscv-tdep.h
+++ b/gdb/riscv-tdep.h
@@ -1,4 +1,5 @@
-/* Target-dependent header for the RISC-V architecture, for GDB, the GNU Debugger.
+/* Target-dependent header for the RISC-V architecture, for GDB, the
+   GNU Debugger.
 
    Copyright (C) 2018 Free Software Foundation, Inc.
 
@@ -33,13 +34,16 @@ enum
   RISCV_A1_REGNUM = 11,                /* Second argument.  */
   RISCV_PC_REGNUM = 32,                /* Program Counter.  */
 
+  RISCV_NUM_INTEGER_REGS = 32,
+
   RISCV_FIRST_FP_REGNUM = 33,  /* First Floating Point Register */
   RISCV_FA0_REGNUM = 43,
   RISCV_FA1_REGNUM = RISCV_FA0_REGNUM + 1,
   RISCV_LAST_FP_REGNUM = 64,   /* Last Floating Point Register */
 
   RISCV_FIRST_CSR_REGNUM = 65,  /* First CSR */
-#define DECLARE_CSR(name, num) RISCV_ ## num ## _REGNUM = RISCV_FIRST_CSR_REGNUM + num,
+#define DECLARE_CSR(name, num) \
+  RISCV_ ## num ## _REGNUM = RISCV_FIRST_CSR_REGNUM + num,
 #include "opcode/riscv-opc.h"
 #undef DECLARE_CSR
   RISCV_LAST_CSR_REGNUM = 4160,
@@ -76,4 +80,11 @@ struct gdbarch_tdep
   unsigned core_features;
 };
 
+/* Return the width in bytes of the general purpose registers for GDBARCH.  */
+extern int riscv_isa_xlen (struct gdbarch *gdbarch);
+
+/* Single step based on where the current instruction will take us.  */
+extern std::vector<CORE_ADDR> riscv_software_single_step
+  (struct regcache *regcache);
+
 #endif /* RISCV_TDEP_H */