/* Target-dependent code for GDB, the GNU debugger.
- Copyright (C) 1986-2015 Free Software Foundation, Inc.
+ Copyright (C) 1986-2016 Free Software Foundation, Inc.
This file is part of GDB.
set_sim_regno (sim_regno, tdep->ppc_acc_regnum, sim_ppc_acc_regnum);
/* spefscr is a special-purpose register, so the code below handles it. */
-#ifdef WITH_SIM
+#ifdef WITH_PPC_SIM
/* Now handle all special-purpose registers. Verify that they
haven't mistakenly been assigned numbers by any of the above
code. */
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- const struct ppc_reg_offsets *offsets = regset->regmap;
+ const struct ppc_reg_offsets *offsets
+ = (const struct ppc_reg_offsets *) regset->regmap;
size_t offset;
int regsize;
for (i = tdep->ppc_gp0_regnum, offset = offsets->r0_offset;
i < tdep->ppc_gp0_regnum + ppc_num_gprs;
i++, offset += gpr_size)
- ppc_supply_reg (regcache, i, gregs, offset, gpr_size);
+ ppc_supply_reg (regcache, i, (const gdb_byte *) gregs, offset,
+ gpr_size);
ppc_supply_reg (regcache, gdbarch_pc_regnum (gdbarch),
- gregs, offsets->pc_offset, gpr_size);
+ (const gdb_byte *) gregs, offsets->pc_offset, gpr_size);
ppc_supply_reg (regcache, tdep->ppc_ps_regnum,
- gregs, offsets->ps_offset, gpr_size);
+ (const gdb_byte *) gregs, offsets->ps_offset, gpr_size);
ppc_supply_reg (regcache, tdep->ppc_lr_regnum,
- gregs, offsets->lr_offset, gpr_size);
+ (const gdb_byte *) gregs, offsets->lr_offset, gpr_size);
ppc_supply_reg (regcache, tdep->ppc_ctr_regnum,
- gregs, offsets->ctr_offset, gpr_size);
+ (const gdb_byte *) gregs, offsets->ctr_offset, gpr_size);
ppc_supply_reg (regcache, tdep->ppc_cr_regnum,
- gregs, offsets->cr_offset, offsets->xr_size);
+ (const gdb_byte *) gregs, offsets->cr_offset,
+ offsets->xr_size);
ppc_supply_reg (regcache, tdep->ppc_xer_regnum,
- gregs, offsets->xer_offset, offsets->xr_size);
+ (const gdb_byte *) gregs, offsets->xer_offset,
+ offsets->xr_size);
ppc_supply_reg (regcache, tdep->ppc_mq_regnum,
- gregs, offsets->mq_offset, offsets->xr_size);
+ (const gdb_byte *) gregs, offsets->mq_offset,
+ offsets->xr_size);
return;
}
offset = ppc_greg_offset (gdbarch, tdep, offsets, regnum, ®size);
- ppc_supply_reg (regcache, regnum, gregs, offset, regsize);
+ ppc_supply_reg (regcache, regnum, (const gdb_byte *) gregs, offset, regsize);
}
/* Supply register REGNUM in the floating-point register set REGSET
return;
tdep = gdbarch_tdep (gdbarch);
- offsets = regset->regmap;
+ offsets = (const struct ppc_reg_offsets *) regset->regmap;
if (regnum == -1)
{
int i;
for (i = tdep->ppc_fp0_regnum, offset = offsets->f0_offset;
i < tdep->ppc_fp0_regnum + ppc_num_fprs;
i++, offset += 8)
- ppc_supply_reg (regcache, i, fpregs, offset, 8);
+ ppc_supply_reg (regcache, i, (const gdb_byte *) fpregs, offset, 8);
ppc_supply_reg (regcache, tdep->ppc_fpscr_regnum,
- fpregs, offsets->fpscr_offset, offsets->fpscr_size);
+ (const gdb_byte *) fpregs, offsets->fpscr_offset,
+ offsets->fpscr_size);
return;
}
offset = ppc_fpreg_offset (tdep, offsets, regnum);
- ppc_supply_reg (regcache, regnum, fpregs, offset,
+ ppc_supply_reg (regcache, regnum, (const gdb_byte *) fpregs, offset,
regnum == tdep->ppc_fpscr_regnum ? offsets->fpscr_size : 8);
}
for (i = tdep->ppc_vsr0_upper_regnum;
i < tdep->ppc_vsr0_upper_regnum + 32;
i++)
- ppc_supply_reg (regcache, i, vsxregs, 0, 8);
+ ppc_supply_reg (regcache, i, (const gdb_byte *) vsxregs, 0, 8);
return;
}
else
- ppc_supply_reg (regcache, regnum, vsxregs, 0, 8);
+ ppc_supply_reg (regcache, regnum, (const gdb_byte *) vsxregs, 0, 8);
}
/* Supply register REGNUM in the Altivec register set REGSET
return;
tdep = gdbarch_tdep (gdbarch);
- offsets = regset->regmap;
+ offsets = (const struct ppc_reg_offsets *) regset->regmap;
if (regnum == -1)
{
int i;
for (i = tdep->ppc_vr0_regnum, offset = offsets->vr0_offset;
i < tdep->ppc_vr0_regnum + ppc_num_vrs;
i++, offset += 16)
- ppc_supply_reg (regcache, i, vrregs, offset, 16);
+ ppc_supply_reg (regcache, i, (const gdb_byte *) vrregs, offset, 16);
ppc_supply_reg (regcache, (tdep->ppc_vrsave_regnum - 1),
- vrregs, offsets->vscr_offset, 4);
+ (const gdb_byte *) vrregs, offsets->vscr_offset, 4);
ppc_supply_reg (regcache, tdep->ppc_vrsave_regnum,
- vrregs, offsets->vrsave_offset, 4);
+ (const gdb_byte *) vrregs, offsets->vrsave_offset, 4);
return;
}
offset = ppc_vrreg_offset (tdep, offsets, regnum);
if (regnum != tdep->ppc_vrsave_regnum
&& regnum != tdep->ppc_vrsave_regnum - 1)
- ppc_supply_reg (regcache, regnum, vrregs, offset, 16);
+ ppc_supply_reg (regcache, regnum, (const gdb_byte *) vrregs, offset, 16);
else
ppc_supply_reg (regcache, regnum,
- vrregs, offset, 4);
+ (const gdb_byte *) vrregs, offset, 4);
}
/* Collect register REGNUM in the general-purpose register set
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- const struct ppc_reg_offsets *offsets = regset->regmap;
+ const struct ppc_reg_offsets *offsets
+ = (const struct ppc_reg_offsets *) regset->regmap;
size_t offset;
int regsize;
for (i = tdep->ppc_gp0_regnum, offset = offsets->r0_offset;
i < tdep->ppc_gp0_regnum + ppc_num_gprs;
i++, offset += gpr_size)
- ppc_collect_reg (regcache, i, gregs, offset, gpr_size);
+ ppc_collect_reg (regcache, i, (gdb_byte *) gregs, offset, gpr_size);
ppc_collect_reg (regcache, gdbarch_pc_regnum (gdbarch),
- gregs, offsets->pc_offset, gpr_size);
+ (gdb_byte *) gregs, offsets->pc_offset, gpr_size);
ppc_collect_reg (regcache, tdep->ppc_ps_regnum,
- gregs, offsets->ps_offset, gpr_size);
+ (gdb_byte *) gregs, offsets->ps_offset, gpr_size);
ppc_collect_reg (regcache, tdep->ppc_lr_regnum,
- gregs, offsets->lr_offset, gpr_size);
+ (gdb_byte *) gregs, offsets->lr_offset, gpr_size);
ppc_collect_reg (regcache, tdep->ppc_ctr_regnum,
- gregs, offsets->ctr_offset, gpr_size);
+ (gdb_byte *) gregs, offsets->ctr_offset, gpr_size);
ppc_collect_reg (regcache, tdep->ppc_cr_regnum,
- gregs, offsets->cr_offset, offsets->xr_size);
+ (gdb_byte *) gregs, offsets->cr_offset,
+ offsets->xr_size);
ppc_collect_reg (regcache, tdep->ppc_xer_regnum,
- gregs, offsets->xer_offset, offsets->xr_size);
+ (gdb_byte *) gregs, offsets->xer_offset,
+ offsets->xr_size);
ppc_collect_reg (regcache, tdep->ppc_mq_regnum,
- gregs, offsets->mq_offset, offsets->xr_size);
+ (gdb_byte *) gregs, offsets->mq_offset,
+ offsets->xr_size);
return;
}
offset = ppc_greg_offset (gdbarch, tdep, offsets, regnum, ®size);
- ppc_collect_reg (regcache, regnum, gregs, offset, regsize);
+ ppc_collect_reg (regcache, regnum, (gdb_byte *) gregs, offset, regsize);
}
/* Collect register REGNUM in the floating-point register set
return;
tdep = gdbarch_tdep (gdbarch);
- offsets = regset->regmap;
+ offsets = (const struct ppc_reg_offsets *) regset->regmap;
if (regnum == -1)
{
int i;
for (i = tdep->ppc_fp0_regnum, offset = offsets->f0_offset;
i < tdep->ppc_fp0_regnum + ppc_num_fprs;
i++, offset += 8)
- ppc_collect_reg (regcache, i, fpregs, offset, 8);
+ ppc_collect_reg (regcache, i, (gdb_byte *) fpregs, offset, 8);
ppc_collect_reg (regcache, tdep->ppc_fpscr_regnum,
- fpregs, offsets->fpscr_offset, offsets->fpscr_size);
+ (gdb_byte *) fpregs, offsets->fpscr_offset,
+ offsets->fpscr_size);
return;
}
offset = ppc_fpreg_offset (tdep, offsets, regnum);
- ppc_collect_reg (regcache, regnum, fpregs, offset,
+ ppc_collect_reg (regcache, regnum, (gdb_byte *) fpregs, offset,
regnum == tdep->ppc_fpscr_regnum ? offsets->fpscr_size : 8);
}
for (i = tdep->ppc_vsr0_upper_regnum;
i < tdep->ppc_vsr0_upper_regnum + 32;
i++)
- ppc_collect_reg (regcache, i, vsxregs, 0, 8);
+ ppc_collect_reg (regcache, i, (gdb_byte *) vsxregs, 0, 8);
return;
}
else
- ppc_collect_reg (regcache, regnum, vsxregs, 0, 8);
+ ppc_collect_reg (regcache, regnum, (gdb_byte *) vsxregs, 0, 8);
}
return;
tdep = gdbarch_tdep (gdbarch);
- offsets = regset->regmap;
+ offsets = (const struct ppc_reg_offsets *) regset->regmap;
if (regnum == -1)
{
int i;
for (i = tdep->ppc_vr0_regnum, offset = offsets->vr0_offset;
i < tdep->ppc_vr0_regnum + ppc_num_vrs;
i++, offset += 16)
- ppc_collect_reg (regcache, i, vrregs, offset, 16);
+ ppc_collect_reg (regcache, i, (gdb_byte *) vrregs, offset, 16);
ppc_collect_reg (regcache, (tdep->ppc_vrsave_regnum - 1),
- vrregs, offsets->vscr_offset, 4);
+ (gdb_byte *) vrregs, offsets->vscr_offset, 4);
ppc_collect_reg (regcache, tdep->ppc_vrsave_regnum,
- vrregs, offsets->vrsave_offset, 4);
+ (gdb_byte *) vrregs, offsets->vrsave_offset, 4);
return;
}
offset = ppc_vrreg_offset (tdep, offsets, regnum);
if (regnum != tdep->ppc_vrsave_regnum
&& regnum != tdep->ppc_vrsave_regnum - 1)
- ppc_collect_reg (regcache, regnum, vrregs, offset, 16);
+ ppc_collect_reg (regcache, regnum, (gdb_byte *) vrregs, offset, 16);
else
ppc_collect_reg (regcache, regnum,
- vrregs, offset, 4);
+ (gdb_byte *) vrregs, offset, 4);
}
\f
return 0;
}
-/* Implementation of gdbarch_in_function_epilogue_p. */
+/* Implement the stack_frame_destroyed_p gdbarch method. */
static int
-rs6000_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
+rs6000_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
{
return rs6000_in_function_epilogue_frame_p (get_current_frame (),
gdbarch, pc);
#define BXL_INSN 0x4c000000
#define BP_INSN 0x7C000008
+/* Instruction masks used during single-stepping of atomic
+ sequences. */
+#define LWARX_MASK 0xfc0007fe
+#define LWARX_INSTRUCTION 0x7c000028
+#define LDARX_INSTRUCTION 0x7c0000A8
+#define STWCX_MASK 0xfc0007ff
+#define STWCX_INSTRUCTION 0x7c00012d
+#define STDCX_INSTRUCTION 0x7c0001ad
+
+/* We can't displaced step atomic sequences. Otherwise this is just
+ like simple_displaced_step_copy_insn. */
+
+static struct displaced_step_closure *
+ppc_displaced_step_copy_insn (struct gdbarch *gdbarch,
+ CORE_ADDR from, CORE_ADDR to,
+ struct regcache *regs)
+{
+ size_t len = gdbarch_max_insn_length (gdbarch);
+ gdb_byte *buf = (gdb_byte *) xmalloc (len);
+ struct cleanup *old_chain = make_cleanup (xfree, buf);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ int insn;
+
+ read_memory (from, buf, len);
+
+ insn = extract_signed_integer (buf, PPC_INSN_SIZE, byte_order);
+
+ /* Assume all atomic sequences start with a lwarx/ldarx instruction. */
+ if ((insn & LWARX_MASK) == LWARX_INSTRUCTION
+ || (insn & LWARX_MASK) == LDARX_INSTRUCTION)
+ {
+ if (debug_displaced)
+ {
+ fprintf_unfiltered (gdb_stdlog,
+ "displaced: can't displaced step "
+ "atomic sequence at %s\n",
+ paddress (gdbarch, from));
+ }
+ do_cleanups (old_chain);
+ return NULL;
+ }
+
+ write_memory (to, buf, len);
+
+ if (debug_displaced)
+ {
+ fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
+ paddress (gdbarch, from), paddress (gdbarch, to));
+ displaced_step_dump_bytes (gdb_stdlog, buf, len);
+ }
+
+ discard_cleanups (old_chain);
+ return (struct displaced_step_closure *) buf;
+}
+
/* Fix up the state of registers and memory after having single-stepped
a displaced instruction. */
static void
struct regcache *regs)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- /* Since we use simple_displaced_step_copy_insn, our closure is a
- copy of the instruction. */
+ /* Our closure is a copy of the instruction. */
ULONGEST insn = extract_unsigned_integer ((gdb_byte *) closure,
PPC_INSN_SIZE, byte_order);
ULONGEST opcode = 0;
return 1;
}
-/* Instruction masks used during single-stepping of atomic sequences. */
-#define LWARX_MASK 0xfc0007fe
-#define LWARX_INSTRUCTION 0x7c000028
-#define LDARX_INSTRUCTION 0x7c0000A8
-#define STWCX_MASK 0xfc0007ff
-#define STWCX_INSTRUCTION 0x7c00012d
-#define STDCX_INSTRUCTION 0x7c0001ad
-
/* Checks for an atomic sequence of instructions beginning with a LWARX/LDARX
instruction and ending with a STWCX/STDCX instruction. If such a sequence
is found, attempt to step through it. A breakpoint is placed at the end of
rs6000_in_solib_return_trampoline (struct gdbarch *gdbarch,
CORE_ADDR pc, const char *name)
{
- return name && !strncmp (name, "@FIX", 4);
+ return name && startswith (name, "@FIX");
}
/* Skip code that the user doesn't want to see when stepping:
struct gdbarch *arch = get_regcache_arch (regcache);
struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
int reg_index;
- gdb_byte *byte_buffer = buffer;
+ gdb_byte *byte_buffer = (gdb_byte *) buffer;
enum register_status status;
gdb_assert (IS_SPE_PSEUDOREG (tdep, ev_reg));
static enum register_status
do_regcache_raw_read (struct regcache *regcache, int regnum, void *buffer)
{
- return regcache_raw_read (regcache, regnum, buffer);
+ return regcache_raw_read (regcache, regnum, (gdb_byte *) buffer);
}
static enum register_status
do_regcache_raw_write (struct regcache *regcache, int regnum, void *buffer)
{
- regcache_raw_write (regcache, regnum, buffer);
+ regcache_raw_write (regcache, regnum, (const gdb_byte *) buffer);
return REG_VALID;
}
{"rs2", "IBM POWER RS2", bfd_arch_rs6000,
bfd_mach_rs6k_rs2, &tdesc_rs6000},
- {0, 0, 0, 0, 0}
+ {0, 0, (enum bfd_architecture) 0, 0, 0}
};
/* Return the variant corresponding to architecture ARCH and machine number
CORE_ADDR func, pc;
if ((*this_cache) != NULL)
- return (*this_cache);
+ return (struct rs6000_frame_cache *) (*this_cache);
cache = FRAME_OBSTACK_ZALLOC (struct rs6000_frame_cache);
(*this_cache) = cache;
cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
default_frame_sniffer
};
+/* Allocate and initialize a frame cache for an epilogue frame.
+ SP is restored and prev-PC is stored in LR. */
+
static struct rs6000_frame_cache *
rs6000_epilogue_frame_cache (struct frame_info *this_frame, void **this_cache)
{
- volatile struct gdb_exception ex;
struct rs6000_frame_cache *cache;
struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- CORE_ADDR sp;
if (*this_cache)
- return *this_cache;
+ return (struct rs6000_frame_cache *) *this_cache;
cache = FRAME_OBSTACK_ZALLOC (struct rs6000_frame_cache);
(*this_cache) = cache;
cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
- TRY_CATCH (ex, RETURN_MASK_ERROR)
+ TRY
{
/* At this point the stack looks as if we just entered the
function, and the return address is stored in LR. */
trad_frame_set_value (cache->saved_regs,
gdbarch_pc_regnum (gdbarch), lr);
}
- if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
- throw_exception (ex);
+ CATCH (ex, RETURN_MASK_ERROR)
+ {
+ if (ex.error != NOT_AVAILABLE_ERROR)
+ throw_exception (ex);
+ }
+ END_CATCH
return cache;
}
+/* Implementation of frame_unwind.this_id, as defined in frame_unwind.h.
+ Return the frame ID of an epilogue frame. */
+
static void
rs6000_epilogue_frame_this_id (struct frame_info *this_frame,
void **this_cache, struct frame_id *this_id)
(*this_id) = frame_id_build (info->base, pc);
}
+/* Implementation of frame_unwind.prev_register, as defined in frame_unwind.h.
+ Return the register value of REGNUM in previous frame. */
+
static struct value *
rs6000_epilogue_frame_prev_register (struct frame_info *this_frame,
void **this_cache, int regnum)
return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
}
+/* Implementation of frame_unwind.sniffer, as defined in frame_unwind.h.
+ Check whether this an epilogue frame. */
+
static int
rs6000_epilogue_frame_sniffer (const struct frame_unwind *self,
struct frame_info *this_frame,
return 0;
}
+/* Frame unwinder for epilogue frame. This is required for reverse step-over
+ a function without debug information. */
+
static const struct frame_unwind rs6000_epilogue_frame_unwind =
{
NORMAL_FRAME,
return 0;
size = bfd_get_section_size (sect);
- contents = xmalloc (size);
+ contents = (gdb_byte *) xmalloc (size);
if (!bfd_get_section_contents (abfd, sect, contents, 0, size))
{
xfree (contents);
#define PPC_XT(insn) ((PPC_TX (insn) << 5) | PPC_T (insn))
#define PPC_XER_NB(xer) (xer & 0x7f)
-/* Record Vector-Scalar Registers. */
+/* Record Vector-Scalar Registers.
+ For VSR less than 32, it's represented by an FPR and an VSR-upper register.
+ Otherwise, it's just a VR register. Record them accordingly. */
static int
ppc_record_vsr (struct regcache *regcache, struct gdbarch_tdep *tdep, int vsr)
return 0;
}
-/* Parse instructions of primary opcode-4. */
+/* Parse and record instructions primary opcode-4 at ADDR.
+ Return 0 if successful. */
static int
ppc_process_record_op4 (struct gdbarch *gdbarch, struct regcache *regcache,
- CORE_ADDR addr, uint32_t insn)
+ CORE_ADDR addr, uint32_t insn)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int ext = PPC_FIELD (insn, 21, 11);
return 0;
}
- fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record "
- "%08x at %08lx, 4-%d.\n", insn, addr, ext);
+ fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %08x "
+ "at %s, 4-%d.\n", insn, paddress (gdbarch, addr), ext);
return -1;
}
-/* Parse instructions of primary opcode-19. */
+/* Parse and record instructions of primary opcode-19 at ADDR.
+ Return 0 if successful. */
static int
ppc_process_record_op19 (struct gdbarch *gdbarch, struct regcache *regcache,
return 0;
}
- fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record "
- "%08x at %08lx, 19-%d.\n", insn, addr, ext);
+ fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %08x "
+ "at %s, 19-%d.\n", insn, paddress (gdbarch, addr), ext);
return -1;
}
-/* Parse instructions of primary opcode-31. */
+/* Parse and record instructions of primary opcode-31 at ADDR.
+ Return 0 if successful. */
static int
ppc_process_record_op31 (struct gdbarch *gdbarch, struct regcache *regcache,
case 878: /* Transaction Abort Doubleword Conditional Immediate */
case 910: /* Transaction Abort */
fprintf_unfiltered (gdb_stdlog, "Cannot record Transaction instructions. "
- "%08x at %08lx, 31-%d.\n", insn, addr, ext);
+ "%08x at %s, 31-%d.\n",
+ insn, paddress (gdbarch, addr), ext);
return -1;
case 1014: /* Data Cache Block set to Zero */
}
UNKNOWN_OP:
- fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record "
- "%08x at %08lx, 31-%d.\n", insn, addr, ext);
+ fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %08x "
+ "at %s, 31-%d.\n", insn, paddress (gdbarch, addr), ext);
return -1;
}
-/* Parse instructions of primary opcode-59. */
+/* Parse and record instructions of primary opcode-59 at ADDR.
+ Return 0 if successful. */
static int
ppc_process_record_op59 (struct gdbarch *gdbarch, struct regcache *regcache,
return 0;
}
- fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record "
- "%08x at %08lx, 59-%d.\n", insn, addr, ext);
+ fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %08x "
+ "at %s, 59-%d.\n", insn, paddress (gdbarch, addr), ext);
return -1;
}
-/* Parse instructions of primary opcode-60. */
+/* Parse and record instructions of primary opcode-60 at ADDR.
+ Return 0 if successful. */
static int
ppc_process_record_op60 (struct gdbarch *gdbarch, struct regcache *regcache,
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int ext = PPC_EXTOP (insn);
- int tmp;
switch (ext >> 2)
{
return 0;
}
- fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record "
- "%08x at %08lx, 60-%d.\n", insn, addr, ext);
+ fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %08x "
+ "at %s, 60-%d.\n", insn, paddress (gdbarch, addr), ext);
return -1;
}
-/* Parse instructions of primary opcode-63. */
+/* Parse and record instructions of primary opcode-63 at ADDR.
+ Return 0 if successful. */
static int
ppc_process_record_op63 (struct gdbarch *gdbarch, struct regcache *regcache,
}
- fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record "
- "%08x at %08lx, 59-%d.\n", insn, addr, ext);
+ fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %08x "
+ "at %s, 59-%d.\n", insn, paddress (gdbarch, addr), ext);
return -1;
}
default:
UNKNOWN_OP:
- fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record "
- "%08x at %08lx, %d.\n", insn, addr, op6);
+ fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %08x "
+ "at %s, %d.\n", insn, paddress (gdbarch, addr), op6);
return -1;
}
else
{
if (info.bfd_arch_info != NULL && info.bfd_arch_info->bits_per_word != 0)
- wordsize = info.bfd_arch_info->bits_per_word /
- info.bfd_arch_info->bits_per_byte;
+ wordsize = (info.bfd_arch_info->bits_per_word
+ / info.bfd_arch_info->bits_per_byte);
else
wordsize = 4;
}
set_gdbarch_push_dummy_call (gdbarch, ppc64_sysv_abi_push_dummy_call);
set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue);
- set_gdbarch_in_function_epilogue_p (gdbarch, rs6000_in_function_epilogue_p);
+ set_gdbarch_stack_frame_destroyed_p (gdbarch, rs6000_stack_frame_destroyed_p);
set_gdbarch_skip_main_prologue (gdbarch, rs6000_skip_main_prologue);
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
/* Setup displaced stepping. */
set_gdbarch_displaced_step_copy_insn (gdbarch,
- simple_displaced_step_copy_insn);
+ ppc_displaced_step_copy_insn);
set_gdbarch_displaced_step_hw_singlestep (gdbarch,
ppc_displaced_step_hw_singlestep);
set_gdbarch_displaced_step_fixup (gdbarch, ppc_displaced_step_fixup);
/* Hook in ABI-specific overrides, if they have been registered. */
info.target_desc = tdesc;
- info.tdep_info = (void *) tdesc_data;
+ info.tdep_info = tdesc_data;
gdbarch_init_osabi (info, gdbarch);
switch (info.osabi)
struct cmd_list_element *c)
{
struct gdbarch_info info;
- enum powerpc_vector_abi vector_abi;
+ int vector_abi;
for (vector_abi = POWERPC_VEC_AUTO;
vector_abi != POWERPC_VEC_LAST;
if (strcmp (powerpc_vector_abi_string,
powerpc_vector_strings[vector_abi]) == 0)
{
- powerpc_vector_abi_global = vector_abi;
+ powerpc_vector_abi_global = (enum powerpc_vector_abi) vector_abi;
break;
}