/* Target-dependent code for GDB, the GNU debugger.
- Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
+ Copyright 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc.
This file is part of GDB.
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
-#include <stdio.h>
-
#include "defs.h"
#include "frame.h"
#include "inferior.h"
#include "symtab.h"
#include "target.h"
+#include "xcoffsolib.h"
+
#include <sys/param.h>
#include <sys/dir.h>
#include <sys/user.h>
#include <sys/ioctl.h>
#include <fcntl.h>
-#include <sys/ptrace.h>
-#include <sys/reg.h>
-
#include <a.out.h>
#include <sys/file.h>
#include <sys/stat.h>
#include <sys/core.h>
+#include <sys/ldr.h>
+
+
+extern struct obstack frame_cache_obstack;
extern int errno;
-extern int attach_flag;
/* Nonzero if we just simulated a single step break. */
int one_stepped;
-#if 0
-
-/* This is Damon's implementation of single step simulation. It suffers the
- following program:
-
- 1 main () {
- 2 char buf[10];
- 3 puts ("test");
- 4 strcmp (buf, "test"); puts ("test");
- 5 exit (0);
- 6 }
-
- You cannot `next' on line 4 in the above program. gdb puts a breakpoint
- to the return address of `strcmp', and when execution arrives that point,
- it is still in the line range and gdb attemps to resume it with single
- steps. At that point the breakpoint at step_resume_break_address (return
- address of strcmp) and single step's breakpoint mixes up and we end up
- with a breakpoint which its shadow and itself are identical.
-
- Fix that problem and use this version. FIXMEmgo.
-*/
-
+/* Breakpoint shadows for the single step instructions will be kept here. */
static struct sstep_breaks {
int address;
int data;
-} tbreak[2];
-
-
-/*
- * branch_dest - calculate all places the current instruction may go
- */
-static
-branch_dest(tb)
- register struct sstep_breaks *tb;
-{
- register ulong opcode, iar;
- long instr;
- int immediate, absolute;;
-
- iar = read_pc(); /* current IAR */
- target_read_memory(iar, &instr, sizeof (instr)); /* current inst */
-
- opcode = instr >> 26;
- absolute = instr & 2;
-
- tb[1].address = -1;
-
- switch (opcode) {
- case 0x10: /* branch conditional */
- immediate = ((instr & ~3) << 16) >> 16;
-
- /*
- * two possible locations for next instruction
- */
- tb[0].address = iar + 4;
- tb[1].address = immediate + (absolute ? 0 : iar);
-
- break;
-
- case 0x12: /* branch unconditional */
- immediate = ((instr & ~3) << 6) >> 6;
-
- /*
- * only one possible location for next instr
- */
- tb[0].address = immediate + (absolute ? 0 : iar);
-
- break;
-
- case 0x13: /* branch conditional register */
- /*
- * WE NEED TO CHECK THE CR HERE, TO SEE IF THIS IS
- * REALLY UNCONDITIONAL.
- */
- tb++->address = iar + 4;
-
- switch ((instr >> 1) & 0x3ff) {
- case 0x10: /* branch conditional register */
- tb->address = read_register(LR_REGNUM) & ~3;
- sigtramp_chk(tb); /* return from sig handler? */
- break;
-
- case 0x210: /* branch cond to CTR */
- tb->address = read_register(CTR_REGNUM) & ~3;
- sigtramp_chk(tb); /* return from sig handler? */
- break;
-
- default:
- /*
- * not a branch.
- */
- tb->address = iar + 4;
- break;
- }
- break;
-
- default:
- /*
- * not a branch, flow proceeds normally
- */
- tb->address = iar + 4;
- break;
- }
-}
-
-/*
- * sigtramp_chk - heuristic check to see if we think we are returning
- * from a signal handler.
- *
- * Input:
- * tb - ^ to a single step branch location
- *
- * Note:
- * When we are at the "br" instruction returning to a signal handler,
- * we return in user mode to an address in the kernel. If the
- * segment of the branch target is 0, we may very well be in a
- * signal handler. From scrounging through this code, we note that
- * register 29 has the signal context pointer, from which we can
- * determine where we will end up next.
- */
-sigtramp_chk(tb)
-register struct sstep_breaks *tb; {
- struct sigcontext sc;
-
- if (tb->address & 0xf0000000)
- return; /* can't have been sigtramp */
-
- if (target_read_memory(read_register(GPR29), &sc, sizeof (sc)))
- return; /* read fails, heuristic fails */
-
- if ((sc.sc_jmpbuf.jmp_context.iar & 0xf0000000) == 0x10000000) {
- /*
- * looks like it might be ok.....
- */
- tb->address = sc.sc_jmpbuf.jmp_context.iar;
- }
-}
-
-
-/*
- * single_step - no trace mode harware support, or software support.
- * sigh.
- */
-single_step(signal) {
- register i;
-
- if (!one_stepped) {
- /*
- * need to set breakpoints for single step.
- * figure out all places the current instruction could go.
- */
- branch_dest(&tbreak[0]);
-
- /*
- * always at least one place to go to
- */
- target_insert_breakpoint(tbreak[0].address, &tbreak[0].data);
-
- /*
- * if there is another possible location, set a breakpoint there
- * as well.
- */
- if (tbreak[1].address != -1)
- target_insert_breakpoint(tbreak[1].address, &tbreak[1].data);
-
- one_stepped = 1;
- ptrace(PT_CONTINUE, inferior_pid, 1, signal, 0);
- } else {
- /*
- * need to clear the breakpoints.
- */
- for (i = 0; i < 2; ++i)
- if (tbreak[i].address != -1)
- target_remove_breakpoint(tbreak[i].address, &tbreak[i].data);
-
- one_stepped = 0;
- }
-
- return 1;
-}
+} stepBreaks[2];
-#else /* !DAMON'S VERSION */
+/* Static function prototypes */
-/* Breakpoint shadows for the single step instructions will be kept here. */
+static CORE_ADDR
+find_toc_address PARAMS ((CORE_ADDR pc));
-static struct sstep_breaks {
- int address;
- int data;
-} stepBreaks[2];
+static CORE_ADDR
+branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety));
+static void
+frame_get_cache_fsr PARAMS ((struct frame_info *fi,
+ struct aix_framedata *fdatap));
/*
* Calculate the destination of a branch/jump. Return -1 if not a branch.
*/
-static int
+static CORE_ADDR
branch_dest (opcode, instr, pc, safety)
- int opcode, instr, pc, safety;
+ int opcode;
+ int instr;
+ CORE_ADDR pc;
+ CORE_ADDR safety;
{
register long offset;
- unsigned dest;
+ CORE_ADDR dest;
int immediate;
int absolute;
int ext_op;
switch (opcode) {
case 18 :
- immediate = ((instr & ~3) << 6) >> 6; /* br unconditionl */
+ immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
case 16 :
if (opcode != 18) /* br conditional */
default: return -1;
}
- return (dest < 0x10000000) ? safety : dest;
+ return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
}
/* AIX does not support PT_STEP. Simulate it. */
-int
+void
single_step (signal)
-int signal;
+ int signal;
{
#define INSNLEN(OPCODE) 4
int breaks[2], opcode;
if (!one_stepped) {
- extern CORE_ADDR text_start;
loc = read_pc ();
ret = read_memory (loc, &insn, sizeof (int));
opcode = insn >> 26;
breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
+ /* Don't put two breakpoints on the same address. */
+ if (breaks[1] == breaks[0])
+ breaks[1] = -1;
+
stepBreaks[1].address = -1;
for (ii=0; ii < 2; ++ii) {
}
one_stepped = 1;
- ptrace (PT_CONTINUE, inferior_pid, 1, signal);
- }
- else {
+ } else {
/* remove step breakpoints. */
for (ii=0; ii < 2; ++ii)
one_stepped = 0;
}
- return 1;
+ errno = 0; /* FIXME, don't ignore errors! */
}
-#endif /* !DAMON's version of single step. */
-
/* return pc value after skipping a function prologue. */
skip_prologue (pc)
-int pc;
+CORE_ADDR pc;
{
unsigned int tmp;
- unsigned int op;
+ unsigned int op; /* FIXME, assumes instruction size matches host int!!! */
if (target_read_memory (pc, (char *)&op, sizeof (op)))
return pc; /* Can't access it -- assume no prologue. */
pc += 4;
op = read_memory_integer (pc, 4);
}
- else /* else, this is a frameless invocation */
- return pc;
if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
pc += 4;
if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
pc += 4;
op = read_memory_integer (pc, 4);
+
+ /* At this point, make sure this is not a trampoline function
+ (a function that simply calls another functions, and nothing else).
+ If the next is not a nop, this branch was part of the function
+ prologue. */
+
+ if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
+ op == 0x0)
+ return pc - 4; /* don't skip over this branch */
}
if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
(tmp == 0x9421) || /* stu r1, NUM(r1) */
- (op == 0x93e1fffc)) /* st r31,-4(r1) */
+ (tmp == 0x93e1)) /* st r31,NUM(r1) */
{
pc += 4;
op = read_memory_integer (pc, 4);
op = read_memory_integer (pc, 4);
}
- while ((op & 0xfc1f0000) == 0x90010000) { /* st r?, NUM(r1) */
- pc += 4;
- op = read_memory_integer (pc, 4);
- }
+ /* store parameters into stack */
+ while(
+ (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
+ (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
+ (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
+ (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
+ {
+ pc += 4; /* store fpr double */
+ op = read_memory_integer (pc, 4);
+ }
if (op == 0x603f0000) { /* oril r31, r1, 0x0 */
pc += 4; /* this happens if r31 is used as */
op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */
- if ((op >> 16) == 0x907f) { /* st r3, NUM(r31) */
- pc += 4;
+ tmp = 0;
+ while ((op >> 16) == (0x907f + tmp)) { /* st r3, NUM(r31) */
+ pc += 4; /* st r4, NUM(r31), ... */
op = read_memory_integer (pc, 4);
+ tmp += 0x20;
}
}
- return pc;
-}
+#if 0
+/* I have problems with skipping over __main() that I need to address
+ * sometime. Previously, I used to use misc_function_vector which
+ * didn't work as well as I wanted to be. -MGO */
+
+ /* If the first thing after skipping a prolog is a branch to a function,
+ this might be a call to an initializer in main(), introduced by gcc2.
+ We'd like to skip over it as well. Fortunately, xlc does some extra
+ work before calling a function right after a prologue, thus we can
+ single out such gcc2 behaviour. */
+
+
+ if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
+ op = read_memory_integer (pc+4, 4);
-/* text start and end addresses in virtual memory. */
+ if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
-CORE_ADDR text_start;
-CORE_ADDR text_end;
+ /* check and see if we are in main. If so, skip over this initializer
+ function as well. */
+
+ tmp = find_pc_misc_function (pc);
+ if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
+ return pc + 8;
+ }
+ }
+#endif /* 0 */
+
+ return pc;
+}
/*************************************************************************
frames, etc.
*************************************************************************/
+/* The total size of dummy frame is 436, which is;
+
+ 32 gpr's - 128 bytes
+ 32 fpr's - 256 "
+ 7 the rest - 28 "
+ and 24 extra bytes for the callee's link area. The last 24 bytes
+ for the link area might not be necessary, since it will be taken
+ care of by push_arguments(). */
+
+#define DUMMY_FRAME_SIZE 436
+
#define DUMMY_FRAME_ADDR_SIZE 10
/* Make sure you initialize these in somewhere, in case gdb gives up what it
- was debugging and starts debugging something else. FIXMEmgo */
+ was debugging and starts debugging something else. FIXMEibm */
static int dummy_frame_count = 0;
static int dummy_frame_size = 0;
/* push a dummy frame into stack, save all register. Currently we are saving
only gpr's and fpr's, which is not good enough! FIXMEmgo */
+void
push_dummy_frame ()
{
int sp, pc; /* stack pointer and link register */
int ii;
+ target_fetch_registers (-1);
+
if (dummy_frame_count >= dummy_frame_size) {
dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
if (dummy_frame_addr)
dummy_frame_addr [dummy_frame_count++] = sp;
/* Be careful! If the stack pointer is not decremented first, then kernel
- thinks he is free to use the sapce underneath it. And kernel actually
+ thinks he is free to use the space underneath it. And kernel actually
uses that area for IPC purposes when executing ptrace(2) calls. So
before writing register values into the new frame, decrement and update
%sp first in order to secure your frame. */
- write_register (SP_REGNUM, sp-408);
+ write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
-#if 1
/* gdb relies on the state of current_frame. We'd better update it,
otherwise things like do_registers_info() wouldn't work properly! */
flush_cached_frames ();
- set_current_frame (create_new_frame (sp-408, pc));
-#endif /* 0 */
+ set_current_frame (create_new_frame (sp-DUMMY_FRAME_SIZE, pc));
/* save program counter in link register's space. */
write_memory (sp+8, &pc, 4);
- /* save full floating point registers here. They will be from F14..F31
- for know. I am not sure if we need to save everything here! */
+ /* save all floating point and general purpose registers here. */
/* fpr's, f0..f31 */
for (ii = 0; ii < 32; ++ii)
for (ii=1; ii <=32; ++ii)
write_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4);
- /* so far, 32*2 + 32 words = 384 bytes have been written. We need 6 words
- (24 bytes) for the rest of the registers. It brings the total to 408
- bytes.
- save sp or so call back chain right here. */
- write_memory (sp-408, &sp, 4);
- sp -= 408;
+ /* so far, 32*2 + 32 words = 384 bytes have been written.
+ 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
+
+ for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
+ write_memory (sp-384-(ii*4),
+ ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
+ }
+
+ /* Save sp or so called back chain right here. */
+ write_memory (sp-DUMMY_FRAME_SIZE, &sp, 4);
+ sp -= DUMMY_FRAME_SIZE;
/* And finally, this is the back chain. */
write_memory (sp+8, &pc, 4);
In rs6000 when we push a dummy frame, we save all of the registers. This
is usually done before user calls a function explicitly.
- After a dummy frame is pushed, some instructions are copied into stack, and
- stack pointer is decremented even more. Since we don't have a frame pointer to
- get back to the parent frame of the dummy, we start having trouble poping it.
- Therefore, we keep a dummy frame stack, keeping addresses of dummy frames as
- such. When poping happens and when we detect that was a dummy frame, we pop
- it back to its parent by using dummy frame stack (`dummy_frame_addr' array).
+ After a dummy frame is pushed, some instructions are copied into stack,
+ and stack pointer is decremented even more. Since we don't have a frame
+ pointer to get back to the parent frame of the dummy, we start having
+ trouble poping it. Therefore, we keep a dummy frame stack, keeping
+ addresses of dummy frames as such. When poping happens and when we
+ detect that was a dummy frame, we pop it back to its parent by using
+ dummy frame stack (`dummy_frame_addr' array).
+
+FIXME: This whole concept is broken. You should be able to detect
+a dummy stack frame *on the user's stack itself*. When you do,
+then you know the format of that stack frame -- including its
+saved SP register! There should *not* be a separate stack in the
+GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
*/
pop_dummy_frame ()
read_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4);
}
- read_memory (sp-400, ®isters [REGISTER_BYTE(PC_REGNUM)], 4);
+ /* restore the rest of the registers. */
+ for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
+ read_memory (sp-384-(ii*4),
+ ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
+
+ read_memory (sp-(DUMMY_FRAME_SIZE-8),
+ ®isters [REGISTER_BYTE(PC_REGNUM)], 4);
/* when a dummy frame was being pushed, we had to decrement %sp first, in
order to secure astack space. Thus, saved %sp (or %r1) value, is not the
/* Now we can restore all registers. */
- store_inferior_registers (-1);
+ target_store_registers (-1);
pc = read_pc ();
flush_cached_frames ();
set_current_frame (create_new_frame (sp, pc));
/* pop the innermost frame, go back to the caller. */
+void
pop_frame ()
{
int pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
+ struct aix_framedata fdata;
FRAME fr = get_current_frame ();
- int offset = 0;
- int frameless = 0; /* TRUE if function is frameless */
int addr, ii;
- int saved_gpr, saved_fpr; /* # of saved gpr's and fpr's */
pc = read_pc ();
sp = FRAME_FP (fr);
saved %pc value in the previous frame. */
addr = get_pc_function_start (fr->pc) + FUNCTION_START_OFFSET;
- function_frame_info (addr, &frameless, &offset, &saved_gpr, &saved_fpr);
+ function_frame_info (addr, &fdata);
read_memory (sp, &prev_sp, 4);
- if (frameless)
+ if (fdata.frameless)
lr = read_register (LR_REGNUM);
else
read_memory (prev_sp+8, &lr, 4);
write_register (PC_REGNUM, lr);
/* reset register values if any was saved earlier. */
- addr = prev_sp - offset;
+ addr = prev_sp - fdata.offset;
- if (saved_gpr != -1)
- for (ii=saved_gpr; ii <= 31; ++ii) {
+ if (fdata.saved_gpr != -1)
+ for (ii=fdata.saved_gpr; ii <= 31; ++ii) {
read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4);
- addr += sizeof (int);
+ addr += 4;
}
- if (saved_fpr != -1)
- for (ii=saved_fpr; ii <= 31; ++ii) {
+ if (fdata.saved_fpr != -1)
+ for (ii=fdata.saved_fpr; ii <= 31; ++ii) {
read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
addr += 8;
}
write_register (SP_REGNUM, prev_sp);
- store_inferior_registers (-1);
+ target_store_registers (-1);
flush_cached_frames ();
set_current_frame (create_new_frame (prev_sp, lr));
}
/* fixup the call sequence of a dummy function, with the real function address.
its argumets will be passed by gdb. */
+void
fix_call_dummy(dummyname, pc, fun, nargs, type)
char *dummyname;
- int pc;
- int fun;
+ CORE_ADDR pc;
+ CORE_ADDR fun;
int nargs; /* not used */
int type; /* not used */
-
{
#define TOC_ADDR_OFFSET 20
#define TARGET_ADDR_OFFSET 28
int ii;
- unsigned long target_addr;
- unsigned long tocvalue;
+ CORE_ADDR target_addr;
+ CORE_ADDR tocvalue;
target_addr = fun;
tocvalue = find_toc_address (target_addr);
}
-
/* return information about a function frame.
- - frameless is TRUE, if function does not save %pc value in its frame.
+ in struct aix_frameinfo fdata:
+ - frameless is TRUE, if function does not have a frame.
+ - nosavedpc is TRUE, if function does not save %pc value in its frame.
- offset is the number of bytes used in the frame to save registers.
- saved_gpr is the number of the first saved gpr.
- saved_fpr is the number of the first saved fpr.
+ - alloca_reg is the number of the register used for alloca() handling.
+ Otherwise -1.
*/
-function_frame_info (pc, frameless, offset, saved_gpr, saved_fpr)
- int pc;
- int *frameless, *offset, *saved_gpr, *saved_fpr;
+void
+function_frame_info (pc, fdata)
+ CORE_ADDR pc;
+ struct aix_framedata *fdata;
{
unsigned int tmp;
register unsigned int op;
- *offset = 0;
- *saved_gpr = *saved_fpr = -1;
-
- if (!inferior_pid)
- return;
+ fdata->offset = 0;
+ fdata->saved_gpr = fdata->saved_fpr = fdata->alloca_reg = -1;
+ fdata->frameless = 1;
op = read_memory_integer (pc, 4);
if (op == 0x7c0802a6) { /* mflr r0 */
pc += 4;
op = read_memory_integer (pc, 4);
- *frameless = 0;
+ fdata->nosavedpc = 0;
+ fdata->frameless = 0;
}
- else /* else, this is a frameless invocation */
- *frameless = 1;
-
+ else /* else, pc is not saved */
+ fdata->nosavedpc = 1;
if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
pc += 4;
op = read_memory_integer (pc, 4);
+ fdata->frameless = 0;
}
if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
pc += 4;
op = read_memory_integer (pc, 4);
+ /* At this point, make sure this is not a trampoline function
+ (a function that simply calls another functions, and nothing else).
+ If the next is not a nop, this branch was part of the function
+ prologue. */
+
+ if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
+ op == 0x0)
+ return; /* prologue is over */
+ fdata->frameless = 0;
}
if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
pc += 4; /* store floating register double */
op = read_memory_integer (pc, 4);
+ fdata->frameless = 0;
}
if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
int tmp2;
- *saved_gpr = (op >> 21) & 0x1f;
+ fdata->saved_gpr = (op >> 21) & 0x1f;
tmp2 = op & 0xffff;
if (tmp2 > 0x7fff)
- tmp2 = 0xffff0000 | tmp2;
+ tmp2 = (~0 &~ 0xffff) | tmp2;
if (tmp2 < 0) {
tmp2 = tmp2 * -1;
- *saved_fpr = (tmp2 - ((32 - *saved_gpr) * 4)) / 8;
- if ( *saved_fpr > 0)
- *saved_fpr = 32 - *saved_fpr;
+ fdata->saved_fpr = (tmp2 - ((32 - fdata->saved_gpr) * 4)) / 8;
+ if ( fdata->saved_fpr > 0)
+ fdata->saved_fpr = 32 - fdata->saved_fpr;
else
- *saved_fpr = -1;
+ fdata->saved_fpr = -1;
+ }
+ fdata->offset = tmp2;
+ pc += 4;
+ op = read_memory_integer (pc, 4);
+ fdata->frameless = 0;
+ }
+
+ while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
+ (tmp == 0x9421) || /* stu r1, NUM(r1) */
+ (tmp == 0x93e1)) /* st r31, NUM(r1) */
+ {
+ int tmp2;
+
+ /* gcc takes a short cut and uses this instruction to save r31 only. */
+
+ if (tmp == 0x93e1) {
+ if (fdata->offset)
+/* fatal ("Unrecognized prolog."); */
+ printf ("Unrecognized prolog!\n");
+
+ fdata->saved_gpr = 31;
+ tmp2 = op & 0xffff;
+ if (tmp2 > 0x7fff) {
+ tmp2 = - ((~0 &~ 0xffff) | tmp2);
+ fdata->saved_fpr = (tmp2 - ((32 - 31) * 4)) / 8;
+ if ( fdata->saved_fpr > 0)
+ fdata->saved_fpr = 32 - fdata->saved_fpr;
+ else
+ fdata->saved_fpr = -1;
+ }
+ fdata->offset = tmp2;
+ }
+ pc += 4;
+ op = read_memory_integer (pc, 4);
+ fdata->frameless = 0;
+ }
+
+ while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
+ pc += 4; /* l r30, ... */
+ op = read_memory_integer (pc, 4);
+ fdata->frameless = 0;
+ }
+
+ /* store parameters into stack */
+ while(
+ (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
+ (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
+ (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
+ (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
+ {
+ pc += 4; /* store fpr double */
+ op = read_memory_integer (pc, 4);
+ fdata->frameless = 0;
}
- *offset = tmp2;
+
+ if (op == 0x603f0000) { /* oril r31, r1, 0x0 */
+ fdata->alloca_reg = 31;
+ fdata->frameless = 0;
}
}
write_register (SP_REGNUM, sp);
-#if 0
- pc = read_pc ();
- flush_cached_frames ();
- set_current_frame (create_new_frame (sp, pc));
-#endif
-
/* if the last argument copied into the registers didn't fit there
completely, push the rest of it into stack. */
ii += ((len + 3) & -4) / 4;
}
}
- else {
-
+ else
/* Secure stack areas first, before doing anything else. */
write_register (SP_REGNUM, sp);
-#if 0
- pc = read_pc ();
- flush_cached_frames ();
- set_current_frame (create_new_frame (sp, pc));
-#endif
- }
-
saved_sp = dummy_frame_addr [dummy_frame_count - 1];
read_memory (saved_sp, tmp_buffer, 24);
write_memory (sp, tmp_buffer, 24);
write_memory (sp, &saved_sp, 4); /* set back chain properly */
- store_inferior_registers (-1);
+ target_store_registers (-1);
return sp;
}
/* a given return value in `regbuf' with a type `valtype', extract and copy its
value into `valbuf' */
+void
extract_return_value (valtype, regbuf, valbuf)
struct type *valtype;
char regbuf[REGISTER_BYTES];
}
-/* keep keep structure return address in this variable. */
+/* keep structure return address in this variable.
+ FIXME: This is a horrid kludge which should not be allowed to continue
+ living. This only allows a single nested call to a structure-returning
+ function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
CORE_ADDR rs6000_struct_return_address;
/* Throw away this debugging code. FIXMEmgo. */
+void
print_frame(fram)
int fram;
{
-/* Indirect function calls use a piece of trampoline code do co context switching,
- i.e. to set the new TOC table. Skip such code if exists. */
+/* Indirect function calls use a piece of trampoline code to do context
+ switching, i.e. to set the new TOC table. Skip such code if we are on
+ its first instruction (as when we have single-stepped to here).
+ Result is desired PC to step until, or NULL if we are not in
+ trampoline code. */
+CORE_ADDR
skip_trampoline_code (pc)
-int pc;
+CORE_ADDR pc;
{
register unsigned int ii, op;
return pc;
}
+
+/* Determines whether the function FI has a frame on the stack or not.
+ Called from the FRAMELESS_FUNCTION_INVOCATION macro in tm.h with a
+ second argument of 0, and from the FRAME_SAVED_PC macro with a
+ second argument of 1. */
+
+int
+frameless_function_invocation (fi, pcsaved)
+struct frame_info *fi;
+int pcsaved;
+{
+ CORE_ADDR func_start;
+ struct aix_framedata fdata;
+
+ func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
+
+ /* If we failed to find the start of the function, it is a mistake
+ to inspect the instructions. */
+
+ if (!func_start)
+ return 0;
+
+ function_frame_info (func_start, &fdata);
+ return pcsaved ? fdata.nosavedpc : fdata.frameless;
+}
+
+
+/* If saved registers of frame FI are not known yet, read and cache them.
+ &FDATAP contains aix_framedata; TDATAP can be NULL,
+ in which case the framedata are read. */
+
+static void
+frame_get_cache_fsr (fi, fdatap)
+ struct frame_info *fi;
+ struct aix_framedata *fdatap;
+{
+ int ii;
+ CORE_ADDR frame_addr;
+ struct aix_framedata work_fdata;
+
+ if (fi->cache_fsr)
+ return;
+
+ if (fdatap == NULL) {
+ fdatap = &work_fdata;
+ function_frame_info (get_pc_function_start (fi->pc), fdatap);
+ }
+
+ fi->cache_fsr = (struct frame_saved_regs *)
+ obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
+ bzero (fi->cache_fsr, sizeof (struct frame_saved_regs));
+
+ if (fi->prev && fi->prev->frame)
+ frame_addr = fi->prev->frame;
+ else
+ frame_addr = read_memory_integer (fi->frame, 4);
+
+ /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
+ All fpr's from saved_fpr to fp31 are saved right underneath caller
+ stack pointer, starting from fp31 first. */
+
+ if (fdatap->saved_fpr >= 0) {
+ for (ii=31; ii >= fdatap->saved_fpr; --ii)
+ fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
+ frame_addr -= (32 - fdatap->saved_fpr) * 8;
+ }
+
+ /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
+ All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
+ starting from r31 first. */
+
+ if (fdatap->saved_gpr >= 0)
+ for (ii=31; ii >= fdatap->saved_gpr; --ii)
+ fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
+}
+
+/* Return the address of a frame. This is the inital %sp value when the frame
+ was first allocated. For functions calling alloca(), it might be saved in
+ an alloca register. */
+
+CORE_ADDR
+frame_initial_stack_address (fi)
+ struct frame_info *fi;
+{
+ CORE_ADDR tmpaddr;
+ struct aix_framedata fdata;
+ struct frame_info *callee_fi;
+
+ /* if the initial stack pointer (frame address) of this frame is known,
+ just return it. */
+
+ if (fi->initial_sp)
+ return fi->initial_sp;
+
+ /* find out if this function is using an alloca register.. */
+
+ function_frame_info (get_pc_function_start (fi->pc), &fdata);
+
+ /* if saved registers of this frame are not known yet, read and cache them. */
+
+ if (!fi->cache_fsr)
+ frame_get_cache_fsr (fi, &fdata);
+
+ /* If no alloca register used, then fi->frame is the value of the %sp for
+ this frame, and it is good enough. */
+
+ if (fdata.alloca_reg < 0) {
+ fi->initial_sp = fi->frame;
+ return fi->initial_sp;
+ }
+
+ /* This function has an alloca register. If this is the top-most frame
+ (with the lowest address), the value in alloca register is good. */
+
+ if (!fi->next)
+ return fi->initial_sp = read_register (fdata.alloca_reg);
+
+ /* Otherwise, this is a caller frame. Callee has usually already saved
+ registers, but there are exceptions (such as when the callee
+ has no parameters). Find the address in which caller's alloca
+ register is saved. */
+
+ for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
+
+ if (!callee_fi->cache_fsr)
+ frame_get_cache_fsr (callee_fi, NULL);
+
+ /* this is the address in which alloca register is saved. */
+
+ tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
+ if (tmpaddr) {
+ fi->initial_sp = read_memory_integer (tmpaddr, 4);
+ return fi->initial_sp;
+ }
+
+ /* Go look into deeper levels of the frame chain to see if any one of
+ the callees has saved alloca register. */
+ }
+
+ /* If alloca register was not saved, by the callee (or any of its callees)
+ then the value in the register is still good. */
+
+ return fi->initial_sp = read_register (fdata.alloca_reg);
+}
+
+/* xcoff_relocate_symtab - hook for symbol table relocation.
+ also reads shared libraries.. */
+
+xcoff_relocate_symtab (pid)
+unsigned int pid;
+{
+#define MAX_LOAD_SEGS 64 /* maximum number of load segments */
+
+ struct ld_info *ldi;
+ int temp;
+
+ ldi = (void *) alloca(MAX_LOAD_SEGS * sizeof (*ldi));
+
+ /* According to my humble theory, AIX has some timing problems and
+ when the user stack grows, kernel doesn't update stack info in time
+ and ptrace calls step on user stack. That is why we sleep here a little,
+ and give kernel to update its internals. */
+
+ usleep (36000);
+
+ errno = 0;
+ ptrace(PT_LDINFO, pid, (PTRACE_ARG3_TYPE) ldi,
+ MAX_LOAD_SEGS * sizeof(*ldi), ldi);
+ if (errno) {
+ perror_with_name ("ptrace ldinfo");
+ return 0;
+ }
+
+ vmap_ldinfo(ldi);
+
+ do {
+ add_text_to_loadinfo (ldi->ldinfo_textorg, ldi->ldinfo_dataorg);
+ } while (ldi->ldinfo_next
+ && (ldi = (void *) (ldi->ldinfo_next + (char *) ldi)));
+
+#if 0
+ /* Now that we've jumbled things around, re-sort them. */
+ sort_minimal_symbols ();
+#endif
+
+ /* relocate the exec and core sections as well. */
+ vmap_exec ();
+}
+\f
+/* Keep an array of load segment information and their TOC table addresses.
+ This info will be useful when calling a shared library function by hand. */
+
+struct loadinfo {
+ CORE_ADDR textorg, dataorg;
+ unsigned long toc_offset;
+};
+
+#define LOADINFOLEN 10
+
+/* FIXME Warning -- loadinfotextindex is used for a nefarious purpose by
+ tm-rs6000.h. */
+
+static struct loadinfo *loadinfo = NULL;
+static int loadinfolen = 0;
+static int loadinfotocindex = 0;
+int loadinfotextindex = 0;
+
+
+void
+xcoff_init_loadinfo ()
+{
+ loadinfotocindex = 0;
+ loadinfotextindex = 0;
+
+ if (loadinfolen == 0) {
+ loadinfo = (struct loadinfo *)
+ xmalloc (sizeof (struct loadinfo) * LOADINFOLEN);
+ loadinfolen = LOADINFOLEN;
+ }
+}
+
+
+/* FIXME -- this is never called! */
+void
+free_loadinfo ()
+{
+ if (loadinfo)
+ free (loadinfo);
+ loadinfo = NULL;
+ loadinfolen = 0;
+ loadinfotocindex = 0;
+ loadinfotextindex = 0;
+}
+
+/* this is called from xcoffread.c */
+
+void
+xcoff_add_toc_to_loadinfo (unsigned long tocoff)
+{
+ while (loadinfotocindex >= loadinfolen) {
+ loadinfolen += LOADINFOLEN;
+ loadinfo = (struct loadinfo *)
+ xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
+ }
+ loadinfo [loadinfotocindex++].toc_offset = tocoff;
+}
+
+
+void
+add_text_to_loadinfo (textaddr, dataaddr)
+ CORE_ADDR textaddr;
+ CORE_ADDR dataaddr;
+{
+ while (loadinfotextindex >= loadinfolen) {
+ loadinfolen += LOADINFOLEN;
+ loadinfo = (struct loadinfo *)
+ xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
+ }
+ loadinfo [loadinfotextindex].textorg = textaddr;
+ loadinfo [loadinfotextindex].dataorg = dataaddr;
+ ++loadinfotextindex;
+}
+
+
+/* FIXME: This assumes that the "textorg" and "dataorg" elements
+ of a member of this array are correlated with the "toc_offset"
+ element of the same member. But they are sequentially assigned in wildly
+ different places, and probably there is no correlation. FIXME! */
+
+static CORE_ADDR
+find_toc_address (pc)
+ CORE_ADDR pc;
+{
+ int ii, toc_entry, tocbase = 0;
+
+ for (ii=0; ii < loadinfotextindex; ++ii)
+ if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) {
+ toc_entry = ii;
+ tocbase = loadinfo[ii].textorg;
+ }
+
+ return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset;
+}
projects / deliverable / binutils-gdb.git / blobdiff