gdb/riscv: expect h/w watchpoints to trigger before the memory is written

[deliverable/binutils-gdb.git] / gdb / s390-tdep.c

diff --git a/gdb/s390-tdep.c b/gdb/s390-tdep.c
index 77e64af58399d5bd50894b17e8f761b57f5e814b..23689aa71a151ef2629728246753bb66864ff914 100644 (file)
--- a/gdb/s390-tdep.c
+++ b/gdb/s390-tdep.c
@@ -492,6 +492,9 @@ s390_displaced_step_fixup (struct gdbarch *gdbarch,
       /* Recompute saved return address in R1.  */
       regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
                                      amode | (from + insnlen));
+      /* Update PC iff the instruction doesn't actually branch.  */
+      if (insn[0] == op_basr && r2 == 0)
+       regcache_write_pc (regs, from + insnlen);
     }
 
   /* Handle absolute branch instructions.  */
@@ -1272,8 +1275,9 @@ s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
   if (regnum_is_gpr_full (tdep, regnum))
     return builtin_type (gdbarch)->builtin_uint64;
 
+  /* For the "concatenated" vector registers use the same type as v16.  */
   if (regnum_is_vxr_full (tdep, regnum))
-    return tdesc_find_type (gdbarch, "vec128");
+    return tdesc_register_type (gdbarch, S390_V16_REGNUM);
 
   internal_error (__FILE__, __LINE__, _("invalid regnum"));
 }
@@ -2357,11 +2361,11 @@ s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
             Recognize this case by looking ahead a bit ...  */
 
          struct s390_prologue_data data2;
-         pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
+         pv_t *sp2 = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
 
          if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
-               && pv_is_register (*sp, S390_SP_REGNUM)
-               && sp->k != 0))
+               && pv_is_register (*sp2, S390_SP_REGNUM)
+               && sp2->k != 0))
            return 0;
        }
     }