* rs6000-tdep.c (rs6000_skip_prologue): Use skip_prologue_using_sal.

[deliverable/binutils-gdb.git] / gdb / sh-tdep.c

diff --git a/gdb/sh-tdep.c b/gdb/sh-tdep.c
index a2fb0d40cedf8697eb0997aaf5ad0aecd47cfbbc..59f374b8adf424bbfb9ebaad31e831b157313ed0 100644 (file)
--- a/gdb/sh-tdep.c
+++ b/gdb/sh-tdep.c
@@ -1,7 +1,7 @@
 /* Target-dependent code for Renesas Super-H, for GDB.
 
-   Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
-   2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+   Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+   2003, 2004, 2005, 2007 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
@@ -2004,7 +2004,7 @@ sh_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
                                             base_regnum) * portion));
       /* We must pay attention to the endiannes. */
       sh_register_convert_to_virtual (reg_nr,
-                                     gdbarch_register_type (gdbarch, reg_nr),
+                                     register_type (gdbarch, reg_nr),
                                      temp_buffer, buffer);
     }
   else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
@@ -2044,7 +2044,7 @@ sh_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
       base_regnum = dr_reg_base_num (reg_nr);
 
       /* We must pay attention to the endiannes. */
-      sh_register_convert_to_raw (gdbarch_register_type (gdbarch, reg_nr),
+      sh_register_convert_to_raw (register_type (gdbarch, reg_nr),
                                  reg_nr, buffer, temp_buffer);
 
       /* Write the real regs for which this one is an alias.  */
@@ -2114,6 +2114,58 @@ sh_sh2a_register_sim_regno (int nr)
   return legacy_register_sim_regno (nr);
 }
 
+/* Set up the register unwinding such that call-clobbered registers are
+   not displayed in frames >0 because the true value is not certain.
+   The 'undefined' registers will show up as 'not available' unless the
+   CFI says otherwise.
+
+   This function is currently set up for SH4 and compatible only.  */
+
+static void
+sh_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
+                          struct dwarf2_frame_state_reg *reg,
+                         struct frame_info *next_frame)
+{
+  /* Mark the PC as the destination for the return address.  */
+  if (regnum == PC_REGNUM)
+    reg->how = DWARF2_FRAME_REG_RA;
+
+  /* Mark the stack pointer as the call frame address.  */
+  else if (regnum == SP_REGNUM)
+    reg->how = DWARF2_FRAME_REG_CFA;
+
+  /* The above was taken from the default init_reg in dwarf2-frame.c
+     while the below is SH specific.  */
+
+  /* Caller save registers.  */
+  else if ((regnum >= R0_REGNUM && regnum <= R0_REGNUM+7)
+          || (regnum >= FR0_REGNUM && regnum <= FR0_REGNUM+11)
+          || (regnum >= DR0_REGNUM && regnum <= DR0_REGNUM+5)
+          || (regnum >= FV0_REGNUM && regnum <= FV0_REGNUM+2)
+          || (regnum == MACH_REGNUM)
+          || (regnum == MACL_REGNUM)
+          || (regnum == FPUL_REGNUM)
+          || (regnum == SR_REGNUM))
+    reg->how = DWARF2_FRAME_REG_UNDEFINED;
+
+  /* Callee save registers.  */
+  else if ((regnum >= R0_REGNUM+8 && regnum <= R0_REGNUM+15)
+          || (regnum >= FR0_REGNUM+12 && regnum <= FR0_REGNUM+15)
+          || (regnum >= DR0_REGNUM+6 && regnum <= DR0_REGNUM+8)
+          || (regnum == FV0_REGNUM+3))
+    reg->how = DWARF2_FRAME_REG_SAME_VALUE;
+
+  /* Other registers.  These are not in the ABI and may or may not
+     mean anything in frames >0 so don't show them.  */
+  else if ((regnum >= R0_BANK0_REGNUM && regnum <= R0_BANK0_REGNUM+15)
+          || (regnum == GBR_REGNUM)
+          || (regnum == VBR_REGNUM)
+          || (regnum == FPSCR_REGNUM)
+          || (regnum == SSR_REGNUM)
+          || (regnum == SPC_REGNUM))
+    reg->how = DWARF2_FRAME_REG_UNDEFINED;
+}
+
 static struct sh_frame_cache *
 sh_alloc_frame_cache (void)
 {
@@ -2163,7 +2215,7 @@ sh_frame_cache (struct frame_info *next_frame, void **this_cache)
   if (cache->base == 0)
     return cache;
 
-  cache->pc = frame_func_unwind (next_frame);
+  cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
   current_pc = frame_pc_unwind (next_frame);
   if (cache->pc != 0)
     sh_analyze_prologue (cache->pc, current_pc, cache);
@@ -2492,6 +2544,8 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
   set_gdbarch_in_function_epilogue_p (gdbarch, sh_in_function_epilogue_p);
 
+  dwarf2_frame_set_init_reg (gdbarch, sh_dwarf2_frame_init_reg);
+
   switch (info.bfd_arch_info->mach)
     {
     case bfd_mach_sh:
@@ -2541,10 +2595,13 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
       break;
 
     case bfd_mach_sh3:
+    case bfd_mach_sh3_nommu:
+    case bfd_mach_sh2a_nofpu_or_sh3_nommu:
       set_gdbarch_register_name (gdbarch, sh_sh3_register_name);
       break;
 
     case bfd_mach_sh3e:
+    case bfd_mach_sh2a_or_sh3e:
       /* doubles on sh2e and sh3e are actually 4 byte. */
       set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
 
@@ -2574,6 +2631,9 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
     case bfd_mach_sh4_nofpu:
     case bfd_mach_sh4a_nofpu:
+    case bfd_mach_sh4_nommu_nofpu:
+    case bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu:
+    case bfd_mach_sh2a_or_sh4:
       set_gdbarch_register_name (gdbarch, sh_sh4_nofpu_register_name);
       break;