-/* Target-dependent code for Hitachi Super-H, for GDB.
- Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
- Free Software Foundation, Inc.
+/* Target-dependent code for Renesas Super-H, for GDB.
+
+ Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
+ 2002, 2003, 2004 Free Software Foundation, Inc.
This file is part of GDB.
#include "defs.h"
#include "frame.h"
#include "symtab.h"
-#include "symfile.h"
+#include "objfiles.h"
#include "gdbtypes.h"
#include "gdbcmd.h"
#include "gdbcore.h"
/* registers numbers shared with the simulator */
#include "gdb/sim-sh.h"
-/* Information that is dependent on the processor variant. */
+/* Information that is dependent on the processor variant. */
enum sh_abi
{
SH_ABI_UNKNOWN,
/* FPP stands for Floating Point Pair, to avoid confusion with
GDB's FP0_REGNUM, which is the number of the first Floating
point register. Unfortunately on the sh5, the floating point
- registers are called FR, and the floating point pairs are called FP. */
+ registers are called FR, and the floating point pairs are called FP. */
FPP0_REGNUM = 173,
FPP_LAST_REGNUM = 204,
FV0_REGNUM = 205,
};
static const char *
-sh_sh64_register_name (int reg_nr)
+sh64_register_name (int reg_nr)
{
static char *register_names[] =
{
/* Macros and functions for setting and testing a bit in a minimal
symbol that marks it as 32-bit function. The MSB of the minimal
- symbol's "info" field is used for this purpose. This field is
- already being used to store the symbol size, so the assumption is
- that the symbol size cannot exceed 2^31.
+ symbol's "info" field is used for this purpose.
ELF_MAKE_MSYMBOL_SPECIAL
tests whether an ELF symbol is "special", i.e. refers
to a 32-bit function, and sets a "special" bit in a
minimal symbol to mark it as a 32-bit function
- MSYMBOL_IS_SPECIAL tests the "special" bit in a minimal symbol
- MSYMBOL_SIZE returns the size of the minimal symbol, i.e.
- the "info" field with the "special" bit masked out */
+ MSYMBOL_IS_SPECIAL tests the "special" bit in a minimal symbol */
#define MSYMBOL_IS_SPECIAL(msym) \
(((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
struct minimal_symbol *sym;
/* If bit 0 of the address is set, assume this is a
- ISA32 (shmedia) address. */
+ ISA32 (shmedia) address. */
if (IS_ISA32_ADDR (memaddr))
return 1;
}
static const unsigned char *
-sh_sh64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
+sh64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
{
/* The BRK instruction for shmedia is
01101111 11110101 11111111 11110000
#define IS_MOV_R14_R0(x) ((x) == 0x20e6)
/* ADD Rm,R63,Rn Rm+R63-->Rn 0000 00mm mmmm 1001 1111 11nn nnnn 0000
- where Rm is one of r2-r9 which are the argument registers. */
+ where Rm is one of r2-r9 which are the argument registers. */
/* FIXME: Recognize the float and double register moves too! */
#define IS_MEDIA_IND_ARG_MOV(x) \
((((x) & 0xfc0ffc0f) == 0x0009fc00) && (((x) & 0x03f00000) >= 0x00200000 && ((x) & 0x03f00000) <= 0x00900000))
/* ST.Q Rn,0,Rm Rm-->Rn+0 1010 11nn nnnn 0000 0000 00mm mmmm 0000
or ST.L Rn,0,Rm Rm-->Rn+0 1010 10nn nnnn 0000 0000 00mm mmmm 0000
- where Rm is one of r2-r9 which are the argument registers. */
+ where Rm is one of r2-r9 which are the argument registers. */
#define IS_MEDIA_ARG_MOV(x) \
(((((x) & 0xfc0ffc0f) == 0xac000000) || (((x) & 0xfc0ffc0f) == 0xa8000000)) \
&& (((x) & 0x000003f0) >= 0x00000020 && ((x) & 0x000003f0) <= 0x00000090))
/* Skip any prologue before the guts of a function */
-/* Skip the prologue using the debug information. If this fails we'll
- fall back on the 'guess' method below. */
+/* Skip the prologue using the debug information. If this fails we'll
+ fall back on the 'guess' method below. */
static CORE_ADDR
after_prologue (CORE_ADDR pc)
{
{
/* This must be followed by a store to r14, so the argument
is where the debug info says it is. This can happen after
- the SP has been saved, unfortunately. */
+ the SP has been saved, unfortunately. */
int next_insn = read_memory_integer (UNMAKE_ISA32_ADDR (here),
insn_size);
}
else if (IS_MEDIA_ARG_MOV (w))
{
- /* These instructions store directly the argument in r14. */
+ /* These instructions store directly the argument in r14. */
start_pc = here;
}
else
{
/* This must be followed by a store to r14, so the argument
is where the debug info says it is. This can happen after
- the SP has been saved, unfortunately. */
+ the SP has been saved, unfortunately. */
int next_insn = 0xffff & read_memory_integer (here, insn_size);
here += insn_size;
}
else if (IS_COMPACT_ARG_MOV (w))
{
- /* These instructions store directly the argument in r14. */
+ /* These instructions store directly the argument in r14. */
start_pc = here;
}
else if (IS_MOVL_R0 (w))
stack slot in the register. GCC thinks the argument is
just passed by transparent reference, but this is only
true after the argument decoder is called. Such a call
- needs to be considered part of the prologue. */
+ needs to be considered part of the prologue. */
/* This must be followed by a JSR @r0 instruction and by
a NOP instruction. After these, the prologue is over! */
{
/* Don't bail out yet, we may have arguments stored in
registers here, according to the debug info, so that
- gdb can print the frames correctly. */
+ gdb can print the frames correctly. */
start_pc = look_for_args_moves (here - insn_size, media_mode);
break;
}
{
/* Don't bail out yet, we may have arguments stored in
registers here, according to the debug info, so that
- gdb can print the frames correctly. */
+ gdb can print the frames correctly. */
start_pc = look_for_args_moves (here - insn_size, media_mode);
break;
}
post_prologue_pc = after_prologue (pc);
/* If after_prologue returned a useful address, then use it. Else
- fall back on the instruction skipping code. */
+ fall back on the instruction skipping code. */
if (post_prologue_pc != 0)
return max (pc, post_prologue_pc);
else
/* Given a register number RN as it appears in an assembly
instruction, find the corresponding register number in the GDB
- scheme. */
+ scheme. */
static int
translate_insn_rn (int rn, int media_mode)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-
/* FIXME: this assumes that the number rn is for a not pseudo
- register only. */
+ register only. */
if (media_mode)
return rn;
else
{
- /* These registers don't have a corresponding compact one. */
- /* FIXME: This is probably not enough. */
+ /* These registers don't have a corresponding compact one. */
+ /* FIXME: This is probably not enough. */
#if 0
if ((rn >= 16 && rn <= 63) || (rn >= 93 && rn <= 140))
return rn;
if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
get_frame_base (frame),
get_frame_base (frame)))
- return get_frame_base (frame); /* dummy frame same as caller's frame */
+ return get_frame_base (frame); /* dummy frame same as caller's frame */
if (get_frame_pc (frame)
&& !deprecated_inside_entry_file (get_frame_pc (frame)))
{
if (gdbarch_tdep (current_gdbarch)->sh_abi == SH_ABI_32)
size = 4;
else
- size = REGISTER_RAW_SIZE (translate_insn_rn (DEPRECATED_FP_REGNUM, media_mode));
+ size = register_size (current_gdbarch,
+ translate_insn_rn (DEPRECATED_FP_REGNUM,
+ media_mode));
return read_memory_integer (get_frame_base (frame)
+ get_frame_extra_info (frame)->f_offset,
size);
for (; fi; fi = get_next_frame (fi))
if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
get_frame_base (fi)))
- /* When the caller requests PR from the dummy frame, we return PC because
- that's where the previous routine appears to have done a call from. */
+ /* When the caller requests PR from the dummy frame, we return
+ PC because that's where the previous routine appears to have
+ done a call from. */
return deprecated_read_register_dummy (get_frame_pc (fi),
get_frame_base (fi), pr_regnum);
else
int gdb_reg_num = translate_insn_rn (pr_regnum, media_mode);
int size = ((gdbarch_tdep (current_gdbarch)->sh_abi == SH_ABI_32)
? 4
- : REGISTER_RAW_SIZE (gdb_reg_num));
+ : register_size (current_gdbarch, gdb_reg_num));
return read_memory_integer (deprecated_get_frame_saved_regs (fi)[pr_regnum], size);
}
}
return read_register (pr_regnum);
}
-/* For vectors of 4 floating point registers. */
+/* For vectors of 4 floating point registers. */
static int
fv_reg_base_num (int fv_regnum)
{
static int
is_media_pseudo (int rn)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-
- return (rn >= DR0_REGNUM
- && rn <= FV_LAST_REGNUM);
-}
-
-static int
-sh64_get_gdb_regnum (int gcc_regnum, CORE_ADDR pc)
-{
- return translate_insn_rn (gcc_regnum, pc_is_isa32 (pc));
+ return (rn >= DR0_REGNUM && rn <= FV_LAST_REGNUM);
}
static int
sh64_media_reg_base_num (int reg_nr)
{
int base_regnum = -1;
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
if (reg_nr >= DR0_REGNUM
&& reg_nr <= DR_LAST_REGNUM)
sh64_compact_reg_base_num (int reg_nr)
{
int base_regnum = -1;
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
/* general register N maps to general register N */
if (reg_nr >= R0_C_REGNUM
base_regnum = 19;
else if (reg_nr == FPSCR_C_REGNUM)
- base_regnum = FPSCR_REGNUM; /*???? this register is a mess. */
+ base_regnum = FPSCR_REGNUM; /*???? this register is a mess. */
else if (reg_nr == FPUL_C_REGNUM)
base_regnum = FP0_REGNUM + 32;
/* Given a register number RN (according to the gdb scheme) , return
its corresponding architectural register. In media mode, only a
subset of the registers is pseudo registers. For compact mode, all
- the registers are pseudo. */
+ the registers are pseudo. */
static int
translate_rn_to_arch_reg_num (int rn, int media_mode)
{
return sh64_media_reg_base_num (rn);
}
else
- /* All compact registers are pseudo. */
+ /* All compact registers are pseudo. */
return sh64_compact_reg_base_num (rn);
}
int insn_size;
int gdb_register_number;
int register_number;
- char *dummy_regs = deprecated_generic_find_dummy_frame (get_frame_pc (fi), get_frame_base (fi));
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ char *dummy_regs = deprecated_generic_find_dummy_frame (get_frame_pc (fi),
+ get_frame_base (fi));
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
if (deprecated_get_frame_saved_regs (fi) == NULL)
frame_saved_regs_zalloc (fi);
/* Loop around examining the prologue insns until we find something
that does not appear to be part of the prologue. But give up
- after 20 of them, since we're getting silly then. */
+ after 20 of them, since we're getting silly then. */
pc = get_frame_func (fi);
if (!pc)
/* The frame pointer register is general register 14 in shmedia and
shcompact modes. In sh compact it is a pseudo register. Same goes
- for the stack pointer register, which is register 15. */
+ for the stack pointer register, which is register 15. */
fp_regnum = translate_insn_rn (DEPRECATED_FP_REGNUM, media_mode);
sp_regnum = translate_insn_rn (SP_REGNUM, media_mode);
else if (IS_ADD_SP_R0 (insn))
{
/* This instruction still prepares r0, but we don't care.
- We already have the offset in r0_val. */
+ We already have the offset in r0_val. */
}
else if (IS_STS_R0 (insn))
{
}
}
- /* Now we know how deep things are, we can work out their addresses. */
+ /* Now we know how deep things are, we can work out their addresses. */
for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
{
register_number = translate_rn_to_arch_reg_num (rn, media_mode);
have_fp = 1;
/* Watch out! saved_regs is only for the real registers, and
- doesn't include space for the pseudo registers. */
- deprecated_get_frame_saved_regs (fi)[register_number]= get_frame_base (fi) - where[rn] + depth;
-
+ doesn't include space for the pseudo registers. */
+ deprecated_get_frame_saved_regs (fi)[register_number]
+ = get_frame_base (fi) - where[rn] + depth;
}
else
- deprecated_get_frame_saved_regs (fi)[register_number] = 0;
+ deprecated_get_frame_saved_regs (fi)[register_number] = 0;
}
if (have_fp)
{
/* SP_REGNUM is 15. For shmedia 15 is the real register. For
shcompact 15 is the arch register corresponding to the pseudo
- register r15 which still is the SP register. */
+ register r15 which still is the SP register. */
/* The place on the stack where fp is stored contains the sp of
- the caller. */
+ the caller. */
/* Again, saved_registers contains only space for the real
registers, so we store in DEPRECATED_FP_REGNUM position. */
int size;
if (tdep->sh_abi == SH_ABI_32)
size = 4;
else
- size = REGISTER_RAW_SIZE (fp_regnum);
- deprecated_get_frame_saved_regs (fi)[sp_regnum] = read_memory_integer (deprecated_get_frame_saved_regs (fi)[fp_regnum], size);
+ size = register_size (current_gdbarch, fp_regnum);
+ deprecated_get_frame_saved_regs (fi)[sp_regnum]
+ = read_memory_integer (deprecated_get_frame_saved_regs (fi)[fp_regnum],
+ size);
}
else
deprecated_get_frame_saved_regs (fi)[sp_regnum] = get_frame_base (fi);
- get_frame_extra_info (fi)->f_offset = depth - where[fp_regnum];
+ get_frame_extra_info (fi)->f_offset = depth - where[fp_regnum];
}
/* Initialize the extra info saved in a FRAME */
{
int media_mode;
int live_regnum = regnum;
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
if (!target_has_registers)
error ("No registers.");
memcpy (raw_buffer,
(deprecated_generic_find_dummy_frame (get_frame_pc (frame), get_frame_base (frame))
+ DEPRECATED_REGISTER_BYTE (regnum)),
- REGISTER_RAW_SIZE (regnum));
+ register_size (current_gdbarch, regnum));
return;
}
if (regnum == SP_REGNUM)
{
if (raw_buffer) /* SP register treated specially */
- store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
+ store_unsigned_integer (raw_buffer,
+ register_size (current_gdbarch,
+ regnum),
deprecated_get_frame_saved_regs (frame)[regnum]);
}
else
|| live_regnum == PR_REGNUM))
size = 4;
else
- size = REGISTER_RAW_SIZE (live_regnum);
+ size = register_size (current_gdbarch, live_regnum);
if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
- read_memory (deprecated_get_frame_saved_regs (frame)[regnum], raw_buffer, size);
+ read_memory (deprecated_get_frame_saved_regs (frame)[regnum],
+ raw_buffer, size);
else
read_memory (deprecated_get_frame_saved_regs (frame)[regnum],
raw_buffer
- + REGISTER_RAW_SIZE (live_regnum)
+ + register_size (current_gdbarch, live_regnum)
- size,
size);
}
}
static CORE_ADDR
-sh64_extract_struct_value_address (char *regbuf)
+sh64_extract_struct_value_address (struct regcache *regcache)
{
- return (extract_unsigned_integer ((regbuf + DEPRECATED_REGISTER_BYTE (STRUCT_RETURN_REGNUM)),
- REGISTER_RAW_SIZE (STRUCT_RETURN_REGNUM)));
+ /* FIXME: cagney/2004-01-17: Does the ABI guarantee that the return
+ address regster is preserved across function calls? Probably
+ not, making this function wrong. */
+ ULONGEST val;
+ regcache_raw_read_unsigned (regcache, STRUCT_RETURN_REGNUM, &val);
+ return val;
}
static CORE_ADDR
}
/* Discard from the stack the innermost frame, restoring all saved registers.
- Used in the 'return' command. */
+ Used in the 'return' command. */
static void
sh64_pop_frame (void)
{
struct frame_info *frame = get_current_frame ();
CORE_ADDR fp;
int regnum;
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
int media_mode = pc_is_isa32 (get_frame_pc (frame));
|| regnum == PR_REGNUM))
size = 4;
else
- size = REGISTER_RAW_SIZE (translate_insn_rn (regnum,
- media_mode));
+ size = register_size (current_gdbarch,
+ translate_insn_rn (regnum, media_mode));
write_register (regnum,
read_memory_integer (deprecated_get_frame_saved_regs (frame)[regnum],
size));
/* Function: push_arguments
Setup the function arguments for calling a function in the inferior.
- On the Hitachi SH architecture, there are four registers (R4 to R7)
+ On the Renesas SH architecture, there are four registers (R4 to R7)
which are dedicated for passing function arguments. Up to the first
four arguments (depending on size) may go into these registers.
The rest go on the stack.
I.e. there is hole in the stack.
Different rules apply for variable arguments functions, and for functions
- for which the prototype is not known. */
+ for which the prototype is not known. */
static CORE_ADDR
sh64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
int len;
int argreg_size;
int fp_args[12];
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
memset (fp_args, 0, sizeof (fp_args));
if (TYPE_CODE (type) != TYPE_CODE_FLT)
{
- argreg_size = REGISTER_RAW_SIZE (int_argreg);
+ argreg_size = register_size (current_gdbarch, int_argreg);
if (len < argreg_size)
{
/* Store the value 8 bytes at a time. This means that
things larger than 8 bytes may go partly in registers
and partly on the stack. FIXME: argreg is incremented
- before we use its size. */
+ before we use its size. */
len -= argreg_size;
val += argreg_size;
int_argreg++;
deprecated_write_register_gen (FP0_REGNUM + float_arg_index,
val);
fp_args[float_arg_index] = 1;
- /* Skip the corresponding general argument register. */
+ /* Skip the corresponding general argument register. */
int_argreg ++;
}
else
;
/* Store it as the integers, 8 bytes at the time, if
- necessary spilling on the stack. */
+ necessary spilling on the stack. */
}
else if (len == 8)
{
/* Goes in DR0...DR10 */
/* The numbering of the DRi registers is consecutive,
- i.e. includes odd numbers. */
+ i.e. includes odd numbers. */
int double_register_offset = double_arg_index / 2;
int regnum = DR0_REGNUM +
double_register_offset;
registers, not pseudo. write_register_gen will
call the gdbarch function to do register
writes, and that will properly know how to deal
- with pseudoregs. */
+ with pseudoregs. */
deprecated_write_register_gen (regnum, val);
fp_args[double_arg_index] = 1;
fp_args[double_arg_index + 1] = 1;
- /* Skip the corresponding general argument register. */
+ /* Skip the corresponding general argument register. */
int_argreg ++;
}
else
;
/* Store it as the integers, 8 bytes at the time, if
- necessary spilling on the stack. */
+ necessary spilling on the stack. */
}
}
}
int offset;
int return_register;
int len = TYPE_LENGTH (type);
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
/* Return value stored in FP0_REGNUM */
return_register = FP0_REGNUM;
offset = DEPRECATED_REGISTER_BYTE (return_register);
- memcpy (valbuf, (char *) regbuf + offset, len);
+ memcpy (valbuf, (char *) regbuf + offset, len);
}
else if (len == 8)
{
else
floatformat_to_doublest (&floatformat_ieee_double_big,
(char *) regbuf + offset, &val);
- deprecated_store_floating (valbuf, len, val);
+ store_typed_floating (valbuf, type, val);
}
}
else
if (len <= 8)
{
/* Result is in register 2. If smaller than 8 bytes, it is padded
- at the most significant end. */
+ at the most significant end. */
return_register = DEFAULT_RETURN_REGNUM;
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
offset = DEPRECATED_REGISTER_BYTE (return_register) +
- REGISTER_RAW_SIZE (return_register) - len;
+ register_size (current_gdbarch, return_register) - len;
else
offset = DEPRECATED_REGISTER_BYTE (return_register);
memcpy (valbuf, (char *) regbuf + offset, len);
If the architecture is sh4 or sh3e, store a function's return value
in the R0 general register or in the FP0 floating point register,
depending on the type of the return value. In all the other cases
- the result is stored in r0, left-justified. */
+ the result is stored in r0, left-justified. */
static void
sh64_store_return_value (struct type *type, char *valbuf)
{
- char buf[64]; /* more than enough... */
+ char buf[64]; /* more than enough... */
int len = TYPE_LENGTH (type);
if (TYPE_CODE (type) == TYPE_CODE_FLT)
int return_register = DEFAULT_RETURN_REGNUM;
int offset = 0;
- if (len <= REGISTER_RAW_SIZE (return_register))
+ if (len <= register_size (current_gdbarch, return_register))
{
- /* Pad with zeros. */
- memset (buf, 0, REGISTER_RAW_SIZE (return_register));
+ /* Pad with zeros. */
+ memset (buf, 0, register_size (current_gdbarch, return_register));
if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
- offset = 0; /*REGISTER_RAW_SIZE (return_register) - len;*/
+ offset = 0; /*register_size (current_gdbarch,
+ return_register) - len;*/
else
- offset = REGISTER_RAW_SIZE (return_register) - len;
+ offset = register_size (current_gdbarch, return_register) - len;
memcpy (buf + offset, valbuf, len);
deprecated_write_register_gen (return_register, buf);
sh64_show_media_regs (void)
{
int i;
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
printf_filtered ("PC=%s SR=%016llx \n",
paddr (read_register (PC_REGNUM)),
sh64_show_compact_regs (void)
{
int i;
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
printf_filtered ("PC=%s \n",
paddr (read_register (PC_C_REGNUM)));
(long) read_register (FP0_REGNUM + i + 7));
}
-/*FIXME!!! This only shows the registers for shmedia, excluding the
- pseudo registers. */
+/* FIXME!!! This only shows the registers for shmedia, excluding the
+ pseudo registers. */
void
sh64_show_regs (void)
{
*/
/* *INDENT-ON* */
static int
-sh_sh64_register_byte (int reg_nr)
+sh64_register_byte (int reg_nr)
{
int base_regnum = -1;
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
/* If it is a pseudo register, get the number of the first floating
- point register that is part of it. */
+ point register that is part of it. */
if (reg_nr >= DR0_REGNUM
&& reg_nr <= DR_LAST_REGNUM)
base_regnum = dr_reg_base_num (reg_nr);
base_regnum = fv_reg_base_num (reg_nr);
/* sh compact pseudo register. FPSCR is a pathological case, need to
- treat it as special. */
+ treat it as special. */
else if ((reg_nr >= R0_C_REGNUM
&& reg_nr <= FV_LAST_C_REGNUM)
&& reg_nr != FPSCR_C_REGNUM)
base_regnum = sh64_compact_reg_base_num (reg_nr);
- /* Now return the offset in bytes within the register cache. */
- /* sh media pseudo register, i.e. any of DR, FFP, FV registers. */
+ /* Now return the offset in bytes within the register cache. */
+ /* sh media pseudo register, i.e. any of DR, FFP, FV registers. */
if (reg_nr >= DR0_REGNUM
&& reg_nr <= FV_LAST_REGNUM)
return (base_regnum - FP0_REGNUM + 1) * 4
else if (reg_nr == FPSCR_C_REGNUM)
/* This is complicated, for now return the beginning of the
- architectural FPSCR register. */
+ architectural FPSCR register. */
return (TR7_REGNUM + 1) * 8;
else if (reg_nr == FPUL_C_REGNUM)
return ((base_regnum - FP0_REGNUM) * 4 +
(TR7_REGNUM + 1) * 8 + 4);
- /* It is not a pseudo register. */
- /* It is a 64 bit register. */
+ /* It is not a pseudo register. */
+ /* It is a 64 bit register. */
else if (reg_nr <= TR7_REGNUM)
return reg_nr * 8;
- /* It is a 32 bit register. */
+ /* It is a 32 bit register. */
else if (reg_nr == FPSCR_REGNUM)
return (FPSCR_REGNUM * 8);
+ (reg_nr - FP0_REGNUM + 1) * 4);
}
-static int
-sh_sh64_register_raw_size (int reg_nr)
-{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-
- if ((reg_nr >= DR0_REGNUM
- && reg_nr <= DR_LAST_REGNUM)
- || (reg_nr >= FPP0_REGNUM
- && reg_nr <= FPP_LAST_REGNUM)
- || (reg_nr >= DR0_C_REGNUM
- && reg_nr <= DR_LAST_C_REGNUM)
- || (reg_nr <= TR7_REGNUM))
- return 8;
-
- else if ((reg_nr >= FV0_REGNUM
- && reg_nr <= FV_LAST_REGNUM)
- || (reg_nr >= FV0_C_REGNUM
- && reg_nr <= FV_LAST_C_REGNUM))
- return 16;
-
- else /* this covers also the 32-bit SH compact registers. */
- return 4;
-}
-
-/* ??????? FIXME */
-static int
-sh_sh64_register_virtual_size (int reg_nr)
-{
- if (reg_nr >= FP0_REGNUM
- && reg_nr <= FP_LAST_REGNUM)
- return 4;
- else
- return 8;
-}
-
static struct type *
-sh_sh64_build_float_register_type (int high)
+sh64_build_float_register_type (int high)
{
struct type *temp;
return create_array_type (NULL, builtin_type_float, temp);
}
+/* Return the GDB type object for the "standard" data type
+ of data in register REG_NR. */
static struct type *
-sh_sh64_register_virtual_type (int reg_nr)
+sh64_register_type (struct gdbarch *gdbarch, int reg_nr)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-
if ((reg_nr >= FP0_REGNUM
&& reg_nr <= FP_LAST_REGNUM)
|| (reg_nr >= FP0_C_REGNUM
return builtin_type_double;
else if (reg_nr >= FPP0_REGNUM
&& reg_nr <= FPP_LAST_REGNUM)
- return sh_sh64_build_float_register_type (1);
+ return sh64_build_float_register_type (1);
else if ((reg_nr >= FV0_REGNUM
&& reg_nr <= FV_LAST_REGNUM)
||(reg_nr >= FV0_C_REGNUM
&& reg_nr <= FV_LAST_C_REGNUM))
- return sh_sh64_build_float_register_type (3);
+ return sh64_build_float_register_type (3);
else if (reg_nr == FPSCR_REGNUM)
return builtin_type_int;
else if (reg_nr >= R0_C_REGNUM
}
static void
-sh_sh64_register_convert_to_virtual (int regnum, struct type *type,
+sh64_register_convert_to_virtual (int regnum, struct type *type,
char *from, char *to)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-
if (TARGET_BYTE_ORDER != BFD_ENDIAN_LITTLE)
{
- /* It is a no-op. */
- memcpy (to, from, REGISTER_RAW_SIZE (regnum));
+ /* It is a no-op. */
+ memcpy (to, from, register_size (current_gdbarch, regnum));
return;
}
&& regnum <= DR_LAST_C_REGNUM))
{
DOUBLEST val;
- floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
- deprecated_store_floating(to, TYPE_LENGTH(type), val);
+ floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword,
+ from, &val);
+ store_typed_floating (to, type, val);
}
else
- error("sh_register_convert_to_virtual called with non DR register number");
+ error ("sh64_register_convert_to_virtual called with non DR register number");
}
static void
-sh_sh64_register_convert_to_raw (struct type *type, int regnum,
+sh64_register_convert_to_raw (struct type *type, int regnum,
const void *from, void *to)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-
if (TARGET_BYTE_ORDER != BFD_ENDIAN_LITTLE)
{
- /* It is a no-op. */
- memcpy (to, from, REGISTER_RAW_SIZE (regnum));
+ /* It is a no-op. */
+ memcpy (to, from, register_size (current_gdbarch, regnum));
return;
}
&& regnum <= DR_LAST_C_REGNUM))
{
DOUBLEST val = deprecated_extract_floating (from, TYPE_LENGTH(type));
- floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
+ floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword,
+ &val, to);
}
else
- error("sh_register_convert_to_raw called with non DR register number");
+ error ("sh64_register_convert_to_raw called with non DR register number");
}
static void
int portion;
int offset = 0;
char temp_buffer[MAX_REGISTER_SIZE];
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
if (reg_nr >= DR0_REGNUM
&& reg_nr <= DR_LAST_REGNUM)
{
base_regnum = dr_reg_base_num (reg_nr);
- /* Build the value in the provided buffer. */
+ /* Build the value in the provided buffer. */
/* DR regs are double precision registers obtained by
- concatenating 2 single precision floating point registers. */
+ concatenating 2 single precision floating point registers. */
for (portion = 0; portion < 2; portion++)
regcache_raw_read (regcache, base_regnum + portion,
(temp_buffer
- + REGISTER_RAW_SIZE (base_regnum) * portion));
+ + register_size (gdbarch, base_regnum) * portion));
- /* We must pay attention to the endiannes. */
- sh_sh64_register_convert_to_virtual (reg_nr, REGISTER_VIRTUAL_TYPE (reg_nr),
- temp_buffer, buffer);
+ /* We must pay attention to the endianness. */
+ sh64_register_convert_to_virtual (reg_nr,
+ gdbarch_register_type (gdbarch,
+ reg_nr),
+ temp_buffer, buffer);
}
{
base_regnum = fpp_reg_base_num (reg_nr);
- /* Build the value in the provided buffer. */
+ /* Build the value in the provided buffer. */
/* FPP regs are pairs of single precision registers obtained by
- concatenating 2 single precision floating point registers. */
+ concatenating 2 single precision floating point registers. */
for (portion = 0; portion < 2; portion++)
regcache_raw_read (regcache, base_regnum + portion,
((char *) buffer
- + REGISTER_RAW_SIZE (base_regnum) * portion));
+ + register_size (gdbarch, base_regnum) * portion));
}
else if (reg_nr >= FV0_REGNUM
{
base_regnum = fv_reg_base_num (reg_nr);
- /* Build the value in the provided buffer. */
+ /* Build the value in the provided buffer. */
/* FV regs are vectors of single precision registers obtained by
- concatenating 4 single precision floating point registers. */
+ concatenating 4 single precision floating point registers. */
for (portion = 0; portion < 4; portion++)
regcache_raw_read (regcache, base_regnum + portion,
((char *) buffer
- + REGISTER_RAW_SIZE (base_regnum) * portion));
+ + register_size (gdbarch, base_regnum) * portion));
}
/* sh compact pseudo registers. 1-to-1 with a shmedia register */
{
base_regnum = sh64_compact_reg_base_num (reg_nr);
- /* Build the value in the provided buffer. */
+ /* Build the value in the provided buffer. */
regcache_raw_read (regcache, base_regnum, temp_buffer);
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
offset = 4;
{
base_regnum = sh64_compact_reg_base_num (reg_nr);
- /* Build the value in the provided buffer. */
+ /* Build the value in the provided buffer. */
/* Floating point registers map 1-1 to the media fp regs,
- they have the same size and endienness. */
+ they have the same size and endianness. */
regcache_raw_read (regcache, base_regnum, buffer);
}
base_regnum = sh64_compact_reg_base_num (reg_nr);
/* DR_C regs are double precision registers obtained by
- concatenating 2 single precision floating point registers. */
+ concatenating 2 single precision floating point registers. */
for (portion = 0; portion < 2; portion++)
regcache_raw_read (regcache, base_regnum + portion,
(temp_buffer
- + REGISTER_RAW_SIZE (base_regnum) * portion));
+ + register_size (gdbarch, base_regnum) * portion));
- /* We must pay attention to the endiannes. */
- sh_sh64_register_convert_to_virtual (reg_nr, REGISTER_VIRTUAL_TYPE (reg_nr),
- temp_buffer, buffer);
+ /* We must pay attention to the endianness. */
+ sh64_register_convert_to_virtual (reg_nr,
+ gdbarch_register_type (gdbarch,
+ reg_nr),
+ temp_buffer, buffer);
}
else if (reg_nr >= FV0_C_REGNUM
{
base_regnum = sh64_compact_reg_base_num (reg_nr);
- /* Build the value in the provided buffer. */
+ /* Build the value in the provided buffer. */
/* FV_C regs are vectors of single precision registers obtained by
- concatenating 4 single precision floating point registers. */
+ concatenating 4 single precision floating point registers. */
for (portion = 0; portion < 4; portion++)
regcache_raw_read (regcache, base_regnum + portion,
((char *) buffer
- + REGISTER_RAW_SIZE (base_regnum) * portion));
+ + register_size (gdbarch, base_regnum) * portion));
}
else if (reg_nr == FPSCR_C_REGNUM)
fpscr_base_regnum = FPSCR_REGNUM;
sr_base_regnum = SR_REGNUM;
- /* Build the value in the provided buffer. */
+ /* Build the value in the provided buffer. */
/* FPSCR_C is a very weird register that contains sparse bits
from the FPSCR and the SR architectural registers.
Specifically: */
/* *INDENT-ON* */
/* Get FPSCR into a local buffer */
regcache_raw_read (regcache, fpscr_base_regnum, temp_buffer);
- /* Get value as an int. */
+ /* Get value as an int. */
fpscr_value = extract_unsigned_integer (temp_buffer, 4);
/* Get SR into a local buffer */
regcache_raw_read (regcache, sr_base_regnum, temp_buffer);
- /* Get value as an int. */
+ /* Get value as an int. */
sr_value = extract_unsigned_integer (temp_buffer, 4);
- /* Build the new value. */
+ /* Build the new value. */
fpscr_c_part1_value = fpscr_value & 0x3fffd;
fpscr_c_part2_value = (sr_value & 0x7000) << 6;
fpscr_c_value = fpscr_c_part1_value | fpscr_c_part2_value;
/* Store that in out buffer!!! */
store_unsigned_integer (buffer, 4, fpscr_c_value);
- /* FIXME There is surely an endianness gotcha here. */
+ /* FIXME There is surely an endianness gotcha here. */
}
else if (reg_nr == FPUL_C_REGNUM)
base_regnum = sh64_compact_reg_base_num (reg_nr);
/* FPUL_C register is floating point register 32,
- same size, same endianness. */
+ same size, same endianness. */
regcache_raw_read (regcache, base_regnum, buffer);
}
}
int base_regnum, portion;
int offset;
char temp_buffer[MAX_REGISTER_SIZE];
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
if (reg_nr >= DR0_REGNUM
&& reg_nr <= DR_LAST_REGNUM)
{
base_regnum = dr_reg_base_num (reg_nr);
- /* We must pay attention to the endiannes. */
- sh_sh64_register_convert_to_raw (REGISTER_VIRTUAL_TYPE (reg_nr), reg_nr,
- buffer, temp_buffer);
-
+ /* We must pay attention to the endianness. */
+ sh64_register_convert_to_raw (gdbarch_register_type (gdbarch, reg_nr),
+ reg_nr,
+ buffer, temp_buffer);
/* Write the real regs for which this one is an alias. */
for (portion = 0; portion < 2; portion++)
regcache_raw_write (regcache, base_regnum + portion,
(temp_buffer
- + REGISTER_RAW_SIZE (base_regnum) * portion));
+ + register_size (gdbarch,
+ base_regnum) * portion));
}
else if (reg_nr >= FPP0_REGNUM
for (portion = 0; portion < 2; portion++)
regcache_raw_write (regcache, base_regnum + portion,
((char *) buffer
- + REGISTER_RAW_SIZE (base_regnum) * portion));
+ + register_size (gdbarch,
+ base_regnum) * portion));
}
else if (reg_nr >= FV0_REGNUM
for (portion = 0; portion < 4; portion++)
regcache_raw_write (regcache, base_regnum + portion,
((char *) buffer
- + REGISTER_RAW_SIZE (base_regnum) * portion));
+ + register_size (gdbarch,
+ base_regnum) * portion));
}
/* sh compact general pseudo registers. 1-to-1 with a shmedia
&& reg_nr <= T_C_REGNUM)
{
base_regnum = sh64_compact_reg_base_num (reg_nr);
- /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
+ /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
offset = 4;
else
offset = 0;
/* Let's read the value of the base register into a temporary
buffer, so that overwriting the last four bytes with the new
- value of the pseudo will leave the upper 4 bytes unchanged. */
+ value of the pseudo will leave the upper 4 bytes unchanged. */
regcache_raw_read (regcache, base_regnum, temp_buffer);
/* Write as an 8 byte quantity */
memcpy (temp_buffer + offset, buffer, 4);
}
/* sh floating point compact pseudo registers. 1-to-1 with a shmedia
- registers. Both are 4 bytes. */
+ registers. Both are 4 bytes. */
else if (reg_nr >= FP0_C_REGNUM
&& reg_nr <= FP_LAST_C_REGNUM)
{
base_regnum = sh64_compact_reg_base_num (reg_nr);
for (portion = 0; portion < 2; portion++)
{
- /* We must pay attention to the endiannes. */
- sh_sh64_register_convert_to_raw (REGISTER_VIRTUAL_TYPE (reg_nr), reg_nr,
- buffer, temp_buffer);
+ /* We must pay attention to the endianness. */
+ sh64_register_convert_to_raw (gdbarch_register_type (gdbarch,
+ reg_nr),
+ reg_nr,
+ buffer, temp_buffer);
regcache_raw_write (regcache, base_regnum + portion,
(temp_buffer
- + REGISTER_RAW_SIZE (base_regnum) * portion));
+ + register_size (gdbarch,
+ base_regnum) * portion));
}
}
{
regcache_raw_write (regcache, base_regnum + portion,
((char *) buffer
- + REGISTER_RAW_SIZE (base_regnum) * portion));
+ + register_size (gdbarch,
+ base_regnum) * portion));
}
}
21-31 reserved
*/
/* *INDENT-ON* */
- /* Get value as an int. */
+ /* Get value as an int. */
fpscr_c_value = extract_unsigned_integer (buffer, 4);
- /* Build the new values. */
+ /* Build the new values. */
fpscr_mask = 0x0003fffd;
sr_mask = 0x001c0000;
}
}
-/* Floating point vector of 4 float registers. */
+/* Floating point vector of 4 float registers. */
static void
do_fv_register_info (struct gdbarch *gdbarch, struct ui_file *file,
int fv_regnum)
(int) read_register (first_fp_reg_num + 3));
}
-/* Floating point vector of 4 float registers, compact mode. */
+/* Floating point vector of 4 float registers, compact mode. */
static void
do_fv_c_register_info (int fv_regnum)
{
}
/* Pairs of single regs. The DR are instead double precision
- registers. */
+ registers. */
static void
do_fpp_register_info (int fpp_regnum)
{
(int) read_register (first_fp_reg_num + 1));
}
-/* Double precision registers. */
+/* Double precision registers. */
static void
do_dr_register_info (struct gdbarch *gdbarch, struct ui_file *file,
int dr_regnum)
(int) read_register (first_fp_reg_num + 1));
}
-/* Double precision registers, compact mode. */
+/* Double precision registers, compact mode. */
static void
do_dr_c_register_info (int dr_regnum)
{
(int) read_register (first_fp_reg_num +1));
}
-/* General register in compact mode. */
+/* General register in compact mode. */
static void
do_r_c_register_info (int r_c_regnum)
{
}
/* FIXME:!! THIS SHOULD TAKE CARE OF GETTING THE RIGHT PORTION OF THE
- shmedia REGISTERS. */
-/* Control registers, compact mode. */
+ shmedia REGISTERS. */
+/* Control registers, compact mode. */
static void
do_cr_c_register_info (int cr_c_regnum)
{
int inv;
int j;
- /* Allocate space for the float. */
+ /* Allocate space for the float. */
raw_buffer = (char *) alloca (register_size (gdbarch, FP0_REGNUM));
/* Get the data in raw format. */
/* Get the register as a number */
flt = unpack_double (builtin_type_float, raw_buffer, &inv);
- /* Print the name and some spaces. */
+ /* Print the name and some spaces. */
fputs_filtered (REGISTER_NAME (regnum), file);
print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), file);
- /* Print the value. */
+ /* Print the value. */
if (inv)
fprintf_filtered (file, "<invalid float>");
else
fprintf_filtered (file, "%-10.9g", flt);
- /* Print the fp register as hex. */
+ /* Print the fp register as hex. */
fprintf_filtered (file, "\t(raw 0x");
for (j = 0; j < register_size (gdbarch, regnum); j++)
{
static void
sh64_do_pseudo_register (int regnum)
{
- /* All the sh64-compact mode registers are pseudo registers. */
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ /* All the sh64-compact mode registers are pseudo registers. */
if (regnum < NUM_REGS
|| regnum >= NUM_REGS + NUM_PSEUDO_REGS_SH_MEDIA + NUM_PSEUDO_REGS_SH_COMPACT)
else if (regnum >= R0_C_REGNUM
&& regnum <= R_LAST_C_REGNUM)
- do_r_c_register_info (regnum); /* FIXME, this function will not print the right format */
-
+ /* FIXME, this function will not print the right format. */
+ do_r_c_register_info (regnum);
else if (regnum >= FP0_C_REGNUM
&& regnum <= FP_LAST_C_REGNUM)
- sh_do_fp_register (current_gdbarch, gdb_stdout, regnum); /* this should work also for pseudoregs */
-
+ /* This should work also for pseudoregs. */
+ sh_do_fp_register (current_gdbarch, gdb_stdout, regnum);
else if (regnum >= PC_C_REGNUM
&& regnum <= FPUL_C_REGNUM)
do_cr_c_register_info (regnum);
-
}
static void
static void
sh_compact_do_registers_info (int regnum, int fpregs)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
if (regnum != -1) /* do one specified register */
{
if (*(REGISTER_NAME (regnum)) == '\0')
sh_print_registers_info (current_gdbarch, gdb_stdout,
deprecated_selected_frame, regnum, fpregs);
else
- sh_compact_do_registers_info (regnum, fpregs);
+ sh_compact_do_registers_info (regnum, fpregs);
}
#ifdef SVR4_SHARED_LIBS
return arches->gdbarch;
/* None found, create a new architecture from the information
- provided. */
+ provided. */
tdep = XMALLOC (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
/* NOTE: cagney/2002-12-06: This can be deleted when this arch is
ready to unwind the PC first (see frame.c:get_prev_frame()). */
- set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
+ set_gdbarch_deprecated_init_frame_pc (gdbarch, deprecated_init_frame_pc_default);
/* Determine the ABI */
if (info.abfd && bfd_get_arch_size (info.abfd) == 64)
{
- /* If the ABI is the 64-bit one, it can only be sh-media. */
+ /* If the ABI is the 64-bit one, it can only be sh-media. */
tdep->sh_abi = SH_ABI_64;
set_gdbarch_ptr_bit (gdbarch, 8 * TARGET_CHAR_BIT);
set_gdbarch_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
else
{
/* If the ABI is the 32-bit one it could be either media or
- compact. */
+ compact. */
tdep->sh_abi = SH_ABI_32;
set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
- set_gdbarch_decr_pc_after_break (gdbarch, 0);
- set_gdbarch_function_start_offset (gdbarch, 0);
- set_gdbarch_frame_args_skip (gdbarch, 0);
- set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
+ set_gdbarch_deprecated_frameless_function_invocation (gdbarch, legacy_frameless_look_for_prologue);
set_gdbarch_believe_pcc_promotion (gdbarch, 1);
set_gdbarch_deprecated_frame_saved_pc (gdbarch, sh_frame_saved_pc);
set_gdbarch_fp0_regnum (gdbarch, SIM_SH64_FR0_REGNUM);
set_gdbarch_pc_regnum (gdbarch, 64);
- /* the number of real registers is the same whether we are in
- ISA16(compact) or ISA32(media). */
+ /* The number of real registers is the same whether we are in
+ ISA16(compact) or ISA32(media). */
set_gdbarch_num_regs (gdbarch, SIM_SH64_NR_REGS);
- set_gdbarch_deprecated_register_size (gdbarch, 8); /*????*/
set_gdbarch_deprecated_register_bytes (gdbarch,
((SIM_SH64_NR_FP_REGS + 1) * 4)
+ (SIM_SH64_NR_REGS - SIM_SH64_NR_FP_REGS -1) * 8);
- set_gdbarch_register_name (gdbarch, sh_sh64_register_name);
- set_gdbarch_deprecated_register_virtual_type (gdbarch, sh_sh64_register_virtual_type);
+ set_gdbarch_register_name (gdbarch, sh64_register_name);
+ set_gdbarch_register_type (gdbarch, sh64_register_type);
set_gdbarch_deprecated_store_return_value (gdbarch, sh64_store_return_value);
- set_gdbarch_deprecated_register_raw_size (gdbarch, sh_sh64_register_raw_size);
- set_gdbarch_deprecated_register_virtual_size (gdbarch, sh_sh64_register_raw_size);
- set_gdbarch_deprecated_register_byte (gdbarch, sh_sh64_register_byte);
- /* This seems awfully wrong!*/
- /*set_gdbarch_deprecated_max_register_raw_size (gdbarch, 8);*/
- /* should include the size of the pseudo regs. */
- set_gdbarch_deprecated_max_register_raw_size (gdbarch, 4 * 4);
- /* Or should that go in the virtual_size? */
- /*set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 8);*/
- set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 4 * 4);
+ set_gdbarch_deprecated_register_byte (gdbarch, sh64_register_byte);
set_gdbarch_pseudo_register_read (gdbarch, sh64_pseudo_register_read);
set_gdbarch_pseudo_register_write (gdbarch, sh64_pseudo_register_write);
set_gdbarch_deprecated_do_registers_info (gdbarch, sh64_do_registers_info);
set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh64_nofp_frame_init_saved_regs);
- set_gdbarch_breakpoint_from_pc (gdbarch, sh_sh64_breakpoint_from_pc);
+ set_gdbarch_breakpoint_from_pc (gdbarch, sh64_breakpoint_from_pc);
set_gdbarch_deprecated_call_dummy_words (gdbarch, sh64_call_dummy_words);
set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (sh64_call_dummy_words));