/* Target-dependent code for Renesas Super-H, for GDB.
- Copyright (C) 1993-2013 Free Software Foundation, Inc.
+ Copyright (C) 1993-2016 Free Software Foundation, Inc.
This file is part of GDB.
#include "value.h"
#include "dis-asm.h"
#include "inferior.h"
-#include <string.h>
-#include "gdb_assert.h"
#include "arch-utils.h"
#include "regcache.h"
#include "osabi.h"
#include "gdb/sim-sh.h"
#include "language.h"
#include "sh64-tdep.h"
+#include <algorithm>
/* Information that is dependent on the processor variant. */
enum sh_abi
if (((elf_symbol_type *)(sym))->internal_elf_sym.st_other == STO_SH5_ISA32)
{
MSYMBOL_TARGET_FLAG_1 (msym) = 1;
- SYMBOL_VALUE_ADDRESS (msym) |= 1;
+ SET_MSYMBOL_VALUE_ADDRESS (msym, MSYMBOL_VALUE_RAW_ADDRESS (msym) | 1);
}
}
/* If after_prologue returned a useful address, then use it. Else
fall back on the instruction skipping code. */
if (post_prologue_pc != 0)
- return max (pc, post_prologue_pc);
+ return std::max (pc, post_prologue_pc);
else
return sh64_skip_prologue_hard_way (gdbarch, pc);
}
int insn;
int r0_val = 0;
int insn_size;
- int gdb_register_number;
- int register_number;
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
cache->sp_offset = 0;
}
else if (IS_MOV_R14 (insn))
- cache->saved_regs[MEDIA_FP_REGNUM] =
- cache->sp_offset - ((((insn & 0xf) ^ 0x8) - 0x8) << 2);
+ {
+ cache->saved_regs[MEDIA_FP_REGNUM] =
+ cache->sp_offset - ((((insn & 0xf) ^ 0x8) - 0x8) << 2);
+ cache->uses_fp = 1;
+ }
else if (IS_MOV_R0 (insn))
{
/* Store R14 at r0_val-4 from SP. Decrement r0 by 4. */
cache->saved_regs[MEDIA_FP_REGNUM] = cache->sp_offset
- (r0_val - 4);
+ cache->uses_fp = 1;
r0_val -= 4;
}
9) << 2);
else if (IS_STQ_R14_R15 (insn))
- cache->saved_regs[MEDIA_FP_REGNUM]
- = cache->sp_offset - (sign_extend ((insn & 0xffc00) >> 10,
- 9) << 3);
+ {
+ cache->saved_regs[MEDIA_FP_REGNUM]
+ = cache->sp_offset - (sign_extend ((insn & 0xffc00) >> 10,
+ 9) << 3);
+ cache->uses_fp = 1;
+ }
else if (IS_STL_R14_R15 (insn))
- cache->saved_regs[MEDIA_FP_REGNUM]
- = cache->sp_offset - (sign_extend ((insn & 0xffc00) >> 10,
- 9) << 2);
+ {
+ cache->saved_regs[MEDIA_FP_REGNUM]
+ = cache->sp_offset - (sign_extend ((insn & 0xffc00) >> 10,
+ 9) << 2);
+ cache->uses_fp = 1;
+ }
else if (IS_MOV_SP_FP_MEDIA (insn))
break;
}
}
-
- if (cache->saved_regs[MEDIA_FP_REGNUM] >= 0)
- cache->uses_fp = 1;
}
static CORE_ADDR
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int stack_offset, stack_alloc;
int int_argreg;
- int float_argreg;
- int double_argreg;
int float_arg_index = 0;
int double_arg_index = 0;
int argnum;
in eight registers available. Loop thru args from first to last. */
int_argreg = ARG0_REGNUM;
- float_argreg = gdbarch_fp0_regnum (gdbarch);
- double_argreg = DR0_REGNUM;
for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
{
TYPE, and copy that, in virtual format, into VALBUF. */
static void
sh64_extract_return_value (struct type *type, struct regcache *regcache,
- void *valbuf)
+ gdb_byte *valbuf)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
- enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int len = TYPE_LENGTH (type);
if (TYPE_CODE (type) == TYPE_CODE_FLT)
unsigned char *raw_buffer;
double flt; /* Double extracted from raw hex data. */
int inv;
- int j;
/* Allocate space for the float. */
raw_buffer = (unsigned char *)
int i;
if (*this_cache)
- return *this_cache;
+ return (struct sh64_frame_cache *) *this_cache;
gdbarch = get_frame_arch (this_frame);
cache = sh64_alloc_frame_cache ();
/* None found, create a new architecture from the information
provided. */
- tdep = XMALLOC (struct gdbarch_tdep);
+ tdep = XNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
/* Determine the ABI */