/* Target-dependent code for SPARC.
- Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008
+ Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
Free Software Foundation, Inc.
This file is part of GDB.
sparc64-tdep.c; don't add any here. */
/* The SPARC Floating-Point Quad-Precision format is similar to
- big-endian IA-64 Quad-recision format. */
+ big-endian IA-64 Quad-Precision format. */
#define floatformats_sparc_quad floatformats_ia64_quad
/* The stack pointer is offset from the stack frame by a BIAS of 2047
More information on StackGuard can be found on in:
- Mike Frantzen and Mike Shuey. "StackGhost: Hardware Facilitated
+ Mike Frantzen and Mike Shuey. "StackGhost: Hardware Facilitated
Stack Protection." 2001. Published in USENIX Security Symposium
'01. */
/* Fetch StackGhost Per-Process XOR cookie. */
ULONGEST
-sparc_fetch_wcookie (void)
+sparc_fetch_wcookie (struct gdbarch *gdbarch)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
struct target_ops *ops = ¤t_target;
gdb_byte buf[8];
int len;
/* We should have either an 32-bit or an 64-bit cookie. */
gdb_assert (len == 4 || len == 8);
- return extract_unsigned_integer (buf, len);
+ return extract_unsigned_integer (buf, len, byte_order);
}
\f
return 0;
}
-/* Check whether TYPE is "Structure or Union". */
+/* Check whether TYPE is "Structure or Union".
+
+ In terms of Ada subprogram calls, arrays are treated the same as
+ struct and union types. So this function also returns non-zero
+ for array types. */
static int
sparc_structure_or_union_p (const struct type *type)
{
case TYPE_CODE_STRUCT:
case TYPE_CODE_UNION:
+ case TYPE_CODE_ARRAY:
return 1;
default:
break;
return NULL;
}
\f
+/* Construct types for ISA-specific registers. */
-/* Type for %psr. */
-struct type *sparc_psr_type;
+static struct type *
+sparc_psr_type (struct gdbarch *gdbarch)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-/* Type for %fsr. */
-struct type *sparc_fsr_type;
+ if (!tdep->sparc_psr_type)
+ {
+ struct type *type;
-/* Construct types for ISA-specific registers. */
+ type = arch_flags_type (gdbarch, "builtin_type_sparc_psr", 4);
+ append_flags_type_flag (type, 5, "ET");
+ append_flags_type_flag (type, 6, "PS");
+ append_flags_type_flag (type, 7, "S");
+ append_flags_type_flag (type, 12, "EF");
+ append_flags_type_flag (type, 13, "EC");
-static void
-sparc_init_types (void)
+ tdep->sparc_psr_type = type;
+ }
+
+ return tdep->sparc_psr_type;
+}
+
+static struct type *
+sparc_fsr_type (struct gdbarch *gdbarch)
{
- struct type *type;
-
- type = init_flags_type ("builtin_type_sparc_psr", 4);
- append_flags_type_flag (type, 5, "ET");
- append_flags_type_flag (type, 6, "PS");
- append_flags_type_flag (type, 7, "S");
- append_flags_type_flag (type, 12, "EF");
- append_flags_type_flag (type, 13, "EC");
- sparc_psr_type = type;
-
- type = init_flags_type ("builtin_type_sparc_fsr", 4);
- append_flags_type_flag (type, 0, "NXA");
- append_flags_type_flag (type, 1, "DZA");
- append_flags_type_flag (type, 2, "UFA");
- append_flags_type_flag (type, 3, "OFA");
- append_flags_type_flag (type, 4, "NVA");
- append_flags_type_flag (type, 5, "NXC");
- append_flags_type_flag (type, 6, "DZC");
- append_flags_type_flag (type, 7, "UFC");
- append_flags_type_flag (type, 8, "OFC");
- append_flags_type_flag (type, 9, "NVC");
- append_flags_type_flag (type, 22, "NS");
- append_flags_type_flag (type, 23, "NXM");
- append_flags_type_flag (type, 24, "DZM");
- append_flags_type_flag (type, 25, "UFM");
- append_flags_type_flag (type, 26, "OFM");
- append_flags_type_flag (type, 27, "NVM");
- sparc_fsr_type = type;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (!tdep->sparc_fsr_type)
+ {
+ struct type *type;
+
+ type = arch_flags_type (gdbarch, "builtin_type_sparc_fsr", 4);
+ append_flags_type_flag (type, 0, "NXA");
+ append_flags_type_flag (type, 1, "DZA");
+ append_flags_type_flag (type, 2, "UFA");
+ append_flags_type_flag (type, 3, "OFA");
+ append_flags_type_flag (type, 4, "NVA");
+ append_flags_type_flag (type, 5, "NXC");
+ append_flags_type_flag (type, 6, "DZC");
+ append_flags_type_flag (type, 7, "UFC");
+ append_flags_type_flag (type, 8, "OFC");
+ append_flags_type_flag (type, 9, "NVC");
+ append_flags_type_flag (type, 22, "NS");
+ append_flags_type_flag (type, 23, "NXM");
+ append_flags_type_flag (type, 24, "DZM");
+ append_flags_type_flag (type, 25, "UFM");
+ append_flags_type_flag (type, 26, "OFM");
+ append_flags_type_flag (type, 27, "NVM");
+
+ tdep->sparc_fsr_type = type;
+ }
+
+ return tdep->sparc_fsr_type;
}
/* Return the GDB type object for the "standard" data type of data in
- register REGNUM. */
+ register REGNUM. */
static struct type *
sparc32_register_type (struct gdbarch *gdbarch, int regnum)
{
if (regnum >= SPARC_F0_REGNUM && regnum <= SPARC_F31_REGNUM)
- return builtin_type_float;
+ return builtin_type (gdbarch)->builtin_float;
if (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM)
- return builtin_type_double;
+ return builtin_type (gdbarch)->builtin_double;
if (regnum == SPARC_SP_REGNUM || regnum == SPARC_FP_REGNUM)
- return builtin_type_void_data_ptr;
+ return builtin_type (gdbarch)->builtin_data_ptr;
if (regnum == SPARC32_PC_REGNUM || regnum == SPARC32_NPC_REGNUM)
- return builtin_type_void_func_ptr;
+ return builtin_type (gdbarch)->builtin_func_ptr;
if (regnum == SPARC32_PSR_REGNUM)
- return sparc_psr_type;
+ return sparc_psr_type (gdbarch);
if (regnum == SPARC32_FSR_REGNUM)
- return sparc_fsr_type;
+ return sparc_fsr_type (gdbarch);
- return builtin_type_int32;
+ return builtin_type (gdbarch)->builtin_int32;
}
-static void
+static enum register_status
sparc32_pseudo_register_read (struct gdbarch *gdbarch,
struct regcache *regcache,
int regnum, gdb_byte *buf)
{
+ enum register_status status;
+
gdb_assert (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM);
regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC32_D0_REGNUM);
- regcache_raw_read (regcache, regnum, buf);
- regcache_raw_read (regcache, regnum + 1, buf + 4);
+ status = regcache_raw_read (regcache, regnum, buf);
+ if (status == REG_VALID)
+ status = regcache_raw_read (regcache, regnum + 1, buf + 4);
+ return status;
}
static void
}
\f
+static CORE_ADDR
+sparc32_frame_align (struct gdbarch *gdbarch, CORE_ADDR address)
+{
+ /* The ABI requires double-word alignment. */
+ return address & ~0x7;
+}
+
static CORE_ADDR
sparc32_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
CORE_ADDR funcaddr,
CORE_ADDR *real_pc, CORE_ADDR *bp_addr,
struct regcache *regcache)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+
*bp_addr = sp - 4;
*real_pc = funcaddr;
- if (using_struct_return (NULL, value_type))
+ if (using_struct_return (gdbarch, NULL, value_type))
{
gdb_byte buf[4];
/* This is an UNIMP instruction. */
- store_unsigned_integer (buf, 4, TYPE_LENGTH (value_type) & 0x1fff);
+ store_unsigned_integer (buf, 4, byte_order,
+ TYPE_LENGTH (value_type) & 0x1fff);
write_memory (sp - 8, buf, 4);
return sp - 8;
}
struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
/* Number of words in the "parameter array". */
int num_elements = 0;
int element = 0;
gdb_assert (sparc_integral_or_pointer_p (type));
if (len < 4)
- args[i] = value_cast (builtin_type_int32, args[i]);
+ args[i] = value_cast (builtin_type (gdbarch)->builtin_int32,
+ args[i]);
num_elements += ((len + 3) / 4);
}
}
{
gdb_byte buf[4];
- store_unsigned_integer (buf, 4, struct_addr);
+ store_unsigned_integer (buf, 4, byte_order, struct_addr);
write_memory (sp, buf, 4);
}
CORE_ADDR pc = start_pc;
unsigned long insn;
int offset_stack_checking_sequence = 0;
+ int probing_loop = 0;
/* With GCC, all stack checking sequences begin with the same two
- instructions. */
+ instructions, plus an optional one in the case of a probing loop:
+
+ sethi <some immediate>, %g1
+ sub %sp, %g1, %g1
+
+ or:
+
+ sethi <some immediate>, %g1
+ sethi <some immediate>, %g4
+ sub %sp, %g1, %g1
+
+ or:
- /* sethi <some immediate>,%g1 */
+ sethi <some immediate>, %g1
+ sub %sp, %g1, %g1
+ sethi <some immediate>, %g4
+
+ If the optional instruction is found (setting g4), assume that a
+ probing loop will follow. */
+
+ /* sethi <some immediate>, %g1 */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
if (!(X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 1))
return start_pc;
- /* sub %sp, %g1, %g1 */
+ /* optional: sethi <some immediate>, %g4 */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
+ if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
+ {
+ probing_loop = 1;
+ insn = sparc_fetch_instruction (pc);
+ pc = pc + 4;
+ }
+
+ /* sub %sp, %g1, %g1 */
if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn)
&& X_RD (insn) == 1 && X_RS1 (insn) == 14 && X_RS2 (insn) == 1))
return start_pc;
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
+ /* optional: sethi <some immediate>, %g4 */
+ if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
+ {
+ probing_loop = 1;
+ insn = sparc_fetch_instruction (pc);
+ pc = pc + 4;
+ }
+
/* First possible sequence:
[first two instructions above]
clr [%g1 - some immediate] */
}
/* Third sequence: A probing loop.
- [first two instructions above]
- sethi <some immediate>, %g4
+ [first three instructions above]
sub %g1, %g4, %g4
cmp %g1, %g4
be <disp>
add %g1, -<some immediate>, %g1
ba <disp>
clr [%g1]
+
+ And an optional last probe for the remainder:
+
clr [%g4 - some immediate] */
- /* sethi <some immediate>, %g4 */
- else if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
+ if (probing_loop)
{
/* sub %g1, %g4, %g4 */
- insn = sparc_fetch_instruction (pc);
- pc = pc + 4;
if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn)
&& X_RD (insn) == 4 && X_RS1 (insn) == 1 && X_RS2 (insn) == 4))
return start_pc;
if (!(X_OP (insn) == 0 && X_COND (insn) == 0x8))
return start_pc;
- /* clr [%g1] */
+ /* clr [%g1] (st %g0, [%g1] or st %g0, [%g1+0]) */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
- if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && !X_I(insn)
- && X_RD (insn) == 0 && X_RS1 (insn) == 1))
+ if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4
+ && X_RD (insn) == 0 && X_RS1 (insn) == 1
+ && (!X_I(insn) || X_SIMM13 (insn) == 0)))
return start_pc;
- /* clr [%g4 - some immediate] */
+ /* We found a valid stack-check sequence, return the new PC. */
+
+ /* optional: clr [%g4 - some immediate] */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && X_I(insn)
&& X_RS1 (insn) == 4 && X_RD (insn) == 0))
- return start_pc;
-
- /* We found a valid stack-check sequence, return the new PC. */
- return pc;
+ return pc - 4;
+ else
+ return pc;
}
/* No stack check code in our prologue, return the start_pc. */
sparc32_frame_prev_register (struct frame_info *this_frame,
void **this_cache, int regnum)
{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct sparc_frame_cache *cache =
sparc32_frame_cache (this_frame, this_cache);
/* Handle StackGhost. */
{
- ULONGEST wcookie = sparc_fetch_wcookie ();
+ ULONGEST wcookie = sparc_fetch_wcookie (gdbarch);
if (wcookie != 0 && !cache->frameless_p && regnum == SPARC_I7_REGNUM)
{
static const struct frame_unwind sparc32_frame_unwind =
{
NORMAL_FRAME,
+ default_frame_unwind_stop_reason,
sparc32_frame_this_id,
sparc32_frame_prev_register,
NULL,
}
\f
-/* Extract from an array REGBUF containing the (raw) register state, a
- function return value of TYPE, and copy that into VALBUF. */
+/* Extract a function return value of TYPE from REGCACHE, and copy
+ that into VALBUF. */
static void
sparc32_extract_return_value (struct type *type, struct regcache *regcache,
}
}
-/* Write into the appropriate registers a function return value stored
- in VALBUF of type TYPE. */
+/* Store the function return value of type TYPE from VALBUF into
+ REGCACHE. */
static void
sparc32_store_return_value (struct type *type, struct regcache *regcache,
gdb_assert (!sparc_structure_or_union_p (type));
gdb_assert (!(sparc_floating_p (type) && len == 16));
+ gdb_assert (len <= 8);
if (sparc_floating_p (type))
{
struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+
/* The psABI says that "...every stack frame reserves the word at
%fp+64. If a function returns a structure, union, or
quad-precision value, this word should hold the address of the
CORE_ADDR addr;
regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
- addr = read_memory_unsigned_integer (sp + 64, 4);
+ addr = read_memory_unsigned_integer (sp + 64, 4, byte_order);
read_memory (addr, readbuf, TYPE_LENGTH (type));
}
{
struct gdbarch *arch = get_frame_arch (frame);
struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
+ struct address_space *aspace = get_frame_address_space (frame);
CORE_ADDR npc, nnpc;
CORE_ADDR pc, orig_npc;
/* Analyze the instruction at PC. */
nnpc = sparc_analyze_control_transfer (frame, pc, &npc);
if (npc != 0)
- insert_single_step_breakpoint (npc);
+ insert_single_step_breakpoint (arch, aspace, npc);
if (nnpc != 0)
- insert_single_step_breakpoint (nnpc);
+ insert_single_step_breakpoint (arch, aspace, nnpc);
/* Assert that we have set at least one breakpoint, and that
they're not set at the same spot - unless we're going
/* Return the appropriate register set for the core section identified
by SECT_NAME and SECT_SIZE. */
-const struct regset *
+static const struct regset *
sparc_regset_from_core_section (struct gdbarch *gdbarch,
const char *sect_name, size_t sect_size)
{
return arches->gdbarch;
/* Allocate space for the new architecture. */
- tdep = XMALLOC (struct gdbarch_tdep);
+ tdep = XZALLOC (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
tdep->pc_regnum = SPARC32_PC_REGNUM;
tdep->npc_regnum = SPARC32_NPC_REGNUM;
- tdep->gregset = NULL;
- tdep->sizeof_gregset = 0;
- tdep->fpregset = NULL;
- tdep->sizeof_fpregset = 0;
- tdep->plt_entry_size = 0;
tdep->step_trap = sparc_step_trap;
set_gdbarch_long_double_bit (gdbarch, 128);
set_gdbarch_fp0_regnum (gdbarch, SPARC_F0_REGNUM); /* %f0 */
/* Call dummy code. */
+ set_gdbarch_frame_align (gdbarch, sparc32_frame_align);
set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
set_gdbarch_push_dummy_code (gdbarch, sparc32_push_dummy_code);
set_gdbarch_push_dummy_call (gdbarch, sparc32_push_dummy_call);
void
sparc_supply_rwindow (struct regcache *regcache, CORE_ADDR sp, int regnum)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int offset = 0;
gdb_byte buf[8];
int i;
/* Handle StackGhost. */
if (i == SPARC_I7_REGNUM)
{
- ULONGEST wcookie = sparc_fetch_wcookie ();
- ULONGEST i7 = extract_unsigned_integer (buf + offset, 8);
+ ULONGEST wcookie = sparc_fetch_wcookie (gdbarch);
+ ULONGEST i7;
- store_unsigned_integer (buf + offset, 8, i7 ^ wcookie);
+ i7 = extract_unsigned_integer (buf + offset, 8, byte_order);
+ store_unsigned_integer (buf + offset, 8, byte_order,
+ i7 ^ wcookie);
}
regcache_raw_supply (regcache, i, buf);
/* Handle StackGhost. */
if (i == SPARC_I7_REGNUM)
{
- ULONGEST wcookie = sparc_fetch_wcookie ();
- ULONGEST i7 = extract_unsigned_integer (buf + offset, 4);
+ ULONGEST wcookie = sparc_fetch_wcookie (gdbarch);
+ ULONGEST i7;
- store_unsigned_integer (buf + offset, 4, i7 ^ wcookie);
+ i7 = extract_unsigned_integer (buf + offset, 4, byte_order);
+ store_unsigned_integer (buf + offset, 4, byte_order,
+ i7 ^ wcookie);
}
regcache_raw_supply (regcache, i, buf);
sparc_collect_rwindow (const struct regcache *regcache,
CORE_ADDR sp, int regnum)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int offset = 0;
gdb_byte buf[8];
int i;
/* Handle StackGhost. */
if (i == SPARC_I7_REGNUM)
{
- ULONGEST wcookie = sparc_fetch_wcookie ();
- ULONGEST i7 = extract_unsigned_integer (buf + offset, 8);
+ ULONGEST wcookie = sparc_fetch_wcookie (gdbarch);
+ ULONGEST i7;
- store_unsigned_integer (buf, 8, i7 ^ wcookie);
+ i7 = extract_unsigned_integer (buf + offset, 8, byte_order);
+ store_unsigned_integer (buf, 8, byte_order, i7 ^ wcookie);
}
target_write_memory (sp + ((i - SPARC_L0_REGNUM) * 8), buf, 8);
/* Handle StackGhost. */
if (i == SPARC_I7_REGNUM)
{
- ULONGEST wcookie = sparc_fetch_wcookie ();
- ULONGEST i7 = extract_unsigned_integer (buf + offset, 4);
+ ULONGEST wcookie = sparc_fetch_wcookie (gdbarch);
+ ULONGEST i7;
- store_unsigned_integer (buf + offset, 4, i7 ^ wcookie);
+ i7 = extract_unsigned_integer (buf + offset, 4, byte_order);
+ store_unsigned_integer (buf + offset, 4, byte_order,
+ i7 ^ wcookie);
}
target_write_memory (sp + ((i - SPARC_L0_REGNUM) * 4),
int regnum, const void *gregs)
{
const gdb_byte *regs = gregs;
+ gdb_byte zero[4] = { 0 };
int i;
if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
regs + gregset->r_y_offset);
if (regnum == SPARC_G0_REGNUM || regnum == -1)
- regcache_raw_supply (regcache, SPARC_G0_REGNUM, NULL);
+ regcache_raw_supply (regcache, SPARC_G0_REGNUM, &zero);
if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
{
_initialize_sparc_tdep (void)
{
register_gdbarch_init (bfd_arch_sparc, sparc32_gdbarch_init);
-
- /* Initialize the SPARC-specific register types. */
- sparc_init_types();
}
projects / deliverable / binutils-gdb.git / blobdiff