/* Target-dependent code for SPARC.
- Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
Free Software Foundation, Inc.
This file is part of GDB.
sparc64-tdep.c; don't add any here. */
/* The SPARC Floating-Point Quad-Precision format is similar to
- big-endian IA-64 Quad-recision format. */
+ big-endian IA-64 Quad-Precision format. */
#define floatformats_sparc_quad floatformats_ia64_quad
/* The stack pointer is offset from the stack frame by a BIAS of 2047
More information on StackGuard can be found on in:
- Mike Frantzen and Mike Shuey. "StackGhost: Hardware Facilitated
+ Mike Frantzen and Mike Shuey. "StackGhost: Hardware Facilitated
Stack Protection." 2001. Published in USENIX Security Symposium
'01. */
return 0;
}
-/* Check whether TYPE is "Structure or Union". */
+/* Check whether TYPE is "Structure or Union".
+
+ In terms of Ada subprogram calls, arrays are treated the same as
+ struct and union types. So this function also returns non-zero
+ for array types. */
static int
sparc_structure_or_union_p (const struct type *type)
{
case TYPE_CODE_STRUCT:
case TYPE_CODE_UNION:
+ case TYPE_CODE_ARRAY:
return 1;
default:
break;
}
/* Return the GDB type object for the "standard" data type of data in
- register REGNUM. */
+ register REGNUM. */
static struct type *
sparc32_register_type (struct gdbarch *gdbarch, int regnum)
}
\f
+static CORE_ADDR
+sparc32_frame_align (struct gdbarch *gdbarch, CORE_ADDR address)
+{
+ /* The ABI requires double-word alignment. */
+ return address & ~0x7;
+}
+
static CORE_ADDR
sparc32_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
CORE_ADDR funcaddr,
gdb_assert (!sparc_structure_or_union_p (type));
gdb_assert (!(sparc_floating_p (type) && len == 16));
+ gdb_assert (len <= 8);
if (sparc_floating_p (type))
{
{
struct gdbarch *arch = get_frame_arch (frame);
struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
+ struct address_space *aspace = get_frame_address_space (frame);
CORE_ADDR npc, nnpc;
CORE_ADDR pc, orig_npc;
/* Analyze the instruction at PC. */
nnpc = sparc_analyze_control_transfer (frame, pc, &npc);
if (npc != 0)
- insert_single_step_breakpoint (arch, npc);
+ insert_single_step_breakpoint (arch, aspace, npc);
if (nnpc != 0)
- insert_single_step_breakpoint (arch, nnpc);
+ insert_single_step_breakpoint (arch, aspace, nnpc);
/* Assert that we have set at least one breakpoint, and that
they're not set at the same spot - unless we're going
return arches->gdbarch;
/* Allocate space for the new architecture. */
- tdep = XMALLOC (struct gdbarch_tdep);
+ tdep = XZALLOC (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
tdep->pc_regnum = SPARC32_PC_REGNUM;
tdep->npc_regnum = SPARC32_NPC_REGNUM;
- tdep->gregset = NULL;
- tdep->sizeof_gregset = 0;
- tdep->fpregset = NULL;
- tdep->sizeof_fpregset = 0;
- tdep->plt_entry_size = 0;
tdep->step_trap = sparc_step_trap;
set_gdbarch_long_double_bit (gdbarch, 128);
set_gdbarch_fp0_regnum (gdbarch, SPARC_F0_REGNUM); /* %f0 */
/* Call dummy code. */
+ set_gdbarch_frame_align (gdbarch, sparc32_frame_align);
set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
set_gdbarch_push_dummy_code (gdbarch, sparc32_push_dummy_code);
set_gdbarch_push_dummy_call (gdbarch, sparc32_push_dummy_call);