This file is part of GDB.
-GDB is free software; you can redistribute it and/or modify
+This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 1, or (at your option)
-any later version.
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
-GDB is distributed in the hope that it will be useful,
+This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GDB; see the file COPYING. If not, write to
-the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* Parameters for an EB29K (a board which plugs into a PC and is
accessed through EBMON software running on the PC, which we
/* Floating point uses IEEE representations. */
#define IEEE_FLOAT
-/* We can either use a.out, encapsulated, or can use COFF */
-#ifndef COFF_ENCAPSULATE
-#define COFF_FORMAT
-/* This just has to do with what coff header files are in use. */
-#define COFF_CHECK_X_ZEROES
-#endif
-
/* Recognize our magic number. */
-#define BADMAG(x) ((x)->f_magic != 0572)
+#define BADMAG(x) ((x).f_magic != 0572)
/* Define this if the C compiler puts an underscore at the front
of external names before giving them to the linker. */
/* Sequence of bytes for breakpoint instruction. */
/* ASNEQ 0x50, gr1, gr1
- The trap number 0x50 is chosen arbitrarily. */
+ The trap number 0x50 is chosen arbitrarily.
+ We let the command line (or previously included files) override this
+ setting. */
+#ifndef BREAKPOINT
#if TARGET_BYTE_ORDER == BIG_ENDIAN
#define BREAKPOINT {0x72, 0x50, 0x01, 0x01}
#else /* Target is little-endian. */
#define BREAKPOINT {0x01, 0x01, 0x50, 0x72}
#endif /* Target is little-endian. */
+#endif /* BREAKPOINT */
/* Amount PC must be decremented by after a breakpoint.
This is often the number of bytes in BREAKPOINT
but not always. */
-#define DECR_PC_AFTER_BREAK 4
+#define DECR_PC_AFTER_BREAK 0
/* Nonzero if instruction at PC is a return instruction.
On the 29k, this is a "jmpi l0" instruction. */
#define REGISTER_TYPE long
+/* Allow the register declarations here to be overridden for remote
+ kernel debugging. */
+#if !defined (REGISTER_NAMES)
+
/* Number of machine registers */
#define NUM_REGS 205
"AI10", "AI11", "AI12", "AI13", "AI14", "AI15", "FP", \
"bp", "fc", "cr", "q", \
"vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", \
- "pc0", "pc1", "pc2", "mmu", "lru", "fpe", "int", "fps", "exo", "gr1", \
+ "pc0", "pc1", "pc2", "mmu", "lru", "fpe", "inte", "fps", "exo", "gr1", \
"alu", "ipc", "ipa", "ipb" }
-/* Special register #x. */
+/*
+ * Converts an sdb register number to an internal gdb register number.
+ * Currently under epi, gr96->0...gr127->31...lr0->32...lr127->159, or...
+ * gr64->0...gr95->31, lr0->32...lr127->159.
+ */
+#define SDB_REG_TO_REGNUM(value) \
+ (((value) >= 96 && (value) <= 127) ? ((value) - 96) : \
+ ((value) >= 128 && (value) <= 255) ? ((value) - 128 + LR0_REGNUM) : \
+ (value))
+
+/*
+ * Provide the processor register numbers of some registers that are
+ * expected/written in instructions that might change under different
+ * register sets. Namely, gcc can compile (-mkernel-registers) so that
+ * it uses gr64-gr95 in stead of gr96-gr127.
+ */
+#define MSP_HW_REGNUM 125 /* gr125 */
+#define RAB_HW_REGNUM 126 /* gr126 */
+
+/* Convert Processor Special register #x to REGISTER_NAMES register # */
#define SR_REGNUM(x) \
((x) < 15 ? VAB_REGNUM + (x) \
- : (x) >= 128 && (x) < 131 ? IPC_REGNUM + (x) \
+ : (x) >= 128 && (x) < 131 ? IPC_REGNUM + (x) - 128 \
: (x) == 131 ? Q_REGNUM \
: (x) == 132 ? ALU_REGNUM \
- : (x) >= 133 && (x) < 136 ? BP_REGNUM + (x) \
- : (x) >= 160 && (x) < 163 ? FPE_REGNUM + (x) \
+ : (x) >= 133 && (x) < 136 ? BP_REGNUM + (x) - 133 \
+ : (x) >= 160 && (x) < 163 ? FPE_REGNUM + (x) - 160 \
: (x) == 164 ? EXO_REGNUM \
: (error ("Internal error in SR_REGNUM"), 0))
#define GR96_REGNUM 0
+/* Define the return register separately, so it can be overridden for
+ kernel procedure calling conventions. */
+#define RETURN_REGNUM GR96_REGNUM
#define GR1_REGNUM 200
/* This needs to be the memory stack pointer, not the register stack pointer,
to make call_function work right. */
/* Register Stack Pointer. */
#define RSP_REGNUM GR1_REGNUM
#define LR0_REGNUM 32
-#define PC_REGNUM 192 /* pc1 */
-#define NPC_REGNUM 191 /* pc0 */
-#define PC2_REGNUM 193
#define BP_REGNUM 177
#define FC_REGNUM 178
#define CR_REGNUM 179
#define Q_REGNUM 180
#define VAB_REGNUM 181
-#define LRU_REGNUM 195
-#define FPE_REGNUM 196
-#define INT_REGNUM 197
-#define FPS_REGNUM 198
-#define EXO_REGNUM 199
-#define PS_REGNUM 201
-#define ALU_REGNUM 201
-#define IPC_REGNUM 202
-#define IPB_REGNUM 204
+#define OPS_REGNUM (VAB_REGNUM + 1)
+#define CPS_REGNUM (VAB_REGNUM + 2)
+#define CFG_REGNUM (VAB_REGNUM + 3)
+#define CHA_REGNUM (VAB_REGNUM + 4)
+#define CHD_REGNUM (VAB_REGNUM + 5)
+#define CHC_REGNUM (VAB_REGNUM + 6)
+#define RBP_REGNUM (VAB_REGNUM + 7)
+#define TMC_REGNUM (VAB_REGNUM + 8)
+#define TMR_REGNUM (VAB_REGNUM + 9)
+#define NPC_REGNUM (VAB_REGNUM + 10) /* pc0 */
+#define PC_REGNUM (VAB_REGNUM + 11) /* pc1 */
+#define PC2_REGNUM (VAB_REGNUM + 12)
+#define MMU_REGNUM (VAB_REGNUM + 13)
+#define LRU_REGNUM (VAB_REGNUM + 14)
+#define FPE_REGNUM (VAB_REGNUM + 15)
+#define INTE_REGNUM (VAB_REGNUM + 16)
+#define FPS_REGNUM (VAB_REGNUM + 17)
+#define EXO_REGNUM (VAB_REGNUM + 18)
+/* gr1 is defined above as 200 = VAB_REGNUM + 19 */
+#define ALU_REGNUM (VAB_REGNUM + 20)
+#define PS_REGNUM ALU_REGNUM
+#define IPC_REGNUM (VAB_REGNUM + 21)
+#define IPA_REGNUM (VAB_REGNUM + 22)
+#define IPB_REGNUM (VAB_REGNUM + 23)
+
+#endif /* !defined(REGISTER_NAMES) */
/* Total amount of space needed to store our copies of the machine's
register state, the array `registers'. */
read_memory (*((int *)(REGBUF) + LRP_REGNUM), (VALBUF) + 16 * 4, \
TYPE_LENGTH (TYPE) - 16 * 4); \
} \
- bcopy (((int *)(REGBUF))+GR96_REGNUM, (VALBUF), reg_length); \
+ bcopy (((int *)(REGBUF))+RETURN_REGNUM, (VALBUF), reg_length); \
}
/* Write into appropriate registers a function return value
(char *)(VALBUF) + 16 * 4, \
TYPE_LENGTH (TYPE) - 16 * 4); \
} \
- write_register_bytes (REGISTER_BYTE (GR96_REGNUM), (char *)(VALBUF), \
+ write_register_bytes (REGISTER_BYTE (RETURN_REGNUM), (char *)(VALBUF), \
TYPE_LENGTH (TYPE)); \
}
\f
macros, it doesn't really matter exactly how we
do it. However, note that FRAME_FP is used in two ways in GDB:
(1) as a "magic cookie" which uniquely identifies frames (even over
- calls to the inferior), (2) (in PC_IN_CALL_DUMMY [!CANNOT_EXECUTE_STACK])
+ calls to the inferior), (2) (in PC_IN_CALL_DUMMY [ON_STACK])
as the value of SP_REGNUM before the dummy frame was pushed. These
- two meanings would be incompatible for the 29k if we didn't define
- CANNOT_EXECUTE_STACK (but we do, so don't worry about it).
+ two meanings would be incompatible for the 29k if we defined
+ CALL_DUMMY_LOCATION == ON_STACK (but we don't, so don't worry about it).
Also note that "lr1" below, while called a frame pointer
in the user's guide, has only one function: To determine whether
registers need to be filled in the function epilogue.
#define EXTRA_FRAME_INFO \
CORE_ADDR saved_msp; \
unsigned int rsize; \
- unsigned int msize;
+ unsigned int msize; \
+ unsigned char flags;
+
+/* Bits for flags in EXTRA_FRAME_INFO */
+#define TRANSPARENT 0x1 /* This is a transparent frame */
+#define MFP_USED 0x2 /* A memory frame pointer is used */
/* Because INIT_FRAME_PC gets passed fromleaf, that's where we init
not only ->pc and ->frame, but all the extra stuff, when called from
get_prev_frame_info, that is. */
-#define INIT_EXTRA_FRAME_INFO(fci) \
- init_extra_frame_info(fci);
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) init_extra_frame_info(fci)
void init_extra_frame_info ();
-#define INIT_FRAME_PC(fromleaf, fci) \
- init_frame_pc(fromleaf, fci);
+
+#define INIT_FRAME_PC(fromleaf, fci) init_frame_pc(fromleaf, fci)
void init_frame_pc ();
+
\f
/* FRAME_CHAIN takes a FRAME
and produces the frame's chain-pointer.
- FRAME_CHAIN_COMBINE takes the chain pointer and the frame's nominal address
- and produces the nominal address of the caller frame.
-
However, if FRAME_CHAIN_VALID returns zero,
- it means the given frame is the outermost one and has no caller.
- In that case, FRAME_CHAIN_COMBINE is not used. */
+ it means the given frame is the outermost one and has no caller. */
/* On the 29k, the nominal address of a frame is the address on the
register stack of the return address (the one next to the incoming
/* These are mostly dummies for the 29k because INIT_FRAME_PC
sets prev->frame instead. */
-#define FRAME_CHAIN(thisframe) (0)
+#define FRAME_CHAIN(thisframe) ((thisframe)->frame + (thisframe)->rsize)
-/* Not sure how to figure out where the bottom frame is. There is
- no frame for start. In my tests so far the
- pc has been outside the text segment, though, so check for that.
- However, allow a pc in a call dummy. */
-#define FRAME_CHAIN_VALID(chain, thisframe) \
- (outside_startup_file (FRAME_SAVED_PC (thisframe)) \
- && FRAME_SAVED_PC (thisframe) >= text_start \
- && FRAME_SAVED_PC (thisframe) < text_end + CALL_DUMMY_LENGTH)
+/* Determine if the frame has a 'previous' and back-traceable frame. */
+#define FRAME_IS_UNCHAINED(frame) ((frame)->flags & TRANSPARENT)
-#define FRAME_CHAIN_COMBINE(chain, thisframe) (0)
+/* Find the previous frame of a transparent routine.
+ * For now lets not try and trace through a transparent routine (we might
+ * have to assume that all transparent routines are traps).
+ */
+#define FIND_PREV_UNCHAINED_FRAME(frame) 0
/* Define other aspects of the stack frame. */
| | We must not disturb
| args_out_sproc | it.
memory stack |________________|
- |____lr1_sproc___|
- | | |__retaddr_sproc_| <- gr1 (at start)
- |____________|<-msp 0 <-----------mfp_dummy_____|
- | | (at start) | |
- | arg_slop | | saved regs |
- | (16 words) | | gr96-gr124 |
- |____________|<-msp 1--after | sr128-sr135 |
- | | PUSH_DUMMY_FRAME| |
- | struct ret | |________________|
- | 17+ | | |
- |____________|<- lrp | args_out_dummy |
- | struct ret | | (16 words) |
- | 16 | |________________|
- | (16 words) | |____lr1_dummy___|
+ |____lr1_sproc___|<-+
+ | | |__retaddr_sproc_| | <-- gr1 (at start)
+ |____________|<-msp 0 <-----------mfp_dummy_____| |
+ | | (at start) | save regs | |
+ | arg_slop | | pc0,pc1 | |
+ | (16 words) | | gr96-gr124 | |
+ |____________|<-msp 1--after | sr160-sr162 | |
+ | | PUSH_DUMMY_FRAME| sr128-sr135 | |
+ | struct ret | |________________| |
+ | 17+ | | | |
+ |____________|<- lrp | args_out_dummy | |
+ | struct ret | | (16 words) | |
+ | 16 | |________________| |
+ | (16 words) | |____lr1_dummy___|--+
|____________|<- msp 2--after |_retaddr_dummy__|<- gr1 after
| | struct ret | | PUSH_DUMMY_FRAME
| margs17+ | area allocated | locals_inf |
/* Number of special registers (sr128-) to save. */
#define DUMMY_SAVE_SR128 8
-/* Number of general (gr96-) registers to save. */
-#define DUMMY_SAVE_GR96 29
+/* Number of special registers (sr160-) to save. */
+#define DUMMY_SAVE_SR160 3
+/* Number of general (gr96- or gr64-) registers to save. */
+#define DUMMY_SAVE_GREGS 29
#define DUMMY_FRAME_RSIZE \
-(4 /* mfp_dummy */ \
- + DUMMY_SAVE_GR96 * 4 \
- + DUMMY_SAVE_SR128 * 4 \
- + DUMMY_ARG \
+(4 /* mfp_dummy */ \
+ + 2 * 4 /* pc0, pc1 */ \
+ + DUMMY_SAVE_GREGS * 4 \
+ + DUMMY_SAVE_SR160 * 4 \
+ + DUMMY_SAVE_SR128 * 4 \
+ + DUMMY_ARG \
)
/* Push an empty stack frame, to record the current PC, etc. */
-#define PUSH_DUMMY_FRAME push_dummy_frame();
+#define PUSH_DUMMY_FRAME push_dummy_frame()
extern void push_dummy_frame ();
/* Discard from the stack the innermost frame,
restoring all saved registers. */
-#define POP_FRAME pop_frame ();
+#define POP_FRAME pop_frame()
extern void pop_frame ();
/* This sequence of words is the instructions
mtsrim cr, 15
loadm 0, 0, lr2, msp ; load first 16 words of arguments into registers
add msp, msp, 16 * 4 ; point to the remaining arguments
- CONST_INSN:
- const gr96,inf
- consth gr96,inf
- calli lr0, gr96
+ CONST_INSN:
+ const lr0,inf ; (replaced by half of target addr)
+ consth lr0,inf ; (replaced by other half of target addr)
+ calli lr0, lr0
aseq 0x40,gr1,gr1 ; nop
- asneq 0x50,gr1,gr1 ; breakpoint
+ BREAKPT_INSN:
+ asneq 0x50,gr1,gr1 ; breakpoint (replaced by local breakpoint insn)
*/
-/* Position of the "const" instruction within CALL_DUMMY in bytes. */
-#define CONST_INSN (3 * 4)
#if TARGET_BYTE_ORDER == HOST_BYTE_ORDER
-#define CALL_DUMMY {0x0400870f, 0x3600827d, 0x157d7d40, 0x03ff60ff, \
- 0x02ff60ff, 0xc8008060, 0x70400101, 0x72500101}
-#else /* Byte order differs. */
- you lose
-#endif /* Byte order differs. */
+#define BS(const) const
+#else
+#define BS(const) (((const) & 0xff) << 24) | \
+ (((const) & 0xff00) << 8) | \
+ (((const) & 0xff0000) >> 8) | \
+ (((const) & 0xff000000) >> 24)
+#endif
+
+/* Position of the "const" and blkt instructions within CALL_DUMMY in bytes. */
+#define CONST_INSN (3 * 4)
+#define BREAKPT_INSN (7 * 4)
+#define CALL_DUMMY { \
+ BS(0x0400870f),\
+ BS(0x36008200|(MSP_HW_REGNUM)), \
+ BS(0x15000040|(MSP_HW_REGNUM<<8)|(MSP_HW_REGNUM<<16)), \
+ BS(0x03ff80ff), \
+ BS(0x02ff80ff), \
+ BS(0xc8008080), \
+ BS(0x70400101), \
+ BS(0x72500101)}
#define CALL_DUMMY_LENGTH (8 * 4)
#define CALL_DUMMY_START_OFFSET 0 /* Start execution at beginning of dummy */
into a call sequence of the above form stored at DUMMYNAME. */
/* Currently this stuffs in the address of the function that we are calling.
- If different 29k systems use different breakpoint instructions, it
- could also stuff BREAKPOINT in the right place (to avoid having to
+ Since different 29k systems use different breakpoint instructions, it
+ also stuffs BREAKPOINT in the right place (to avoid having to
duplicate CALL_DUMMY in each tm-*.h file). */
#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
{\
- STUFF_I16((char *)dummyname + CONST_INSN, fun);\
- STUFF_I16((char *)dummyname + CONST_INSN + 4, fun >> 16);\
+ STUFF_I16((char *)dummyname + CONST_INSN, fun); \
+ STUFF_I16((char *)dummyname + CONST_INSN + 4, fun >> 16); \
+ /* FIXME memcpy ((char *)(dummyname) + BREAKPT_INSN, break_insn, 4); */ \
}
-/* At least our 29k board has separate data & instruction memories and can't
- execute the data memory. Also, there should be space after text_end;
+/* 29k architecture has separate data & instruction memories -- wired to
+ different pins on the chip -- and can't execute the data memory.
+ Also, there should be space after text_end;
we won't get a SIGSEGV or scribble on data space. */
#define CALL_DUMMY_LOCATION AFTER_TEXT_END
+/* Because of this, we need (as a kludge) to know the addresses of the
+ text section. */
+
+#define NEED_TEXT_START_END
+
/* How to translate register numbers in the .stab's into gdb's internal register
numbers. We don't translate them, but we warn if an invalid register
number is seen. Note that FIXME, we use the value "sym" as an implicit