Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#define DEBUG
-#include <stdio.h>
#include "defs.h"
#include "frame.h"
#include "inferior.h"
supply_register (regno, &val);
} else {
errno = 0;
- val = ptrace (PT_READ_U, inferior_pid, (int*)register_addr(regno,0), 0);
+ val = ptrace (PT_READ_U, inferior_pid,
+ (PTRACE_ARG3_TYPE) register_addr(regno,0), 0);
if (errno != 0) {
sprintf(buf,"reading register %s (#%d)",reg_names[regno],regno);
perror_with_name (buf);
/* Global Registers */
#ifdef ULTRA3
errno = 0;
- ptrace (PT_READ_STRUCT, inferior_pid, (int*)register_addr(GR96_REGNUM,0),
- (int)&pt_struct.pt_gr[0], 32*4);
+ ptrace (PT_READ_STRUCT, inferior_pid,
+ (PTRACE_ARG3_TYPE) register_addr(GR96_REGNUM,0),
+ (int)&pt_struct.pt_gr[0], 32*4);
if (errno != 0) {
perror_with_name ("reading global registers");
ret_val = -1;
/* Local Registers */
#ifdef ULTRA3
errno = 0;
- ptrace (PT_READ_STRUCT, inferior_pid, (int*)register_addr(LR0_REGNUM,0),
- (int)&pt_struct.pt_lr[0], 128*4);
+ ptrace (PT_READ_STRUCT, inferior_pid,
+ (PTRACE_ARG3_TYPE) register_addr(LR0_REGNUM,0),
+ (int)&pt_struct.pt_lr[0], 128*4);
if (errno != 0) {
perror_with_name ("reading local registers");
ret_val = -1;
* NOTE: Assumes AMD's binary compatibility standard.
*/
-int
+void
store_inferior_registers (regno)
int regno;
{
if (regno >= 0)
{
if (CANNOT_STORE_REGISTER(regno))
- return 0; /* Pretend success */
+ return;
regaddr = register_addr (regno, 0);
errno = 0;
- ptrace (PT_WRITE_U, inferior_pid,(int*)regaddr,read_register(regno));
+ ptrace (PT_WRITE_U, inferior_pid,
+ (PTRACE_ARG3_TYPE) regaddr, read_register(regno));
if (errno != 0)
{
sprintf (buf, "writing register %s (#%d)", reg_names[regno],regno);
for (regno = LR0_REGNUM; regno < LR0_REGNUM+128; regno++)
pt_struct.pt_gr[regno] = read_register(regno);
errno = 0;
- ptrace (PT_WRITE_STRUCT, inferior_pid, (int*)register_addr(GR1_REGNUM,0),
- (int)&pt_struct.pt_gr1,(1*32*128)*4);
+ ptrace (PT_WRITE_STRUCT, inferior_pid,
+ (PTRACE_ARG3_TYPE) register_addr(GR1_REGNUM,0),
+ (int)&pt_struct.pt_gr1,(1*32*128)*4);
if (errno != 0)
{
sprintf (buf, "writing all local/global registers");
pt_struct.pt_bp = read_register(BP_REGNUM);
pt_struct.pt_fc = read_register(FC_REGNUM);
errno = 0;
- ptrace (PT_WRITE_STRUCT, inferior_pid, (int*)register_addr(CPS_REGNUM,0),
- (int)&pt_struct.pt_psr,(10)*4);
+ ptrace (PT_WRITE_STRUCT, inferior_pid,
+ (PTRACE_ARG3_TYPE) register_addr(CPS_REGNUM,0),
+ (int)&pt_struct.pt_psr,(10)*4);
if (errno != 0)
{
sprintf (buf, "writing all special registers");
perror_with_name (buf);
- return -1;
+ return;
}
#else
store_inferior_registers(GR1_REGNUM);
store_inferior_registers(FC_REGNUM);
#endif /* ULTRA3 */
}
- return 0;
}
/*
* Read AMD's Binary Compatibilty Standard conforming core file.
* struct ptrace_user is the first thing in the core file
*/
+
void
fetch_core_registers ()
{