/* Target-dependent code for the NEC V850 for GDB, the GNU debugger.
- Copyright (C) 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007,
- 2008, 2009 Free Software Foundation, Inc.
+ Copyright (C) 1996, 1998-2005, 2007-2012 Free Software Foundation,
+ Inc.
This file is part of GDB.
E_R63_REGNUM,
E_R64_REGNUM, E_PC_REGNUM = E_R64_REGNUM,
E_R65_REGNUM,
+ E_NUM_OF_V850_REGS,
+ E_NUM_OF_V850E_REGS = E_NUM_OF_V850_REGS,
+
+ /* mpu0 system registers */
+ E_R66_REGNUM = E_NUM_OF_V850_REGS,
+ E_R67_REGNUM,
+ E_R68_REGNUM,
+ E_R69_REGNUM,
+ E_R70_REGNUM,
+ E_R71_REGNUM,
+ E_R72_REGNUM,
+ E_R73_REGNUM,
+ E_R74_REGNUM,
+ E_R75_REGNUM,
+ E_R76_REGNUM,
+ E_R77_REGNUM,
+ E_R78_REGNUM,
+ E_R79_REGNUM,
+ E_R80_REGNUM,
+ E_R81_REGNUM,
+ E_R82_REGNUM,
+ E_R83_REGNUM,
+ E_R84_REGNUM,
+ E_R85_REGNUM,
+ E_R86_REGNUM,
+ E_R87_REGNUM,
+ E_R88_REGNUM,
+ E_R89_REGNUM,
+ E_R90_REGNUM,
+ E_R91_REGNUM,
+ E_R92_REGNUM,
+ E_R93_REGNUM,
+
+ /* mpu1 system registers */
+
+ E_R94_REGNUM,
+ E_R95_REGNUM,
+ E_R96_REGNUM,
+ E_R97_REGNUM,
+ E_R98_REGNUM,
+ E_R99_REGNUM,
+ E_R100_REGNUM,
+ E_R101_REGNUM,
+ E_R102_REGNUM,
+ E_R103_REGNUM,
+ E_R104_REGNUM,
+ E_R105_REGNUM,
+ E_R106_REGNUM,
+ E_R107_REGNUM,
+ E_R108_REGNUM,
+ E_R109_REGNUM,
+ E_R110_REGNUM,
+ E_R111_REGNUM,
+ E_R112_REGNUM,
+ E_R113_REGNUM,
+ E_R114_REGNUM,
+ E_R115_REGNUM,
+ E_R116_REGNUM,
+ E_R117_REGNUM,
+ E_R118_REGNUM,
+ E_R119_REGNUM,
+ E_R120_REGNUM,
+ E_R121_REGNUM,
+
+ /* fpu system registers */
+ E_R122_REGNUM,
+ E_R123_REGNUM,
+ E_R124_REGNUM,
+ E_R125_REGNUM,
+ E_R126_REGNUM,
+ E_R127_REGNUM,
+ E_R128_REGNUM, E_FPSR_REGNUM = E_R128_REGNUM,
+ E_R129_REGNUM, E_FPEPC_REGNUM = E_R129_REGNUM,
+ E_R130_REGNUM, E_FPST_REGNUM = E_R130_REGNUM,
+ E_R131_REGNUM, E_FPCC_REGNUM = E_R131_REGNUM,
+ E_R132_REGNUM, E_FPCFG_REGNUM = E_R132_REGNUM,
+ E_R133_REGNUM,
+ E_R134_REGNUM,
+ E_R135_REGNUM,
+ E_R136_REGNUM,
+ E_R137_REGNUM,
+ E_R138_REGNUM,
+ E_R139_REGNUM,
+ E_R140_REGNUM,
+ E_R141_REGNUM,
+ E_R142_REGNUM,
+ E_R143_REGNUM,
+ E_R144_REGNUM,
+ E_R145_REGNUM,
+ E_R146_REGNUM,
+ E_R147_REGNUM,
+ E_R148_REGNUM,
E_NUM_REGS
};
"sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
"pc", "fp"
};
- if (regnum < 0 || regnum >= E_NUM_REGS)
+ if (regnum < 0 || regnum > E_NUM_OF_V850_REGS)
return NULL;
return v850_reg_names[regnum];
}
"sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
"pc", "fp"
};
- if (regnum < 0 || regnum >= E_NUM_REGS)
+ if (regnum < 0 || regnum > E_NUM_OF_V850E_REGS)
return NULL;
return v850e_reg_names[regnum];
}
+static const char *
+v850e2_register_name (struct gdbarch *gdbarch, int regnum)
+{
+ static const char *v850e2_reg_names[] =
+ {
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
+
+ "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
+ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
+ "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23",
+ "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
+ "pc", "fp"
+
+ /* mpu0 system registers */
+ "vip", "sr33", "sr34", "sr35", "vmecr", "vmtid", "vmadr", "sr39",
+ "vpecr", "vptid", "vpadr", "sr43", "vdecr", "vdtid", "sr46", "sr47",
+ "sr48", "sr49", "sr50", "sr51", "sr52", "sr53", "sr54", "sr55",
+ "sr56", "sr57", "sr58", "sr59",
+
+ /* mpu1 system registers */
+ "mpm", "mpc", "tid", "ppa", "ppm", "ppc", "dcc", "dcv0",
+ "dcv1", "sr69", "spal", "spau", "ipa0l", "ipa0u", "ipa1l", "ipa1u",
+ "iap2l", "ipa2u", "ipa3l", "ipa3u", "dpa0l", "dpa0u", "dpa1l", "dpa1u",
+ "dpa2l", "dpa2u", "dpa3l", "dpa3u",
+
+ /* fpu system registers */
+ "sr88", "sr89", "sr90", "sr91", "sr92", "sr93", "fpsr", "fpepc",
+ "fpst", "fpcc", "fpcfg", "sr99", "sr100", "sr101", "sr102", "sr103",
+ "sr104", "sr105", "sr106", "sr107", "sr108", "sr109", "sr110", "sr111",
+ "sr112", "sr113", "sr114", "sr115"
+ };
+ if (regnum < 0 || regnum >= E_NUM_REGS)
+ return NULL;
+ return v850e2_reg_names[regnum];
+}
+
/* Returns the default type for register N. */
static struct type *
return 0;
}
- /* The value is a union which contains at least one field which would be
- returned in registers according to these rules -> returned in register. */
+ /* The value is a union which contains at least one field which
+ would be returned in registers according to these rules ->
+ returned in register. */
if (TYPE_CODE (type) == TYPE_CODE_UNION)
{
for (i = 0; i < TYPE_NFIELDS (type); ++i)
else
reg_table = pushmh_reg_table;
- /* Calculate the total size of the saved registers, and add it it to the
+ /* Calculate the total size of the saved registers, and add it to the
immediate value used to adjust SP. */
for (i = 0; reg_table[i].mask != 0; i++)
if (list12 & reg_table[i].mask)
{
/* The caller-save registers are R2, R20 - R29 and R31. All other
registers are either special purpose (PC, SP), argument registers,
- or just considered free for use in the caller. */
+ or just considered free for use in the caller. */
return reg == E_R2_REGNUM
|| (reg >= E_R20_REGNUM && reg <= E_R29_REGNUM)
|| reg == E_R31_REGNUM;
prologue. */
static CORE_ADDR
-v850_analyze_prologue (CORE_ADDR func_addr, CORE_ADDR pc,
+v850_analyze_prologue (struct gdbarch *gdbarch,
+ CORE_ADDR func_addr, CORE_ADDR pc,
struct v850_frame_cache *pi, ULONGEST ctbp)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR prologue_end, current_pc;
struct pifsr pifsrs[E_NUM_REGS + 1];
struct pifsr *pifsr, *pifsr_tmp;
- int fp_used;
int ep_used;
int reg;
CORE_ADDR save_pc, save_end;
int insn;
int insn2 = -1; /* dummy value */
- insn = read_memory_integer (current_pc, 2);
+ insn = read_memory_integer (current_pc, 2, byte_order);
current_pc += 2;
- if ((insn & 0x0780) >= 0x0600) /* Four byte instruction? */
+ if ((insn & 0x0780) >= 0x0600) /* Four byte instruction? */
{
- insn2 = read_memory_integer (current_pc, 2);
+ insn2 = read_memory_integer (current_pc, 2, byte_order);
current_pc += 2;
}
save_pc = current_pc;
save_end = prologue_end;
regsave_func_p = 1;
- current_pc = ctbp + (read_memory_unsigned_integer (adr, 2) & 0xffff);
+ current_pc = ctbp + (read_memory_unsigned_integer (adr, 2, byte_order)
+ & 0xffff);
prologue_end = (current_pc
+ (2 * 3) /* prepare list2,imm5,sp/imm */
+ 4 /* ctret */
|| (insn & 0xffe0) == 0x0060 /* jmp */
|| (insn & 0x0780) == 0x0580) /* branch */
{
- break; /* Ran into end of prologue */
+ break; /* Ran into end of prologue. */
}
else if ((insn & 0xffe0) == ((E_SP_REGNUM << 11) | 0x0240))
{
CORE_ADDR func_addr, func_end;
- /* See what the symbol table says */
+ /* See what the symbol table says. */
if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
{
return pc;
}
- /* We can't find the start of this function, so there's nothing we can do. */
+ /* We can't find the start of this function, so there's nothing we
+ can do. */
return pc;
}
int struct_return,
CORE_ADDR struct_addr)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int argreg;
int argnum;
int len = 0;
if (!v850_type_is_scalar (value_type (*args))
&& TYPE_LENGTH (value_type (*args)) > E_MAX_RETTYPE_SIZE_IN_REGS)
{
- store_unsigned_integer (valbuf, 4, value_address (*args));
+ store_unsigned_integer (valbuf, 4, byte_order,
+ value_address (*args));
len = 4;
val = valbuf;
}
{
CORE_ADDR regval;
- regval = extract_unsigned_integer (val, v850_reg_size);
+ regval = extract_unsigned_integer (val, v850_reg_size, byte_order);
regcache_cooked_write_unsigned (regcache, argreg, regval);
len -= v850_reg_size;
v850_extract_return_value (struct type *type, struct regcache *regcache,
gdb_byte *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int len = TYPE_LENGTH (type);
if (len <= v850_reg_size)
ULONGEST val;
regcache_cooked_read_unsigned (regcache, E_V0_REGNUM, &val);
- store_unsigned_integer (valbuf, len, val);
+ store_unsigned_integer (valbuf, len, byte_order, val);
}
else if (len <= 2 * v850_reg_size)
{
v850_store_return_value (struct type *type, struct regcache *regcache,
const gdb_byte *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int len = TYPE_LENGTH (type);
if (len <= v850_reg_size)
- regcache_cooked_write_unsigned (regcache, E_V0_REGNUM,
- extract_unsigned_integer (valbuf, len));
+ regcache_cooked_write_unsigned
+ (regcache, E_V0_REGNUM,
+ extract_unsigned_integer (valbuf, len, byte_order));
else if (len <= 2 * v850_reg_size)
{
int i, regnum = E_V0_REGNUM;
}
static enum return_value_convention
-v850_return_value (struct gdbarch *gdbarch, struct type *func_type,
+v850_return_value (struct gdbarch *gdbarch, struct value *function,
struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
v850_alloc_frame_cache (struct frame_info *this_frame)
{
struct v850_frame_cache *cache;
- int i;
cache = FRAME_OBSTACK_ZALLOC (struct v850_frame_cache);
cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
static struct v850_frame_cache *
v850_frame_cache (struct frame_info *this_frame, void **this_cache)
{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct v850_frame_cache *cache;
CORE_ADDR current_pc;
int i;
{
ULONGEST ctbp;
ctbp = get_frame_register_unsigned (this_frame, E_CTBP_REGNUM);
- v850_analyze_prologue (cache->pc, current_pc, cache, ctbp);
+ v850_analyze_prologue (gdbarch, cache->pc, current_pc, cache, ctbp);
}
if (!cache->uses_fp)
/* Adjust all the saved registers such that they contain addresses
instead of offsets. */
- for (i = 0; i < E_NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
if (trad_frame_addr_p (cache->saved_regs, i))
cache->saved_regs[i].addr += cache->base;
static const struct frame_unwind v850_frame_unwind = {
NORMAL_FRAME,
+ default_frame_unwind_stop_reason,
v850_frame_this_id,
v850_frame_prev_register,
NULL,
{
case bfd_mach_v850:
set_gdbarch_register_name (gdbarch, v850_register_name);
+ set_gdbarch_num_regs (gdbarch, E_NUM_OF_V850_REGS);
break;
case bfd_mach_v850e:
case bfd_mach_v850e1:
set_gdbarch_register_name (gdbarch, v850e_register_name);
+ set_gdbarch_num_regs (gdbarch, E_NUM_OF_V850E_REGS);
+ break;
+ case bfd_mach_v850e2:
+ case bfd_mach_v850e2v3:
+ set_gdbarch_register_name (gdbarch, v850e2_register_name);
+ set_gdbarch_num_regs (gdbarch, E_NUM_REGS);
break;
}
- set_gdbarch_num_regs (gdbarch, E_NUM_REGS);
set_gdbarch_num_pseudo_regs (gdbarch, 0);
set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
set_gdbarch_register_type (gdbarch, v850_register_type);
- set_gdbarch_char_signed (gdbarch, 0);
+ set_gdbarch_char_signed (gdbarch, 1);
set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);