2004-02-17 David Mosberger <davidm@hpl.hp.com>

[deliverable/binutils-gdb.git] / gdb / x86-64-tdep.c

diff --git a/gdb/x86-64-tdep.c b/gdb/x86-64-tdep.c
index 5fb1d25ffbab36dd14a057e3251bbb0c67320e5b..b19372fe89ca91de6d660fb0a57baf9304ec79df 100644 (file)
--- a/gdb/x86-64-tdep.c
+++ b/gdb/x86-64-tdep.c
@@ -77,12 +77,14 @@ static struct amd64_register_info amd64_register_info[] =
   { "r15", &builtin_type_int64 },
   { "rip", &builtin_type_void_func_ptr },
   { "eflags", &builtin_type_int32 },
+  { "cs", &builtin_type_int32 },
+  { "ss", &builtin_type_int32 },
   { "ds", &builtin_type_int32 },
   { "es", &builtin_type_int32 },
   { "fs", &builtin_type_int32 },
   { "gs", &builtin_type_int32 },
 
-  /* %st0 is register number 22.  */
+  /* %st0 is register number 24.  */
   { "st0", &builtin_type_i387_ext },
   { "st1", &builtin_type_i387_ext },
   { "st2", &builtin_type_i387_ext },
@@ -100,7 +102,7 @@ static struct amd64_register_info amd64_register_info[] =
   { "fooff", &builtin_type_int32 },
   { "fop", &builtin_type_int32 },
 
-  /* %xmm0 is register number 38.  */
+  /* %xmm0 is register number 40.  */
   { "xmm0", &builtin_type_v4sf },
   { "xmm1", &builtin_type_v4sf },
   { "xmm2", &builtin_type_v4sf },
@@ -268,6 +270,19 @@ amd64_merge_classes (enum amd64_reg_class class1, enum amd64_reg_class class2)
 
 static void amd64_classify (struct type *type, enum amd64_reg_class class[2]);
 
+/* Return non-zero if TYPE is a non-POD structure or union type.  */
+
+static int
+amd64_non_pod_p (struct type *type)
+{
+  /* ??? A class with a base class certainly isn't POD, but does this
+     catch all non-POD structure types?  */
+  if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_N_BASECLASSES (type) > 0)
+    return 1;
+
+  return 0;
+}
+
 /* Classify TYPE according to the rules for aggregate (structures and
    arrays) and union types, and store the result in CLASS.  */
 
@@ -279,7 +294,7 @@ amd64_classify_aggregate (struct type *type, enum amd64_reg_class class[2])
   /* 1. If the size of an object is larger than two eightbytes, or in
         C++, is a non-POD structure or union type, or contains
         unaligned fields, it has class memory.  */
-  if (len > 16)
+  if (len > 16 || amd64_non_pod_p (type))
     {
       class[0] = class[1] = AMD64_MEMORY;
       return;
@@ -316,6 +331,10 @@ amd64_classify_aggregate (struct type *type, enum amd64_reg_class class[2])
          int pos = TYPE_FIELD_BITPOS (type, i) / 64;
          enum amd64_reg_class subclass[2];
 
+         /* Ignore static fields.  */
+         if (TYPE_FIELD_STATIC (type, i))
+           continue;
+
          gdb_assert (pos == 0 || pos == 1);
 
          amd64_classify (subtype, subclass);
@@ -475,7 +494,7 @@ amd64_return_value (struct gdbarch *gdbarch, struct type *type,
 
 static CORE_ADDR
 amd64_push_arguments (struct regcache *regcache, int nargs,
-                     struct value **args, CORE_ADDR sp)
+                     struct value **args, CORE_ADDR sp, int struct_return)
 {
   static int integer_regnum[] =
   {
@@ -499,6 +518,10 @@ amd64_push_arguments (struct regcache *regcache, int nargs,
   int sse_reg = 0;
   int i;
 
+  /* Reserve a register for the "hidden" argument.  */
+  if (struct_return)
+    integer_reg++;
+
   for (i = 0; i < nargs; i++)
     {
       struct type *type = VALUE_TYPE (args[i]);
@@ -607,7 +630,7 @@ amd64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
   char buf[8];
 
   /* Pass arguments.  */
-  sp = amd64_push_arguments (regcache, nargs, args, sp);
+  sp = amd64_push_arguments (regcache, nargs, args, sp, struct_return);
 
   /* Pass "hidden" argument".  */
   if (struct_return)
@@ -1086,8 +1109,6 @@ x86_64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
   set_gdbarch_value_to_register (gdbarch, i387_value_to_register);
 
   set_gdbarch_return_value (gdbarch, amd64_return_value);
-  /* Override, since this is handled by amd64_extract_return_value.  */
-  set_gdbarch_extract_struct_value_address (gdbarch, NULL);
 
   set_gdbarch_skip_prologue (gdbarch, amd64_skip_prologue);