/* Target-dependent code for the Xtensa port of GDB, the GNU debugger.
- Copyright (C) 2003-2018 Free Software Foundation, Inc.
+ Copyright (C) 2003-2021 Free Software Foundation, Inc.
This file is part of GDB.
#include "frame.h"
#include "solib-svr4.h"
#include "symtab.h"
-#include "symfile.h"
-#include "objfiles.h"
#include "gdbtypes.h"
#include "gdbcore.h"
#include "value.h"
-#include "dis-asm.h"
-#include "inferior.h"
#include "osabi.h"
#include "regcache.h"
#include "reggroups.h"
#include "regset.h"
-#include "dummy-frame.h"
-#include "dwarf2.h"
-#include "dwarf2-frame.h"
-#include "dwarf2loc.h"
+#include "dwarf2/frame.h"
#include "frame-base.h"
#include "frame-unwind.h"
#include "arch-utils.h"
#include "gdbarch.h"
-#include "remote.h"
-#include "serial.h"
#include "command.h"
#include "gdbcmd.h"
{
int i;
- for (i = 0; i < gdbarch_num_regs (gdbarch)
- + gdbarch_num_pseudo_regs (gdbarch);
- i++)
+ for (i = 0; i < gdbarch_num_cooked_regs (gdbarch); i++)
if (strcasecmp (gdbarch_tdep (gdbarch)->regmap[i].name, name) == 0)
return i;
xtensa_register_name (struct gdbarch *gdbarch, int regnum)
{
/* Return the name stored in the register map. */
- if (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch)
- + gdbarch_num_pseudo_regs (gdbarch))
+ if (regnum >= 0 && regnum < gdbarch_num_cooked_regs (gdbarch))
return gdbarch_tdep (gdbarch)->regmap[regnum].name;
internal_error (__FILE__, __LINE__, _("invalid register %d"), regnum);
return builtin_type (gdbarch)->builtin_data_ptr;
/* Return the stored type for all other registers. */
- else if (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch)
- + gdbarch_num_pseudo_regs (gdbarch))
+ else if (regnum >= 0 && regnum < gdbarch_num_cooked_regs (gdbarch))
{
xtensa_register_t* reg = &tdep->regmap[regnum];
if (regnum >= 0 && regnum < 16)
return gdbarch_tdep (gdbarch)->a0_base + regnum;
- for (i = 0;
- i < gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch);
- i++)
+ for (i = 0; i < gdbarch_num_cooked_regs (gdbarch); i++)
if (regnum == gdbarch_tdep (gdbarch)->regmap[i].target_number)
return i;
return REG_VALID;
}
/* Pseudo registers. */
- else if (regnum >= 0
- && regnum < gdbarch_num_regs (gdbarch)
- + gdbarch_num_pseudo_regs (gdbarch))
+ else if (regnum >= 0 && regnum < gdbarch_num_cooked_regs (gdbarch))
{
xtensa_register_t *reg = &gdbarch_tdep (gdbarch)->regmap[regnum];
xtensa_register_type_t type = reg->type;
/* Some targets cannot read TIE register files. */
else if (type == xtRegisterTypeTieRegfile)
- {
+ {
/* Use 'fetch' to get register? */
if (flags & xtTargetFlagsUseFetchStore)
{
DEBUGTRACE ("xtensa_pseudo_register_write (... regnum = %d (%s) ...)\n",
regnum, xtensa_register_name (gdbarch, regnum));
- /* Renumber register, if aliase a0..a15 on Windowed ABI. */
+ /* Renumber register, if aliases a0..a15 on Windowed ABI. */
if (gdbarch_tdep (gdbarch)->isa_use_windowed_registers
&& (regnum >= gdbarch_tdep (gdbarch)->a0_base)
&& (regnum <= gdbarch_tdep (gdbarch)->a0_base + 15))
return;
}
/* Pseudo registers. */
- else if (regnum >= 0
- && regnum < gdbarch_num_regs (gdbarch)
- + gdbarch_num_pseudo_regs (gdbarch))
+ else if (regnum >= 0 && regnum < gdbarch_num_cooked_regs (gdbarch))
{
xtensa_register_t *reg = &gdbarch_tdep (gdbarch)->regmap[regnum];
xtensa_register_type_t type = reg->type;
/* On most targets, we cannot write registers
of type "Unknown" or "Unmapped". */
if (type == xtRegisterTypeUnmapped || type == xtRegisterTypeUnknown)
- {
+ {
if ((flags & xtTargetFlagsNonVisibleRegs) == 0)
{
warning (_("cannot write register %s"),
/* Some targets cannot read TIE register files. */
else if (type == xtRegisterTypeTieRegfile)
- {
+ {
/* Use 'store' to get register? */
if (flags & xtTargetFlagsUseFetchStore)
{
/* We can always write mapped registers. */
else if (type == xtRegisterTypeMapped || type == xtRegisterTypeTieState)
- {
+ {
xtensa_register_write_masked (regcache, reg, buffer);
return;
}
/* Each element of xtensa_call0_frame_cache.c0_rt[] describes for each
A-register where the current content of the reg came from (in terms
of an original reg and a constant). Negative values of c0_rt[n].fp_reg
- mean that the orignal content of the register was saved to the stack.
+ mean that the original content of the register was saved to the stack.
c0_rt[n].fr.ofs is NOT the offset from the frame base because we don't
know where SP will end up until the entire prologue has been analyzed. */
int c0_hasfp; /* Current frame uses frame pointer. */
int fp_regnum; /* A-register used as FP. */
int c0_fp; /* Actual value of frame pointer. */
- int c0_fpalign; /* Dinamic adjustment for the stack
+ int c0_fpalign; /* Dynamic adjustment for the stack
pointer. It's an AND mask. Zero,
if alignment was not adjusted. */
int c0_old_sp; /* In case of dynamic adjustment, it is
for (ia = start_addr, bt = ia; ia < current_pc ; ia += ilen)
{
if (ia + xtensa_isa_maxlength (isa) > bt)
- {
+ {
ba = ia;
bt = (ba + XTENSA_ISA_BSZ) < current_pc
? ba + XTENSA_ISA_BSZ : current_pc;
{
/* Set A4...A7/A11. */
/* Get the SP of the frame previous to the previous one.
- To achieve this, we have to dereference SP twice. */
+ To achieve this, we have to dereference SP twice. */
sp = (CORE_ADDR) read_memory_integer (sp - 12, 4, byte_order);
sp = (CORE_ADDR) read_memory_integer (sp - 12, 4, byte_order);
sp -= cache->wd.callsize * 4;
if ((cache->wd.ws & (1 << cache->wd.wb)) == 0)
{
/* Register window overflow already happened.
- We can read caller's SP from the proper spill loction. */
+ We can read caller's SP from the proper spill location. */
sp = get_frame_register_unsigned
(this_frame, gdbarch_tdep (gdbarch)->a0_base + 1);
cache->prev_sp = read_memory_integer (sp - 12, 4, byte_order);
static int xtensa_session_once_reported = 1;
/* Report a problem with prologue analysis while doing backtracing.
- But, do it only once to avoid annoyng repeated messages. */
+ But, do it only once to avoid annoying repeated messages. */
static void
warning_once (void)
/* Convert A-register numbers to AR-register numbers,
if we deal with A-register. */
if (regnum >= gdbarch_tdep (gdbarch)->a0_base
- && regnum <= gdbarch_tdep (gdbarch)->a0_base + 15)
+ && regnum <= gdbarch_tdep (gdbarch)->a0_base + 15)
regnum = arreg_number (gdbarch, regnum, cache->wd.wb);
/* Check, if we deal with AR-register saved on stack. */
if (len > (callsize > 8 ? 8 : 16))
internal_error (__FILE__, __LINE__,
- _("unimplemented for this length: %d"),
- TYPE_LENGTH (type));
+ _("unimplemented for this length: %s"),
+ pulongest (TYPE_LENGTH (type)));
areg = arreg_number (gdbarch,
gdbarch_tdep (gdbarch)->a0_base + 2 + callsize, wb);
DEBUGTRACE ("[xtensa_store_return_value] callsize %d wb %d\n",
- callsize, (int) wb);
+ callsize, (int) wb);
}
else
{
{
/* Structures up to 16 bytes are returned in registers. */
- int struct_return = ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
- || TYPE_CODE (valtype) == TYPE_CODE_UNION
- || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
+ int struct_return = ((valtype->code () == TYPE_CODE_STRUCT
+ || valtype->code () == TYPE_CODE_UNION
+ || valtype->code () == TYPE_CODE_ARRAY)
&& TYPE_LENGTH (valtype) > 16);
if (struct_return)
int nargs,
struct value **args,
CORE_ADDR sp,
- int struct_return,
+ function_call_return_method return_method,
CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- int i;
int size, onstack_size;
gdb_byte *buf = (gdb_byte *) alloca (16);
CORE_ADDR ra, ps;
if (xtensa_debug_level > 3)
{
- int i;
DEBUGINFO ("[xtensa_push_dummy_call] nargs = %d\n", nargs);
- DEBUGINFO ("[xtensa_push_dummy_call] sp=0x%x, struct_return=%d, "
+ DEBUGINFO ("[xtensa_push_dummy_call] sp=0x%x, return_method=%d, "
"struct_addr=0x%x\n",
- (int) sp, (int) struct_return, (int) struct_addr);
+ (int) sp, (int) return_method, (int) struct_addr);
- for (i = 0; i < nargs; i++)
- {
+ for (int i = 0; i < nargs; i++)
+ {
struct value *arg = args[i];
struct type *arg_type = check_typedef (value_type (arg));
- fprintf_unfiltered (gdb_stdlog, "%2d: %s %3d ", i,
+ fprintf_unfiltered (gdb_stdlog, "%2d: %s %3s ", i,
host_address_to_string (arg),
- TYPE_LENGTH (arg_type));
- switch (TYPE_CODE (arg_type))
+ pulongest (TYPE_LENGTH (arg_type)));
+ switch (arg_type->code ())
{
case TYPE_CODE_INT:
fprintf_unfiltered (gdb_stdlog, "int");
fprintf_unfiltered (gdb_stdlog, "struct");
break;
default:
- fprintf_unfiltered (gdb_stdlog, "%3d", TYPE_CODE (arg_type));
+ fprintf_unfiltered (gdb_stdlog, "%3d", arg_type->code ());
break;
}
fprintf_unfiltered (gdb_stdlog, " %s\n",
size = 0;
onstack_size = 0;
- i = 0;
- if (struct_return)
+ if (return_method == return_method_struct)
size = REGISTER_SIZE;
- for (i = 0; i < nargs; i++)
+ for (int i = 0; i < nargs; i++)
{
struct argument_info *info = &arg_info[i];
struct value *arg = args[i];
struct type *arg_type = check_typedef (value_type (arg));
- switch (TYPE_CODE (arg_type))
+ switch (arg_type->code ())
{
case TYPE_CODE_INT:
case TYPE_CODE_BOOL:
/* Second Loop: Load arguments. */
- if (struct_return)
+ if (return_method == return_method_struct)
{
store_unsigned_integer (buf, REGISTER_SIZE, byte_order, struct_addr);
regcache->cooked_write (ARG_1ST (gdbarch), buf);
}
- for (i = 0; i < nargs; i++)
+ for (int i = 0; i < nargs; i++)
{
struct argument_info *info = &arg_info[i];
/* Set the return address of dummy frame to the dummy address.
The return address for the current function (in A0) is
- saved in the dummy frame, so we can savely overwrite A0 here. */
+ saved in the dummy frame, so we can safely overwrite A0 here. */
if (gdbarch_tdep (gdbarch)->call_abi != CallAbiCall0Only)
{
for (ia = start_pc, bt = ia; ia < finish_pc ; ia += ilen)
{
if (ia + xtensa_isa_maxlength (isa) > bt)
- {
+ {
ba = ia;
bt = (ba + XTENSA_ISA_BSZ) < finish_pc
? ba + XTENSA_ISA_BSZ : finish_pc;
be within a bundle. Updates the destination register tracking info
accordingly. The pc is needed only for pc-relative load instructions
(eg. l32r). The SP register number is needed to identify stores to
- the stack frame. Returns 0, if analysis was succesfull, non-zero
+ the stack frame. Returns 0, if analysis was successful, non-zero
otherwise. */
static int
/* 3 operands: dst, src1, src2. */
gdb_assert (nods == 3);
if (src[odv[1]].fr_reg == C0_CONST)
- {
+ {
dst[odv[0]].fr_reg = src[odv[2]].fr_reg;
dst[odv[0]].fr_ofs = src[odv[2]].fr_ofs + src[odv[1]].fr_ofs;
}
else if (src[odv[2]].fr_reg == C0_CONST)
- {
+ {
dst[odv[0]].fr_reg = src[odv[1]].fr_reg;
dst[odv[0]].fr_ofs = src[odv[1]].fr_ofs + src[odv[2]].fr_ofs;
}
/* else fall through. */
}
if (src[odv[1]].fr_reg == C0_CONST)
- {
+ {
dst[odv[0]].fr_reg = src[odv[2]].fr_reg;
dst[odv[0]].fr_ofs = src[odv[2]].fr_ofs & src[odv[1]].fr_ofs;
}
else if (src[odv[2]].fr_reg == C0_CONST)
- {
+ {
dst[odv[0]].fr_reg = src[odv[1]].fr_reg;
dst[odv[0]].fr_ofs = src[odv[1]].fr_ofs & src[odv[2]].fr_ofs;
}
/* 3 operands: dst, src1, src2. */
gdb_assert (nods == 3);
if (src[odv[2]].fr_reg == C0_CONST)
- {
+ {
dst[odv[0]].fr_reg = src[odv[1]].fr_reg;
dst[odv[0]].fr_ofs = src[odv[1]].fr_ofs - src[odv[2]].fr_ofs;
}
&& src[odv[0]].fr_reg >= 0 /* Value is from a register. */
&& src[odv[0]].fr_ofs == 0 /* Value hasn't been modified. */
&& src[src[odv[0]].fr_reg].to_stk == C0_NOSTK) /* First time. */
- {
+ {
/* ISA encoding guarantees alignment. But, check it anyway. */
gdb_assert ((odv[2] & 3) == 0);
dst[src[odv[0]].fr_reg].to_stk = src[odv[1]].fr_ofs + odv[2];
body_pc = prologue_sal.end;
/* If we are going to analyze the prologue in general without knowing about
- the current PC, make the best assumtion for the end of the prologue. */
+ the current PC, make the best assumption for the end of the prologue. */
if (pc == 0)
{
find_pc_partial_function (start, 0, NULL, &end_pc);
for (ia = start, bt = ia; ia < body_pc ; ia += ilen)
{
/* (Re)fill instruction buffer from memory if necessary, but do not
- read memory beyond PC to be sure we stay within text section
+ read memory beyond PC to be sure we stay within text section
(this protection only works if a non-zero pc is supplied). */
if (ia + xtensa_isa_maxlength (isa) > bt)
- {
+ {
ba = ia;
bt = (ba + XTENSA_ISA_BSZ) < body_pc ? ba + XTENSA_ISA_BSZ : body_pc;
if (target_read_memory (ba, ibuf, bt - ba) != 0 )
}
/* Analyze a bundle or a single instruction, using a snapshot of
- the register tracking info as input for the entire bundle so that
+ the register tracking info as input for the entire bundle so that
register changes do not take effect within this bundle. */
for (j = 0; j < nregs; ++j)
rtmp[j] = cache->c0.c0_rt[j];
for (is = 0; is < islots; ++is)
- {
+ {
/* Decode a slot and classify the opcode. */
fail = xtensa_format_get_slot (isa, ifmt, is, ins, slot);
if (body_pc <= pc)
{
/* Prologue analysis was successful up to the PC.
- It includes the cases when PC == START_PC. */
+ It includes the cases when PC == START_PC. */
c0_hasfp = cache->c0.c0_rt[C0_FP].fr_reg == C0_SP;
/* c0_hasfp == true means there is a frame pointer because
we analyzed the prologue and found that cache->c0.c0_rt[C0_FP]
while (insn_num++ < XTENSA_MAX_WINDOW_INTERRUPT_HANDLER_LEN)
{
if (ia + xtensa_isa_maxlength (isa) > bt)
- {
+ {
ba = ia;
bt = (ba + XTENSA_ISA_BSZ);
if (target_read_memory (ba, ibuf, bt - ba) != 0)
error (_("xtensa_dump_tdep(): not implemented"));
}
+void _initialize_xtensa_tdep ();
void
-_initialize_xtensa_tdep (void)
+_initialize_xtensa_tdep ()
{
gdbarch_register (bfd_arch_xtensa, xtensa_gdbarch_init, xtensa_dump_tdep);
xtensa_init_reggroups ();
projects / deliverable / binutils-gdb.git / blobdiff