/* Target-dependent code for the Xtensa port of GDB, the GNU debugger.
- Copyright (C) 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 2003-2013 Free Software Foundation, Inc.
This file is part of GDB.
#include "xtensa-config.h"
-static int xtensa_debug_level = 0;
+static unsigned int xtensa_debug_level = 0;
#define DEBUGWARN(args...) \
if (xtensa_debug_level > 0) \
if (tp == NULL)
{
- char *name = xmalloc (16);
+ char *name = xstrprintf ("int%d", size * 8);
tp = xmalloc (sizeof (struct ctype_cache));
tp->next = tdep->type_entries;
tdep->type_entries = tp;
tp->size = size;
-
- sprintf (name, "int%d", size * 8);
tp->virtual_type
- = arch_integer_type (gdbarch, size * 8, 1, xstrdup (name));
+ = arch_integer_type (gdbarch, size * 8, 1, name);
+ xfree (name);
}
reg->ctype = tp->virtual_type;
&& (regnum <= gdbarch_tdep (gdbarch)->a0_base + 15))
{
gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
- unsigned int wb;
regcache_raw_read (regcache,
gdbarch_tdep (gdbarch)->wb_regnum, buf);
if (group == restore_reggroup)
return (regnum < gdbarch_num_regs (gdbarch)
&& (reg->flags & SAVE_REST_FLAGS) == SAVE_REST_VALID);
- if ((cp_number = xtensa_coprocessor_register_group (group)) >= 0)
+ cp_number = xtensa_coprocessor_register_group (group);
+ if (cp_number >= 0)
return rg & (xtRegisterGroupCP0 << cp_number);
else
return 1;
CORE_ADDR start_addr;
xtensa_isa isa;
xtensa_insnbuf ins, slot;
- char ibuf[XTENSA_ISA_BSZ];
+ gdb_byte ibuf[XTENSA_ISA_BSZ];
CORE_ADDR ia, bt, ba;
xtensa_format ifmt;
int ilen, islots, is;
static enum return_value_convention
xtensa_return_value (struct gdbarch *gdbarch,
- struct type *func_type,
+ struct value *function,
struct type *valtype,
struct regcache *regcache,
gdb_byte *readbuf,
#define RETURN_RET goto done
xtensa_isa isa;
xtensa_insnbuf ins, slot;
- char ibuf[XTENSA_ISA_BSZ];
+ gdb_byte ibuf[XTENSA_ISA_BSZ];
CORE_ADDR ia, bt, ba;
xtensa_format ifmt;
int ilen, islots, is;
CORE_ADDR ia; /* Current insn address in prologue. */
CORE_ADDR ba = 0; /* Current address at base of insn buffer. */
CORE_ADDR bt; /* Current address at top+1 of insn buffer. */
- char ibuf[XTENSA_ISA_BSZ];/* Instruction buffer for decoding prologue. */
+ gdb_byte ibuf[XTENSA_ISA_BSZ];/* Instruction buffer for decoding prologue. */
xtensa_isa isa; /* libisa ISA handle. */
xtensa_insnbuf ins, slot; /* libisa handle to decoded insn, slot. */
xtensa_format ifmt; /* libisa instruction format. */
too bad. */
int i;
- for (i = 0;
- (i < C0_NREGS) &&
- (i == C0_RA || cache->c0.c0_rt[i].fr_reg != C0_RA);
+ for (i = 0;
+ (i < C0_NREGS)
+ && (i == C0_RA || cache->c0.c0_rt[i].fr_reg != C0_RA);
++i);
if (i >= C0_NREGS && cache->c0.c0_rt[C0_RA].fr_reg == C0_RA)
i = C0_RA;
{
xtensa_isa isa;
xtensa_insnbuf ins, slot;
- char ibuf[XTENSA_ISA_BSZ];
+ gdb_byte ibuf[XTENSA_ISA_BSZ];
CORE_ADDR ia, bt, ba;
xtensa_format ifmt;
int ilen, islots, is;
int fail = 0;
void (*func) (struct gdbarch *, int, int, int, CORE_ADDR);
- int at, as, offset;
- int num_operands;
+ uint32_t at, as, offset;
/* WindowUnderflow12 = true, when inside _WindowUnderflow12. */
int WindowUnderflow12 = (current_pc & 0x1ff) >= 0x140;
gdbarch_register (bfd_arch_xtensa, xtensa_gdbarch_init, xtensa_dump_tdep);
xtensa_init_reggroups ();
- add_setshow_zinteger_cmd ("xtensa",
- class_maintenance,
- &xtensa_debug_level,
+ add_setshow_zuinteger_cmd ("xtensa",
+ class_maintenance,
+ &xtensa_debug_level,
_("Set Xtensa debugging."),
_("Show Xtensa debugging."), _("\
When non-zero, Xtensa-specific debugging is enabled. \
Can be 1, 2, 3, or 4 indicating the level of debugging."),
- NULL,
- NULL,
- &setdebuglist, &showdebuglist);
+ NULL,
+ NULL,
+ &setdebuglist, &showdebuglist);
}