indicates that the instruction is an ENTRY instruction. */
#define XTENSA_IS_ENTRY(op1) \
- ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) ? ((op1) == 0x6c) : ((op1) == 0x36))
+ ((gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) \
+ ? ((op1) == 0x6c) : ((op1) == 0x36))
#define XTENSA_ENTRY_LENGTH 3
/* Lookup call insn.
(Return the default value (4) if we can't find a valid call insn. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
{
if (((insn & 0xf) == 0x5) || ((insn & 0xcf) == 0xc0))
winsize = (insn & 0x30) >> 2; /* 0, 4, 8, 12 */
xtensa_register_name (int regnum)
{
/* Return the name stored in the register map. */
- if (regnum >= 0 && regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ if (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
return REGMAP[regnum].name;
/* Invalid register number. */
|| (regnum >= A0_BASE && regnum < A0_BASE + 16))
return builtin_type_int;
- if (regnum == PC_REGNUM || regnum == A1_REGNUM)
+ if (regnum == gdbarch_pc_regnum (current_gdbarch) || regnum == A1_REGNUM)
return lookup_pointer_type (builtin_type_void);
/* Return the stored type for all other registers. */
- else if (regnum >= 0 && regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ else if (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
xtensa_register_t* reg = ®MAP[regnum];
if (regnum >= 0 && regnum < 16)
return A0_BASE + regnum;
- for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
+ for (i = 0;
+ i < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ i++)
if (regnum == REGMAP[i].target_number)
return i;
(Note: The size of masked registers is always less or equal 32 bits.) */
static void
-xtensa_register_write_masked (xtensa_register_t *reg, unsigned char *buffer)
+xtensa_register_write_masked (struct regcache *regcache,
+ xtensa_register_t *reg, const gdb_byte *buffer)
{
unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
DEBUGTRACE ("xtensa_register_write_masked ()\n");
/* Copy the masked register to host byte-order. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
for (i = 0; i < bytesize; i++)
{
mem >>= 8;
if (r >= 0 && size > 0)
{
/* Don't overwrite the unmasked areas. */
+ ULONGEST old_val;
+ regcache_cooked_read_unsigned (regcache, r, &old_val);
m = 0xffffffff >> (32 - size) << start;
regval <<= start;
- regval = (regval & m) | (read_register (r) & ~m);
- write_register (r, regval);
+ regval = (regval & m) | (old_val & ~m);
+ regcache_cooked_write_unsigned (regcache, r, regval);
}
}
}
register. */
static void
-xtensa_register_read_masked (xtensa_register_t *reg, unsigned char *buffer)
+xtensa_register_read_masked (struct regcache *regcache,
+ xtensa_register_t *reg, gdb_byte *buffer)
{
unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
for (i = 0; i < mask->count; i++)
{
int r = mask->mask[i].reg_num;
- regval = (r >= 0) ? read_register (r) : 0;
+ if (r >= 0)
+ {
+ ULONGEST val;
+ regcache_cooked_read_unsigned (regcache, r, &val);
+ regval = (unsigned int) val;
+ }
+ else
+ regval = 0;
+
start = mask->mask[i].bit_start;
size = mask->mask[i].bit_size;
ptr = value;
mem = *ptr;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
for (i = 0; i < bytesize; i++)
{
if ((i & 3) == 0)
}
/* We can always read 'regular' registers. */
- if (regnum >= 0 && regnum < NUM_REGS)
+ if (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch))
regcache_raw_read (regcache, regnum, buffer);
/* Pseudo registers. */
- else if (regnum >= 0 && regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ else if (regnum >= 0
+ && regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
xtensa_register_t *reg = ®MAP[regnum];
xtensa_register_type_t type = reg->type;
/* We can always read mapped registers. */
else if (type == xtRegisterTypeMapped || type == xtRegisterTypeTieState)
{
- xtensa_register_read_masked (reg, (unsigned char *) buffer);
+ xtensa_register_read_masked (regcache, reg, buffer);
return;
}
/* We can always write 'core' registers.
Note: We might have converted Ax->ARy. */
- if (regnum >= 0 && regnum < NUM_REGS)
+ if (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch))
regcache_raw_write (regcache, regnum, buffer);
/* Pseudo registers. */
- else if (regnum >= 0 && regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ else if (regnum >= 0
+ && regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
xtensa_register_t *reg = ®MAP[regnum];
xtensa_register_type_t type = reg->type;
/* We can always write mapped registers. */
else if (type == xtRegisterTypeMapped || type == xtRegisterTypeTieState)
{
- xtensa_register_write_masked (reg, (unsigned char *) buffer);
+ xtensa_register_write_masked (regcache, reg, buffer);
return;
}
if (group == vector_reggroup || group == xtensa_vectra_reggroup)
return rg & xtRegisterGroupVectra;
if (group == save_reggroup || group == restore_reggroup)
- return (regnum < NUM_REGS
+ return (regnum < gdbarch_num_regs (current_gdbarch)
&& (reg->flags & SAVE_REST_FLAGS) == SAVE_REST_VALID);
else
return 1;
DEBUGTRACE ("xtensa_supply_gregset (..., regnum==%d, ...) \n", regnum);
- if (regnum == PC_REGNUM || regnum == -1)
- regcache_raw_supply (rc, PC_REGNUM, (char *) ®s->pc);
- if (regnum == PS_REGNUM || regnum == -1)
- regcache_raw_supply (rc, PS_REGNUM, (char *) ®s->ps);
+ if (regnum == gdbarch_pc_regnum (current_gdbarch) || regnum == -1)
+ regcache_raw_supply (rc,
+ gdbarch_pc_regnum (current_gdbarch),
+ (char *) ®s->pc);
+ if (regnum == gdbarch_ps_regnum (current_gdbarch) || regnum == -1)
+ regcache_raw_supply (rc, gdbarch_ps_regnum (current_gdbarch),
+ (char *) ®s->ps);
if (regnum == WB_REGNUM || regnum == -1)
regcache_raw_supply (rc, WB_REGNUM, (char *) ®s->windowbase);
if (regnum == WS_REGNUM || regnum == -1)
DEBUGTRACE ("xtensa_unwind_pc (next_frame = %p)\n", next_frame);
- frame_unwind_register (next_frame, PC_REGNUM, buf);
+ frame_unwind_register (next_frame, gdbarch_pc_regnum (current_gdbarch), buf);
DEBUGINFO ("[xtensa_unwind_pc] pc = 0x%08x\n", (unsigned int)
extract_typed_address (buf, builtin_type_void_func_ptr));
/* Get windowbase, windowstart, ps, and pc. */
wb = frame_unwind_register_unsigned (next_frame, WB_REGNUM);
ws = frame_unwind_register_unsigned (next_frame, WS_REGNUM);
- ps = frame_unwind_register_unsigned (next_frame, PS_REGNUM);
- pc = frame_unwind_register_unsigned (next_frame, PC_REGNUM);
+ ps = frame_unwind_register_unsigned (next_frame,
+ gdbarch_ps_regnum (current_gdbarch));
+ pc = frame_unwind_register_unsigned (next_frame,
+ gdbarch_pc_regnum (current_gdbarch));
op1 = read_memory_integer (pc, 1);
- if (XTENSA_IS_ENTRY (op1) || !windowing_enabled (read_register (PS_REGNUM)))
+ if (XTENSA_IS_ENTRY (op1) || !windowing_enabled (ps))
{
- int callinc = CALLINC (frame_unwind_register_unsigned (next_frame,
- PS_REGNUM));
+ int callinc = CALLINC (ps);
ra = frame_unwind_register_unsigned (next_frame,
A0_REGNUM + callinc * 4);
cache->callsize = 0;
cache->wb = wb;
cache->ws = ws;
- cache->prev_sp = read_register (A1_REGNUM);
+ cache->prev_sp = frame_unwind_register_unsigned (next_frame, A1_REGNUM);
}
else
{
int regnum = AREG_NUMBER (A1_REGNUM, cache->wb);
- cache->prev_sp = read_register (regnum);
+ cache->prev_sp = frame_unwind_register_unsigned (next_frame, regnum);
}
}
}
else if (regnum == WB_REGNUM)
saved_reg = cache->wb;
- else if (regnum == PC_REGNUM)
+ else if (regnum == gdbarch_pc_regnum (current_gdbarch))
saved_reg = cache->pc;
- else if (regnum == PS_REGNUM)
+ else if (regnum == gdbarch_ps_regnum (current_gdbarch))
saved_reg = cache->ps;
else
done = 0;
gdb_assert(len > 0);
/* First, we have to find the caller window in the register file. */
- regcache_raw_read_unsigned (regcache, PC_REGNUM, &pc);
+ regcache_raw_read_unsigned (regcache,
+ gdbarch_pc_regnum (current_gdbarch), &pc);
callsize = extract_call_winsize (pc);
/* On Xtensa, we can return up to 4 words (or 2 when called by call12). */
DEBUGINFO ("[xtensa_extract_return_value] areg %d len %d\n", areg, len);
- if (len < 4 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (len < 4 && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset = 4 - len;
for (; len > 0; len -= 4, areg++, valbuf += 4)
DEBUGTRACE ("xtensa_store_return_value (...)\n");
regcache_raw_read_unsigned (regcache, WB_REGNUM, &wb);
- regcache_raw_read_unsigned (regcache, PC_REGNUM, &pc);
+ regcache_raw_read_unsigned (regcache,
+ gdbarch_pc_regnum (current_gdbarch), &pc);
callsize = extract_call_winsize (pc);
if (len > (callsize > 8 ? 8 : 16))
DEBUGTRACE ("[xtensa_store_return_value] callsize %d wb %d\n",
callsize, (int) wb);
- if (len < 4 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (len < 4 && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset = 4 - len;
areg = AREG_NUMBER (A2_REGNUM + callsize, wb);
word in big-endian mode and require a shift. This only
applies for structures smaller than one word. */
- if (n < REGISTER_SIZE && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (n < REGISTER_SIZE
+ && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset += (REGISTER_SIZE - n);
write_memory (offset, info->contents, info->length);
than REGISTER_SIZE; for larger odd-sized structures the excess
will be left-aligned in the register on both endiannesses. */
- if (n < REGISTER_SIZE && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (n < REGISTER_SIZE
+ && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
ULONGEST v = extract_unsigned_integer (cp, REGISTER_SIZE);
v = v >> ((REGISTER_SIZE - n) * TARGET_CHAR_BIT);
/* ULONGEST v = extract_unsigned_integer (cp, REGISTER_SIZE);*/
regcache_cooked_write (regcache, r, cp);
- /* write_register (r, v); */
+ /* regcache_cooked_write_unsigned (regcache, r, v); */
cp += REGISTER_SIZE;
n -= REGISTER_SIZE;
r++;
saved in the dummy frame, so we can savely overwrite A0 here. */
ra = (bp_addr & 0x3fffffff) | 0x40000000;
- regcache_raw_read (regcache, PS_REGNUM, buf);
+ regcache_raw_read (regcache, gdbarch_ps_regnum (current_gdbarch), buf);
ps = extract_unsigned_integer (buf, 4) & ~0x00030000;
regcache_cooked_write_unsigned (regcache, A4_REGNUM, ra);
- regcache_cooked_write_unsigned (regcache, PS_REGNUM, ps | 0x00010000);
+ regcache_cooked_write_unsigned (regcache,
+ gdbarch_ps_regnum (current_gdbarch),
+ ps | 0x00010000);
/* Set new stack pointer and return it. */
regcache_cooked_write_unsigned (regcache, A1_REGNUM, sp);
if (ISA_USE_DENSITY_INSTRUCTIONS)
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
*lenptr = sizeof (density_big_breakpoint);
return density_big_breakpoint;
}
else
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
*lenptr = sizeof (big_breakpoint);
return big_breakpoint;