// powerpc.cc -- powerpc target support for gold.
-// Copyright 2008, 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc.
+// Copyright (C) 2008-2014 Free Software Foundation, Inc.
// Written by David S. Miller <davem@davemloft.net>
// and David Edelsohn <edelsohn@gnu.org>
inline bool
local_reloc_may_be_function_pointer(Symbol_table* , Layout* ,
Target_powerpc* ,
- Sized_relobj_file<size, big_endian>* ,
+ Sized_relobj_file<size, big_endian>* relobj,
unsigned int ,
Output_section* ,
const elfcpp::Rela<size, big_endian>& ,
// may be folded and we'll still keep function addresses distinct.
// That means no reloc is of concern here.
if (size == 64)
- return false;
- // For 32-bit, conservatively assume anything but calls to
+ {
+ Powerpc_relobj<size, big_endian>* ppcobj = static_cast
+ <Powerpc_relobj<size, big_endian>*>(relobj);
+ if (ppcobj->abiversion() == 1)
+ return false;
+ }
+ // For 32-bit and ELFv2, conservatively assume anything but calls to
// function code might be taking the address of the function.
return !is_branch_reloc(r_type);
}
inline bool
global_reloc_may_be_function_pointer(Symbol_table* , Layout* ,
Target_powerpc* ,
- Sized_relobj_file<size, big_endian>* ,
+ Sized_relobj_file<size, big_endian>* relobj,
unsigned int ,
Output_section* ,
const elfcpp::Rela<size, big_endian>& ,
{
// As above.
if (size == 64)
- return false;
+ {
+ Powerpc_relobj<size, big_endian>* ppcobj = static_cast
+ <Powerpc_relobj<size, big_endian>*>(relobj);
+ if (ppcobj->abiversion() == 1)
+ return false;
+ }
return !is_branch_reloc(r_type);
}
{
CHECK_NONE,
CHECK_SIGNED,
- CHECK_BITFIELD
+ CHECK_UNSIGNED,
+ CHECK_BITFIELD,
+ CHECK_LOW_INSN,
+ CHECK_HIGH_INSN
};
enum Status
template<int valsize>
static inline bool
- has_overflow_bitfield(Address value)
+ has_overflow_unsigned(Address value)
{
Address limit = static_cast<Address>(1) << ((valsize - 1) >> 1);
limit <<= ((valsize - 1) >> 1);
limit <<= ((valsize - 1) - 2 * ((valsize - 1) >> 1));
- return value > (limit << 1) - 1 && value + limit > (limit << 1) - 1;
+ return value > (limit << 1) - 1;
+ }
+
+ template<int valsize>
+ static inline bool
+ has_overflow_bitfield(Address value)
+ {
+ return (has_overflow_unsigned<valsize>(value)
+ && has_overflow_signed<valsize>(value));
}
template<int valsize>
if (has_overflow_signed<valsize>(value))
return STATUS_OVERFLOW;
}
+ else if (overflow == CHECK_UNSIGNED)
+ {
+ if (has_overflow_unsigned<valsize>(value))
+ return STATUS_OVERFLOW;
+ }
else if (overflow == CHECK_BITFIELD)
{
if (has_overflow_bitfield<valsize>(value))
void
Powerpc_relobj<size, big_endian>::do_read_symbols(Read_symbols_data* sd)
{
- Sized_relobj_file<size, big_endian>::do_read_symbols(sd);
+ this->base_read_symbols(sd);
if (size == 64)
{
const int shdr_size = elfcpp::Elf_sizes<size>::shdr_size;
}
}
-// Call Sized_dynobj::do_read_symbols to read the symbols then
+// Call Sized_dynobj::base_read_symbols to read the symbols then
// read .opd from a dynamic object, filling in opd_ent_ vector,
template<int size, bool big_endian>
void
Powerpc_dynobj<size, big_endian>::do_read_symbols(Read_symbols_data* sd)
{
- Sized_dynobj<size, big_endian>::do_read_symbols(sd);
+ this->base_read_symbols(sd);
if (size == 64)
{
const int shdr_size = elfcpp::Elf_sizes<size>::shdr_size;
if (plt == this->glink_)
{
// See Output_data_glink::do_write() for glink contents.
- if (size == 64)
+ if (len == 0)
+ {
+ gold_assert(parameters->doing_static_link());
+ // Static linking may need stubs, to support ifunc and long
+ // branches. We need to create an output section for
+ // .eh_frame early in the link process, to have a place to
+ // attach stub .eh_frame info. We also need to have
+ // registered a CIE that matches the stub CIE. Both of
+ // these requirements are satisfied by creating an FDE and
+ // CIE for .glink, even though static linking will leave
+ // .glink zero length.
+ // ??? Hopefully generating an FDE with a zero address range
+ // won't confuse anything that consumes .eh_frame info.
+ }
+ else if (size == 64)
{
// There is one word before __glink_PLTresolve
address += 8;
// The first covers the branch table, the second
// __glink_PLTresolve at the end of glink.
off_t resolve_size = this->glink_->pltresolve_size;
- if (oview[9] == 0)
+ if (oview[9] == elfcpp::DW_CFA_nop)
len -= resolve_size;
else
{
static const uint32_t addis_11_2 = 0x3d620000;
static const uint32_t addis_11_11 = 0x3d6b0000;
static const uint32_t addis_11_30 = 0x3d7e0000;
+static const uint32_t addis_12_2 = 0x3d820000;
static const uint32_t addis_12_12 = 0x3d8c0000;
static const uint32_t b = 0x48000000;
static const uint32_t bcl_20_31 = 0x429f0005;
{
write_insn<big_endian>(p, std_2_1 + this->targ_->stk_toc());
p += 4;
- write_insn<big_endian>(p, addis_11_2 + ha(off));
- p += 4;
- write_insn<big_endian>(p, ld_12_11 + l(off));
- p += 4;
+ if (plt_load_toc)
+ {
+ write_insn<big_endian>(p, addis_11_2 + ha(off));
+ p += 4;
+ write_insn<big_endian>(p, ld_12_11 + l(off));
+ p += 4;
+ }
+ else
+ {
+ write_insn<big_endian>(p, addis_12_2 + ha(off));
+ p += 4;
+ write_insn<big_endian>(p, ld_12_12 + l(off));
+ p += 4;
+ }
if (plt_load_toc
&& ha(off + 8 + 8 * static_chain) != ha(off))
{
}
else
{
- write_insn<big_endian>(p, addis_11_2 + ha(brltoff)), p += 4;
- write_insn<big_endian>(p, ld_12_11 + l(brltoff)), p += 4;
+ write_insn<big_endian>(p, addis_12_2 + ha(brltoff)), p += 4;
+ write_insn<big_endian>(p, ld_12_12 + l(brltoff)), p += 4;
}
write_insn<big_endian>(p, mtctr_12), p += 4;
write_insn<big_endian>(p, bctr);
case elfcpp::R_PPC64_DTPREL16_HIGHESTA:
case elfcpp::R_PPC64_TLSGD:
case elfcpp::R_PPC64_TLSLD:
+ case elfcpp::R_PPC64_ADDR64_LOCAL:
break;
case elfcpp::R_POWERPC_GOT16:
if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type, target))
|| (size == 64 && is_ifunc && target->abiversion() < 2))
{
- if (gsym->may_need_copy_reloc())
+ if (!parameters->options().output_is_position_independent()
+ && gsym->may_need_copy_reloc())
{
target->copy_reloc(symtab, layout, object,
data_shndx, output_section, gsym, reloc);
// Make a dynamic relocation if necessary.
if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type, target)))
{
- if (gsym->may_need_copy_reloc())
+ if (!parameters->options().output_is_position_independent()
+ && gsym->may_need_copy_reloc())
{
target->copy_reloc(symtab, layout, object,
data_shndx, output_section, gsym,
case elfcpp::R_PPC64_DTPREL16_HIGHESTA:
case elfcpp::R_PPC64_TLSGD:
case elfcpp::R_PPC64_TLSLD:
+ case elfcpp::R_PPC64_ADDR64_LOCAL:
break;
case elfcpp::R_POWERPC_GOT16:
value -= dtp_offset;
break;
+ case elfcpp::R_PPC64_ADDR64_LOCAL:
+ if (gsym != NULL)
+ value += object->ppc64_local_entry_offset(gsym);
+ else
+ value += object->ppc64_local_entry_offset(r_sym);
+ break;
+
default:
break;
}
}
typename Reloc::Overflow_check overflow = Reloc::CHECK_NONE;
+ elfcpp::Shdr<size, big_endian> shdr(relinfo->data_shdr);
switch (r_type)
{
case elfcpp::R_POWERPC_ADDR32:
overflow = Reloc::CHECK_SIGNED;
break;
- case elfcpp::R_POWERPC_ADDR24:
- case elfcpp::R_POWERPC_ADDR16:
case elfcpp::R_POWERPC_UADDR16:
- case elfcpp::R_PPC64_ADDR16_DS:
- case elfcpp::R_POWERPC_ADDR14:
- case elfcpp::R_POWERPC_ADDR14_BRTAKEN:
- case elfcpp::R_POWERPC_ADDR14_BRNTAKEN:
overflow = Reloc::CHECK_BITFIELD;
break;
+ case elfcpp::R_POWERPC_ADDR16:
+ // We really should have three separate relocations,
+ // one for 16-bit data, one for insns with 16-bit signed fields,
+ // and one for insns with 16-bit unsigned fields.
+ overflow = Reloc::CHECK_BITFIELD;
+ if ((shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) != 0)
+ overflow = Reloc::CHECK_LOW_INSN;
+ break;
+
case elfcpp::R_POWERPC_ADDR16_HI:
case elfcpp::R_POWERPC_ADDR16_HA:
case elfcpp::R_POWERPC_GOT16_HI:
case elfcpp::R_POWERPC_GOT_DTPREL16_HA:
case elfcpp::R_POWERPC_REL16_HI:
case elfcpp::R_POWERPC_REL16_HA:
- if (size == 32)
- break;
- case elfcpp::R_POWERPC_REL24:
- case elfcpp::R_PPC_PLTREL24:
- case elfcpp::R_PPC_LOCAL24PC:
+ if (size != 32)
+ overflow = Reloc::CHECK_HIGH_INSN;
+ break;
+
case elfcpp::R_POWERPC_REL16:
case elfcpp::R_PPC64_TOC16:
case elfcpp::R_POWERPC_GOT16:
case elfcpp::R_POWERPC_SECTOFF:
case elfcpp::R_POWERPC_TPREL16:
case elfcpp::R_POWERPC_DTPREL16:
+ case elfcpp::R_POWERPC_GOT_TLSGD16:
+ case elfcpp::R_POWERPC_GOT_TLSLD16:
+ case elfcpp::R_POWERPC_GOT_TPREL16:
+ case elfcpp::R_POWERPC_GOT_DTPREL16:
+ overflow = Reloc::CHECK_LOW_INSN;
+ break;
+
+ case elfcpp::R_POWERPC_ADDR24:
+ case elfcpp::R_POWERPC_ADDR14:
+ case elfcpp::R_POWERPC_ADDR14_BRTAKEN:
+ case elfcpp::R_POWERPC_ADDR14_BRNTAKEN:
+ case elfcpp::R_PPC64_ADDR16_DS:
+ case elfcpp::R_POWERPC_REL24:
+ case elfcpp::R_PPC_PLTREL24:
+ case elfcpp::R_PPC_LOCAL24PC:
case elfcpp::R_PPC64_TPREL16_DS:
case elfcpp::R_PPC64_DTPREL16_DS:
case elfcpp::R_PPC64_TOC16_DS:
case elfcpp::R_POWERPC_REL14:
case elfcpp::R_POWERPC_REL14_BRTAKEN:
case elfcpp::R_POWERPC_REL14_BRNTAKEN:
- case elfcpp::R_POWERPC_GOT_TLSGD16:
- case elfcpp::R_POWERPC_GOT_TLSLD16:
- case elfcpp::R_POWERPC_GOT_TPREL16:
- case elfcpp::R_POWERPC_GOT_DTPREL16:
overflow = Reloc::CHECK_SIGNED;
break;
}
+ if (overflow == Reloc::CHECK_LOW_INSN
+ || overflow == Reloc::CHECK_HIGH_INSN)
+ {
+ Insn* iview = reinterpret_cast<Insn*>(view - 2 * big_endian);
+ Insn insn = elfcpp::Swap<32, big_endian>::readval(iview);
+
+ overflow = Reloc::CHECK_SIGNED;
+ if ((insn & (0x3f << 26)) == 10u << 26 /* cmpli */)
+ overflow = Reloc::CHECK_BITFIELD;
+ else if (overflow == Reloc::CHECK_LOW_INSN
+ ? ((insn & (0x3f << 26)) == 28u << 26 /* andi */
+ || (insn & (0x3f << 26)) == 24u << 26 /* ori */
+ || (insn & (0x3f << 26)) == 26u << 26 /* xori */)
+ : ((insn & (0x3f << 26)) == 29u << 26 /* andis */
+ || (insn & (0x3f << 26)) == 25u << 26 /* oris */
+ || (insn & (0x3f << 26)) == 27u << 26 /* xoris */))
+ overflow = Reloc::CHECK_UNSIGNED;
+ }
+
typename Powerpc_relocate_functions<size, big_endian>::Status status
= Powerpc_relocate_functions<size, big_endian>::STATUS_OK;
switch (r_type)
case elfcpp::R_PPC64_ADDR64:
case elfcpp::R_PPC64_REL64:
case elfcpp::R_PPC64_TOC:
+ case elfcpp::R_PPC64_ADDR64_LOCAL:
Reloc::addr64(view, value);
break;
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