// powerpc.cc -- powerpc target support for gold.
-// Copyright (C) 2008-2016 Free Software Foundation, Inc.
+// Copyright (C) 2008-2017 Free Software Foundation, Inc.
// Written by David S. Miller <davem@davemloft.net>
// and David Edelsohn <edelsohn@gnu.org>
struct Stub_table_owner
{
+ Stub_table_owner()
+ : output_section(NULL), owner(NULL)
+ { }
+
Output_section* output_section;
const Output_section::Input_section* owner;
};
inline bool
is_branch_reloc(unsigned int r_type);
+// Counter incremented on every Powerpc_relobj constructed.
+static uint32_t object_id = 0;
+
template<int size, bool big_endian>
class Powerpc_relobj : public Sized_relobj_file<size, big_endian>
{
Powerpc_relobj(const std::string& name, Input_file* input_file, off_t offset,
const typename elfcpp::Ehdr<size, big_endian>& ehdr)
: Sized_relobj_file<size, big_endian>(name, input_file, offset, ehdr),
- special_(0), has_small_toc_reloc_(false), opd_valid_(false),
- opd_ent_(), access_from_map_(), has14_(), stub_table_index_(),
- e_flags_(ehdr.get_e_flags()), st_other_()
+ uniq_(object_id++), special_(0), relatoc_(0), toc_(0),
+ has_small_toc_reloc_(false), opd_valid_(false),
+ e_flags_(ehdr.get_e_flags()), no_toc_opt_(), opd_ent_(),
+ access_from_map_(), has14_(), stub_table_index_(), st_other_()
{
this->set_abiversion(0);
}
void
do_read_symbols(Read_symbols_data*);
+ // Arrange to always relocate .toc first.
+ virtual void
+ do_relocate_sections(
+ const Symbol_table* symtab, const Layout* layout,
+ const unsigned char* pshdrs, Output_file* of,
+ typename Sized_relobj_file<size, big_endian>::Views* pviews);
+
+ // The .toc section index.
+ unsigned int
+ toc_shndx() const
+ {
+ return this->toc_;
+ }
+
+ // Mark .toc entry at OFF as not optimizable.
+ void
+ set_no_toc_opt(Address off)
+ {
+ if (this->no_toc_opt_.empty())
+ this->no_toc_opt_.resize(this->section_size(this->toc_shndx())
+ / (size / 8));
+ off /= size / 8;
+ if (off < this->no_toc_opt_.size())
+ this->no_toc_opt_[off] = true;
+ }
+
+ // Mark the entire .toc as not optimizable.
+ void
+ set_no_toc_opt()
+ {
+ this->no_toc_opt_.resize(1);
+ this->no_toc_opt_[0] = true;
+ }
+
+ // Return true if code using the .toc entry at OFF should not be edited.
+ bool
+ no_toc_opt(Address off) const
+ {
+ if (this->no_toc_opt_.empty())
+ return false;
+ off /= size / 8;
+ if (off >= this->no_toc_opt_.size())
+ return true;
+ return this->no_toc_opt_[off];
+ }
+
// The .got2 section shndx.
unsigned int
got2_shndx() const
const unsigned char* prelocs,
const unsigned char* plocal_syms);
+ // Returns true if a code sequence loading a TOC entry can be
+ // converted into code calculating a TOC pointer relative offset.
+ bool
+ make_toc_relative(Target_powerpc<size, big_endian>* target,
+ Address* value);
+
// Perform the Sized_relobj_file method, then set up opd info from
// .opd relocs.
void
set_stub_table(unsigned int shndx, unsigned int stub_index)
{
if (shndx >= this->stub_table_index_.size())
- this->stub_table_index_.resize(shndx + 1);
+ this->stub_table_index_.resize(shndx + 1, -1);
this->stub_table_index_[shndx] = stub_index;
}
= static_cast<Target_powerpc<size, big_endian>*>(
parameters->sized_target<size, big_endian>());
unsigned int indx = this->stub_table_index_[shndx];
- gold_assert(indx < target->stub_tables().size());
- return target->stub_tables()[indx];
+ if (indx < target->stub_tables().size())
+ return target->stub_tables()[indx];
}
return NULL;
}
this->stub_table_index_.clear();
}
+ uint32_t
+ uniq() const
+ { return this->uniq_; }
+
int
abiversion() const
{ return this->e_flags_ & elfcpp::EF_PPC64_ABI; }
opd_ent_ndx(size_t off) const
{ return off >> 4;}
+ // Per object unique identifier
+ uint32_t uniq_;
+
// For 32-bit the .got2 section shdnx, for 64-bit the .opd section shndx.
unsigned int special_;
+ // For 64-bit the .rela.toc and .toc section shdnx.
+ unsigned int relatoc_;
+ unsigned int toc_;
+
// For 64-bit, whether this object uses small model relocs to access
// the toc.
bool has_small_toc_reloc_;
// access_from_map_.
bool opd_valid_;
+ // Header e_flags
+ elfcpp::Elf_Word e_flags_;
+
+ // For 64-bit, an array with one entry per 64-bit word in the .toc
+ // section, set if accesses using that word cannot be optimised.
+ std::vector<bool> no_toc_opt_;
+
// The first 8-byte word of an OPD entry gives the address of the
// entry point of the function. Relocatable object files have a
// relocation on this word. The following vector records the
// The stub table to use for a given input section.
std::vector<unsigned int> stub_table_index_;
- // Header e_flags
- elfcpp::Elf_Word e_flags_;
-
// ELF st_other field for local symbols.
std::vector<unsigned char> st_other_;
};
Powerpc_dynobj(const std::string& name, Input_file* input_file, off_t offset,
const typename elfcpp::Ehdr<size, big_endian>& ehdr)
: Sized_dynobj<size, big_endian>(name, input_file, offset, ehdr),
- opd_shndx_(0), opd_ent_(), e_flags_(ehdr.get_e_flags())
+ opd_shndx_(0), e_flags_(ehdr.get_e_flags()), opd_ent_()
{
this->set_abiversion(0);
}
unsigned int opd_shndx_;
Address opd_address_;
+ // Header e_flags
+ elfcpp::Elf_Word e_flags_;
+
// The first 8-byte word of an OPD entry gives the address of the
// entry point of the function. Records the section and offset
// corresponding to the address. Note that in dynamic objects,
// offset is *not* relative to the section.
std::vector<Opd_ent> opd_ent_;
+};
- // Header e_flags
- elfcpp::Elf_Word e_flags_;
+// Powerpc_copy_relocs class. Needed to peek at dynamic relocs the
+// base class will emit.
+
+template<int sh_type, int size, bool big_endian>
+class Powerpc_copy_relocs : public Copy_relocs<sh_type, size, big_endian>
+{
+ public:
+ Powerpc_copy_relocs()
+ : Copy_relocs<sh_type, size, big_endian>(elfcpp::R_POWERPC_COPY)
+ { }
+
+ // Emit any saved relocations which turn out to be needed. This is
+ // called after all the relocs have been scanned.
+ void
+ emit(Output_data_reloc<sh_type, true, size, big_endian>*);
};
template<int size, bool big_endian>
Target_powerpc()
: Sized_target<size, big_endian>(&powerpc_info),
got_(NULL), plt_(NULL), iplt_(NULL), brlt_section_(NULL),
- glink_(NULL), rela_dyn_(NULL), copy_relocs_(elfcpp::R_POWERPC_COPY),
+ glink_(NULL), rela_dyn_(NULL), copy_relocs_(),
tlsld_got_offset_(-1U),
stub_tables_(), branch_lookup_table_(), branch_info_(),
plt_thread_safe_(false), relax_failed_(false), relax_fail_count_(0),
}
}
+ // Wrapper used after relax to define a local symbol in output data,
+ // from the end if value < 0.
+ void
+ define_local(Symbol_table* symtab, const char* name,
+ Output_data* od, Address value, unsigned int symsize)
+ {
+ Symbol* sym
+ = symtab->define_in_output_data(name, NULL, Symbol_table::PREDEFINED,
+ od, value, symsize, elfcpp::STT_NOTYPE,
+ elfcpp::STB_LOCAL, elfcpp::STV_HIDDEN, 0,
+ static_cast<Signed_address>(value) < 0,
+ false);
+ // We are creating this symbol late, so need to fix up things
+ // done early in Layout::finalize.
+ sym->set_dynsym_index(-1U);
+ }
+
bool
plt_thread_safe() const
{ return this->plt_thread_safe_; }
// The dynamic reloc section.
Reloc_section* rela_dyn_;
// Relocs saved to avoid a COPY reloc.
- Copy_relocs<elfcpp::SHT_RELA, size, big_endian> copy_relocs_;
+ Powerpc_copy_relocs<elfcpp::SHT_RELA, size, big_endian> copy_relocs_;
// Offset of the GOT entry for local dynamic __tls_get_addr calls.
unsigned int tlsld_got_offset_;
}
}
-// Stash away the index of .got2 or .opd in a relocatable object, if
-// such a section exists.
+// Stash away the index of .got2, .opd, .rela.toc, and .toc in a
+// relocatable object, if such sections exists.
template<int size, bool big_endian>
bool
this->name().c_str(), this->abiversion());
}
}
+ if (size == 64)
+ {
+ s = this->template find_shdr<size, big_endian>(pshdrs, ".rela.toc",
+ names, names_size, NULL);
+ if (s != NULL)
+ {
+ unsigned int ndx = (s - pshdrs) / elfcpp::Elf_sizes<size>::shdr_size;
+ this->relatoc_ = ndx;
+ typename elfcpp::Shdr<size, big_endian> shdr(s);
+ this->toc_ = this->adjust_shndx(shdr.get_sh_info());
+ }
+ }
return Sized_relobj_file<size, big_endian>::do_find_special_sections(sd);
}
{
if (size == 64)
{
- typedef typename Reloc_types<elfcpp::SHT_RELA, size, big_endian>::Reloc
- Reltype;
- const int reloc_size
- = Reloc_types<elfcpp::SHT_RELA, size, big_endian>::reloc_size;
+ typedef typename elfcpp::Rela<size, big_endian> Reltype;
+ const int reloc_size = elfcpp::Elf_sizes<size>::rela_size;
const int sym_size = elfcpp::Elf_sizes<size>::sym_size;
Address expected_off = 0;
bool regular = true;
}
}
+// Returns true if a code sequence loading the TOC entry at VALUE
+// relative to the TOC pointer can be converted into code calculating
+// a TOC pointer relative offset.
+// If so, the TOC pointer relative offset is stored to VALUE.
+
+template<int size, bool big_endian>
+bool
+Powerpc_relobj<size, big_endian>::make_toc_relative(
+ Target_powerpc<size, big_endian>* target,
+ Address* value)
+{
+ if (size != 64)
+ return false;
+
+ // With -mcmodel=medium code it is quite possible to have
+ // toc-relative relocs referring to objects outside the TOC.
+ // Don't try to look at a non-existent TOC.
+ if (this->toc_shndx() == 0)
+ return false;
+
+ // Convert VALUE back to an address by adding got_base (see below),
+ // then to an offset in the TOC by subtracting the TOC output
+ // section address and the TOC output offset. Since this TOC output
+ // section and the got output section are one and the same, we can
+ // omit adding and subtracting the output section address.
+ Address off = (*value + this->toc_base_offset()
+ - this->output_section_offset(this->toc_shndx()));
+ // Is this offset in the TOC? -mcmodel=medium code may be using
+ // TOC relative access to variables outside the TOC. Those of
+ // course can't be optimized. We also don't try to optimize code
+ // that is using a different object's TOC.
+ if (off >= this->section_size(this->toc_shndx()))
+ return false;
+
+ if (this->no_toc_opt(off))
+ return false;
+
+ section_size_type vlen;
+ unsigned char* view = this->get_output_view(this->toc_shndx(), &vlen);
+ Address addr = elfcpp::Swap<size, big_endian>::readval(view + off);
+ // The TOC pointer
+ Address got_base = (target->got_section()->output_section()->address()
+ + this->toc_base_offset());
+ addr -= got_base;
+ if (addr + (uint64_t) 0x80008000 >= (uint64_t) 1 << 32)
+ return false;
+
+ *value = addr;
+ return true;
+}
+
+// Perform the Sized_relobj_file method, then set up opd info from
+// .opd relocs.
+
template<int size, bool big_endian>
void
Powerpc_relobj<size, big_endian>::do_read_relocs(Read_relocs_data* rd)
}
}
+// Relocate sections.
+
+template<int size, bool big_endian>
+void
+Powerpc_relobj<size, big_endian>::do_relocate_sections(
+ const Symbol_table* symtab, const Layout* layout,
+ const unsigned char* pshdrs, Output_file* of,
+ typename Sized_relobj_file<size, big_endian>::Views* pviews)
+{
+ unsigned int start = 1;
+ if (size == 64
+ && this->relatoc_ != 0
+ && !parameters->options().relocatable())
+ {
+ // Relocate .toc first.
+ this->relocate_section_range(symtab, layout, pshdrs, of, pviews,
+ this->relatoc_, this->relatoc_);
+ this->relocate_section_range(symtab, layout, pshdrs, of, pviews,
+ 1, this->relatoc_ - 1);
+ start = this->relatoc_ + 1;
+ }
+ this->relocate_section_range(symtab, layout, pshdrs, of, pviews,
+ start, this->shnum() - 1);
+}
+
// Set up some symbols.
template<int size, bool big_endian>
public:
// Determine the stub group size. The group size is the absolute
// value of the parameter --stub-group-size. If --stub-group-size
- // is passed a negative value, we restrict stubs to be always before
+ // is passed a negative value, we restrict stubs to be always after
// the stubbed branches.
- Stub_control(int32_t size, bool no_size_errors)
- : state_(NO_GROUP), stub_group_size_(abs(size)),
- stubs_always_before_branch_(size < 0),
- suppress_size_errors_(no_size_errors), group_size_(0),
- group_end_addr_(0), owner_(NULL), output_section_(NULL)
+ Stub_control(int32_t size, bool no_size_errors, bool multi_os)
+ : stub_group_size_(abs(size)), stubs_always_after_branch_(size < 0),
+ suppress_size_errors_(no_size_errors), multi_os_(multi_os),
+ state_(NO_GROUP), group_size_(0), group_start_addr_(0),
+ owner_(NULL), output_section_(NULL)
{
}
private:
typedef enum
{
+ // Initial state.
NO_GROUP,
+ // Adding group sections before the stubs.
FINDING_STUB_SECTION,
+ // Adding group sections after the stubs.
HAS_STUB_SECTION
} State;
- State state_;
uint32_t stub_group_size_;
- bool stubs_always_before_branch_;
+ bool stubs_always_after_branch_;
bool suppress_size_errors_;
+ // True if a stub group can serve multiple output sections.
+ bool multi_os_;
+ State state_;
// Current max size of group. Starts at stub_group_size_ but is
// reduced to stub_group_size_/1024 on seeing a section with
// external conditional branches.
uint32_t group_size_;
- uint64_t group_end_addr_;
+ uint64_t group_start_addr_;
// owner_ and output_section_ specify the section to which stubs are
// attached. The stubs are placed at the end of this section.
const Output_section::Input_section* owner_;
};
// Return true iff input section can be handled by current stub
-// group. Sections are presented to this function in reverse order,
-// so the first section is the tail of the group.
+// group. Sections are presented to this function in order,
+// so the first section is the head of the group.
bool
Stub_control::can_add_to_stub_group(Output_section* o,
this_size = i->data_size();
}
+ uint64_t end_addr = start_addr + this_size;
uint32_t group_size = this->stub_group_size_;
if (has14)
this->group_size_ = group_size = group_size >> 10;
i->relobj()->name().c_str(),
i->relobj()->section_name(i->shndx()).c_str(),
(long long) this_size,
- (long long) this->group_end_addr_ - start_addr);
-
- uint64_t end_addr = start_addr + this_size;
- if (this->state_ == HAS_STUB_SECTION)
+ (this->state_ == NO_GROUP
+ ? this_size
+ : (long long) end_addr - this->group_start_addr_));
+
+ if (this->state_ == NO_GROUP)
+ {
+ // Only here on very first use of Stub_control
+ this->owner_ = i;
+ this->output_section_ = o;
+ this->state_ = FINDING_STUB_SECTION;
+ this->group_size_ = group_size;
+ this->group_start_addr_ = start_addr;
+ return true;
+ }
+ else if (!this->multi_os_ && this->output_section_ != o)
+ ;
+ else if (this->state_ == HAS_STUB_SECTION)
{
- // Can we add this section, which is before the stubs, to the
+ // Can we add this section, which is after the stubs, to the
// group?
- if (this->group_end_addr_ - start_addr <= this->group_size_)
+ if (end_addr - this->group_start_addr_ <= this->group_size_)
return true;
}
- else
+ else if (this->state_ == FINDING_STUB_SECTION)
{
- // Stubs are added at the end of "owner_".
- // The current section can always be the stub owner, except when
- // whole_sec is true and the current section isn't the last of
- // the pasted sections. (This restriction for the whole_sec
- // case is just to simplify the corner case mentioned in
- // group_sections.)
- // Note that "owner_" itself is not necessarily part of the
- // group of sections served by these stubs!
- if (!whole_sec || this->output_section_ != o)
+ if ((whole_sec && this->output_section_ == o)
+ || end_addr - this->group_start_addr_ <= this->group_size_)
{
+ // Stubs are added at the end of "owner_".
this->owner_ = i;
this->output_section_ = o;
+ return true;
}
-
- if (this->state_ == FINDING_STUB_SECTION)
- {
- if (this->group_end_addr_ - start_addr <= this->group_size_)
- return true;
- // The group after the stubs has reached maximum size.
- // Now see about adding sections before the stubs to the
- // group. If the current section has a 14-bit branch and
- // the group after the stubs exceeds group_size_ (because
- // they didn't have 14-bit branches), don't add sections
- // before the stubs: The size of stubs for such a large
- // group may exceed the reach of a 14-bit branch.
- if (!this->stubs_always_before_branch_
- && this_size <= this->group_size_
- && this->group_end_addr_ - end_addr <= this->group_size_)
- {
- gold_debug(DEBUG_TARGET, "adding before stubs");
- this->state_ = HAS_STUB_SECTION;
- this->group_end_addr_ = end_addr;
- return true;
- }
- }
- else if (this->state_ == NO_GROUP)
+ // The group before the stubs has reached maximum size.
+ // Now see about adding sections after the stubs to the
+ // group. If the current section has a 14-bit branch and
+ // the group before the stubs exceeds group_size_ (because
+ // they didn't have 14-bit branches), don't add sections
+ // after the stubs: The size of stubs for such a large
+ // group may exceed the reach of a 14-bit branch.
+ if (!this->stubs_always_after_branch_
+ && this_size <= this->group_size_
+ && start_addr - this->group_start_addr_ <= this->group_size_)
{
- // Only here on very first use of Stub_control
- this->state_ = FINDING_STUB_SECTION;
- this->group_size_ = group_size;
- this->group_end_addr_ = end_addr;
+ gold_debug(DEBUG_TARGET, "adding after stubs");
+ this->state_ = HAS_STUB_SECTION;
+ this->group_start_addr_ = start_addr;
return true;
}
- else
- gold_unreachable();
}
+ else
+ gold_unreachable();
- gold_debug(DEBUG_TARGET, "nope, didn't fit\n");
+ gold_debug(DEBUG_TARGET,
+ !this->multi_os_ && this->output_section_ != o
+ ? "nope, new output section\n"
+ : "nope, didn't fit\n");
// The section fails to fit in the current group. Set up a few
// things for the next group. owner_ and output_section_ will be
// group.
this->state_ = FINDING_STUB_SECTION;
this->group_size_ = group_size;
- this->group_end_addr_ = end_addr;
+ this->group_start_addr_ = start_addr;
return false;
}
const Task*,
bool no_size_errors)
{
- Stub_control stub_control(this->stub_group_size_, no_size_errors);
+ Stub_control stub_control(this->stub_group_size_, no_size_errors,
+ parameters->options().stub_group_multi());
// Group input sections and insert stub table
Stub_table_owner* table_owner = NULL;
Layout::Section_list section_list;
layout->get_executable_sections(§ion_list);
std::stable_sort(section_list.begin(), section_list.end(), Sort_sections());
- for (Layout::Section_list::reverse_iterator o = section_list.rbegin();
- o != section_list.rend();
+ for (Layout::Section_list::iterator o = section_list.begin();
+ o != section_list.end();
++o)
{
typedef Output_section::Input_section_list Input_section_list;
- for (Input_section_list::const_reverse_iterator i
- = (*o)->input_sections().rbegin();
- i != (*o)->input_sections().rend();
+ for (Input_section_list::const_iterator i
+ = (*o)->input_sections().begin();
+ i != (*o)->input_sections().end();
++i)
{
if (i->is_input_section()
}
if (table_owner != NULL)
{
- const Output_section::Input_section* i = stub_control.owner();
-
- if (tables.size() >= 2 && tables[tables.size() - 2]->owner == i)
- {
- // Corner case. A new stub group was made for the first
- // section (last one looked at here) for some reason, but
- // the first section is already being used as the owner for
- // a stub table for following sections. Force it into that
- // stub group.
- tables.pop_back();
- delete table_owner;
- Powerpc_relobj<size, big_endian>* ppcobj = static_cast
- <Powerpc_relobj<size, big_endian>*>(i->relobj());
- ppcobj->set_stub_table(i->shndx(), tables.size() - 1);
- }
- else
- {
- table_owner->output_section = stub_control.output_section();
- table_owner->owner = i;
- }
+ table_owner->output_section = stub_control.output_section();
+ table_owner->owner = stub_control.owner();;
}
for (typename std::vector<Stub_table_owner*>::iterator t = tables.begin();
t != tables.end();
if ((*t)->owner->is_input_section())
stub_table = new Stub_table<size, big_endian>(this,
(*t)->output_section,
- (*t)->owner);
+ (*t)->owner,
+ this->stub_tables_.size());
else if ((*t)->owner->is_relaxed_input_section())
stub_table = static_cast<Stub_table<size, big_endian>*>(
(*t)->owner->relaxed_input_section());
Target_powerpc<size, big_endian>* target =
static_cast<Target_powerpc<size, big_endian>*>(
parameters->sized_target<size, big_endian>());
+ bool ok = true;
+
if (gsym != NULL
? gsym->use_plt_offset(Scan::get_reference_flags(this->r_type_, target))
: this->object_->local_has_plt_offset(this->r_sym_))
from += (this->object_->output_section(this->shndx_)->address()
+ this->offset_);
if (gsym != NULL)
- return stub_table->add_plt_call_entry(from,
- this->object_, gsym,
- this->r_type_, this->addend_);
+ ok = stub_table->add_plt_call_entry(from,
+ this->object_, gsym,
+ this->r_type_, this->addend_);
else
- return stub_table->add_plt_call_entry(from,
- this->object_, this->r_sym_,
- this->r_type_, this->addend_);
+ ok = stub_table->add_plt_call_entry(from,
+ this->object_, this->r_sym_,
+ this->r_type_, this->addend_);
}
}
else
&& gsym != NULL
&& gsym->source() == Symbol::IN_OUTPUT_DATA
&& gsym->output_data() == target->savres_section());
- return stub_table->add_long_branch_entry(this->object_,
- this->r_type_,
- from, to, save_res);
+ ok = stub_table->add_long_branch_entry(this->object_,
+ this->r_type_,
+ from, to, save_res);
}
}
- return true;
+ if (!ok)
+ gold_debug(DEBUG_TARGET,
+ "branch at %s:%s+%#lx\n"
+ "can't reach stub attached to %s:%s",
+ this->object_->name().c_str(),
+ this->object_->section_name(this->shndx_).c_str(),
+ (unsigned long) this->offset_,
+ stub_table->relobj()->name().c_str(),
+ stub_table->relobj()->section_name(stub_table->shndx()).c_str());
+
+ return ok;
}
// Relaxation hook. This is where we do stub generation.
}
this->brlt_section_->finalize_brlt_sizes();
}
+
+ if (!again
+ && (parameters->options().user_set_emit_stub_syms()
+ ? parameters->options().emit_stub_syms()
+ : (size == 64
+ || parameters->options().output_is_position_independent()
+ || parameters->options().emit_relocs())))
+ {
+ for (typename Stub_tables::iterator p = this->stub_tables_.begin();
+ p != this->stub_tables_.end();
+ ++p)
+ (*p)->define_stub_syms(symtab);
+
+ if (this->glink_ != NULL)
+ {
+ int stub_size = this->glink_->pltresolve_size;
+ Address value = -stub_size;
+ if (size == 64)
+ {
+ value = 8;
+ stub_size -= 8;
+ }
+ this->define_local(symtab, "__glink_PLTresolve",
+ this->glink_, value, stub_size);
+
+ if (size != 64)
+ this->define_local(symtab, "__glink", this->glink_, 0, 0);
+ }
+ }
+
return again;
}
? ORDER_SMALL_DATA
: ORDER_SMALL_BSS),
false);
+
+ Output_section* rela_plt_os = plt_rel->output_section();
+ rela_plt_os->set_info_section(this->plt_->output_section());
}
}
this->make_plt_section(symtab, layout);
Reloc_section* iplt_rel = new Reloc_section(false);
- this->rela_dyn_->output_section()->add_output_section_data(iplt_rel);
+ if (this->rela_dyn_->output_section())
+ this->rela_dyn_->output_section()->add_output_section_data(iplt_rel);
this->iplt_
= new Output_data_plt_powerpc<size, big_endian>(this, iplt_rel,
"** IPLT");
- this->plt_->output_section()->add_output_section_data(this->iplt_);
+ if (this->plt_->output_section())
+ this->plt_->output_section()->add_output_section_data(this->iplt_);
}
}
os->set_section_offsets_need_adjustment();
if (this->rel_ != NULL)
{
- unsigned int reloc_size
- = Reloc_types<elfcpp::SHT_RELA, size, big_endian>::reloc_size;
+ const unsigned int reloc_size = elfcpp::Elf_sizes<size>::rela_size;
this->rel_->reset_address_and_file_offset();
this->rel_->set_current_data_size(num_branches * reloc_size);
this->rel_->finalize_data_size();
{
// When PIC we can't fill in .branch_lt (like .plt it can be
// a bss style section) but must initialise at runtime via
- // dynamic relocats.
+ // dynamic relocations.
this->rela_dyn_section(layout);
brlt_rel = new Reloc_section(false);
- this->rela_dyn_->output_section()->add_output_section_data(brlt_rel);
+ if (this->rela_dyn_->output_section())
+ this->rela_dyn_->output_section()
+ ->add_output_section_data(brlt_rel);
}
this->brlt_section_
= new Output_data_brlt_powerpc<size, big_endian>(this, brlt_rel);
- if (this->plt_ && is_pic)
+ if (this->plt_ && is_pic && this->plt_->output_section())
this->plt_->output_section()
->add_output_section_data(this->brlt_section_);
else
Stub_table(Target_powerpc<size, big_endian>* targ,
Output_section* output_section,
- const Output_section::Input_section* owner)
+ const Output_section::Input_section* owner,
+ uint32_t id)
: Output_relaxed_input_section(owner->relobj(), owner->shndx(),
owner->relobj()
->section_addralign(owner->shndx())),
orig_data_size_(owner->current_data_size()),
plt_size_(0), last_plt_size_(0),
branch_size_(0), last_branch_size_(0), min_size_threshold_(0),
- eh_frame_added_(false), need_save_res_(false)
+ eh_frame_added_(false), need_save_res_(false), uniq_(id)
{
this->set_output_section(output_section);
plt_size() const
{ return this->plt_size_; }
- void set_min_size_threshold(Address min_size)
+ void
+ set_min_size_threshold(Address min_size)
{ this->min_size_threshold_ = min_size; }
+ void
+ define_stub_syms(Symbol_table*);
+
bool
size_update()
{
class Plt_stub_ent_hash;
typedef Unordered_map<Plt_stub_ent, unsigned int,
Plt_stub_ent_hash> Plt_stub_entries;
+ class Branch_stub_ent;
+ class Branch_stub_ent_hash;
+ typedef Unordered_map<Branch_stub_ent, unsigned int,
+ Branch_stub_ent_hash> Branch_stub_entries;
// Alignment of stub section.
unsigned int
// Return long branch stub size.
unsigned int
- branch_stub_size(Address to)
+ branch_stub_size(typename Branch_stub_entries::const_iterator p)
{
- Address loc
- = this->stub_address() + this->last_plt_size_ + this->branch_size_;
- if (to - loc + (1 << 25) < 2 << 25)
+ Address loc = this->stub_address() + this->last_plt_size_ + p->second;
+ if (p->first.dest_ - loc + (1 << 25) < 2 << 25)
return 4;
if (size == 64 || !parameters->options().output_is_position_independent())
return 16;
const Sized_relobj_file<size, big_endian>* object_;
typename elfcpp::Elf_types<size>::Elf_Addr addend_;
unsigned int locsym_;
+ unsigned int indx_;
};
class Plt_stub_ent_hash
// Map sym/object/addend to stub offset.
Plt_stub_entries plt_call_stubs_;
// Map destination address to stub offset.
- typedef Unordered_map<Branch_stub_ent, unsigned int,
- Branch_stub_ent_hash> Branch_stub_entries;
Branch_stub_entries long_branch_stubs_;
// size of input section
section_size_type orig_data_size_;
// Set if this stub group needs a copy of out-of-line register
// save/restore functions.
bool need_save_res_;
+ // Per stub table unique identifier.
+ uint32_t uniq_;
};
// Add a plt call stub, if we do not already have one for this
{
Plt_stub_ent ent(object, gsym, r_type, addend);
unsigned int off = this->plt_size_;
+ ent.indx_ = this->plt_call_stubs_.size();
std::pair<typename Plt_stub_entries::iterator, bool> p
= this->plt_call_stubs_.insert(std::make_pair(ent, off));
if (p.second)
{
Plt_stub_ent ent(object, locsym_index, r_type, addend);
unsigned int off = this->plt_size_;
+ ent.indx_ = this->plt_call_stubs_.size();
std::pair<typename Plt_stub_entries::iterator, bool> p
= this->plt_call_stubs_.insert(std::make_pair(ent, off));
if (p.second)
{
Branch_stub_ent ent(object, to, save_res);
Address off = this->branch_size_;
- if (this->long_branch_stubs_.insert(std::make_pair(ent, off)).second)
+ std::pair<typename Branch_stub_entries::iterator, bool> p
+ = this->long_branch_stubs_.insert(std::make_pair(ent, off));
+ if (p.second)
{
if (save_res)
this->need_save_res_ = true;
else
{
- unsigned int stub_size = this->branch_stub_size(to);
+ unsigned int stub_size = this->branch_stub_size(p.first);
this->branch_size_ = off + stub_size;
if (size == 64 && stub_size != 4)
this->targ_->add_branch_lookup_table(to);
this->set_data_size(total);
}
+// Define symbols on stubs, identifying the stub.
+
+template<int size, bool big_endian>
+void
+Stub_table<size, big_endian>::define_stub_syms(Symbol_table* symtab)
+{
+ if (!this->plt_call_stubs_.empty())
+ {
+ // The key for the plt call stub hash table includes addresses,
+ // therefore traversal order depends on those addresses, which
+ // can change between runs if gold is a PIE. Unfortunately the
+ // output .symtab ordering depends on the order in which symbols
+ // are added to the linker symtab. We want reproducible output
+ // so must sort the call stub symbols.
+ typedef typename Plt_stub_entries::const_iterator plt_iter;
+ std::vector<plt_iter> sorted;
+ sorted.resize(this->plt_call_stubs_.size());
+
+ for (plt_iter cs = this->plt_call_stubs_.begin();
+ cs != this->plt_call_stubs_.end();
+ ++cs)
+ sorted[cs->first.indx_] = cs;
+
+ for (unsigned int i = 0; i < this->plt_call_stubs_.size(); ++i)
+ {
+ plt_iter cs = sorted[i];
+ char add[10];
+ add[0] = 0;
+ if (cs->first.addend_ != 0)
+ sprintf(add, "+%x", static_cast<uint32_t>(cs->first.addend_));
+ char localname[18];
+ const char *symname;
+ if (cs->first.sym_ == NULL)
+ {
+ const Powerpc_relobj<size, big_endian>* ppcobj = static_cast
+ <const Powerpc_relobj<size, big_endian>*>(cs->first.object_);
+ sprintf(localname, "%x:%x", ppcobj->uniq(), cs->first.locsym_);
+ symname = localname;
+ }
+ else
+ symname = cs->first.sym_->name();
+ char* name = new char[8 + 10 + strlen(symname) + strlen(add) + 1];
+ sprintf(name, "%08x.plt_call.%s%s", this->uniq_, symname, add);
+ Address value = this->stub_address() - this->address() + cs->second;
+ unsigned int stub_size = this->plt_call_size(cs);
+ this->targ_->define_local(symtab, name, this, value, stub_size);
+ }
+ }
+
+ typedef typename Branch_stub_entries::const_iterator branch_iter;
+ for (branch_iter bs = this->long_branch_stubs_.begin();
+ bs != this->long_branch_stubs_.end();
+ ++bs)
+ {
+ if (bs->first.save_res_)
+ continue;
+
+ char* name = new char[8 + 13 + 16 + 1];
+ sprintf(name, "%08x.long_branch.%llx", this->uniq_,
+ static_cast<unsigned long long>(bs->first.dest_));
+ Address value = (this->stub_address() - this->address()
+ + this->plt_size_ + bs->second);
+ unsigned int stub_size = this->branch_stub_size(bs);
+ this->targ_->define_local(symtab, name, this, value, stub_size);
+ }
+}
+
// Write out plt and long branch stub code.
template<int size, bool big_endian>
return false;
}
+// Return TRUE iff INSN is one we expect on a _LO variety toc/got
+// reloc.
+
+static bool
+ok_lo_toc_insn(uint32_t insn, unsigned int r_type)
+{
+ return ((insn & (0x3f << 26)) == 12u << 26 /* addic */
+ || (insn & (0x3f << 26)) == 14u << 26 /* addi */
+ || (insn & (0x3f << 26)) == 32u << 26 /* lwz */
+ || (insn & (0x3f << 26)) == 34u << 26 /* lbz */
+ || (insn & (0x3f << 26)) == 36u << 26 /* stw */
+ || (insn & (0x3f << 26)) == 38u << 26 /* stb */
+ || (insn & (0x3f << 26)) == 40u << 26 /* lhz */
+ || (insn & (0x3f << 26)) == 42u << 26 /* lha */
+ || (insn & (0x3f << 26)) == 44u << 26 /* sth */
+ || (insn & (0x3f << 26)) == 46u << 26 /* lmw */
+ || (insn & (0x3f << 26)) == 47u << 26 /* stmw */
+ || (insn & (0x3f << 26)) == 48u << 26 /* lfs */
+ || (insn & (0x3f << 26)) == 50u << 26 /* lfd */
+ || (insn & (0x3f << 26)) == 52u << 26 /* stfs */
+ || (insn & (0x3f << 26)) == 54u << 26 /* stfd */
+ || (insn & (0x3f << 26)) == 56u << 26 /* lq,lfq */
+ || ((insn & (0x3f << 26)) == 57u << 26 /* lxsd,lxssp,lfdp */
+ /* Exclude lfqu by testing reloc. If relocs are ever
+ defined for the reduced D field in psq_lu then those
+ will need testing too. */
+ && r_type != elfcpp::R_PPC64_TOC16_LO
+ && r_type != elfcpp::R_POWERPC_GOT16_LO)
+ || ((insn & (0x3f << 26)) == 58u << 26 /* ld,lwa */
+ && (insn & 1) == 0)
+ || (insn & (0x3f << 26)) == 60u << 26 /* stfq */
+ || ((insn & (0x3f << 26)) == 61u << 26 /* lxv,stx{v,sd,ssp},stfdp */
+ /* Exclude stfqu. psq_stu as above for psq_lu. */
+ && r_type != elfcpp::R_PPC64_TOC16_LO
+ && r_type != elfcpp::R_POWERPC_GOT16_LO)
+ || ((insn & (0x3f << 26)) == 62u << 26 /* std,stq */
+ && (insn & 1) == 0));
+}
+
// Scan a relocation for a local symbol.
template<int size, bool big_endian>
case elfcpp::R_POWERPC_REL14_BRTAKEN:
case elfcpp::R_POWERPC_REL14_BRNTAKEN:
if (!is_ifunc)
- target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(),
- r_type, elfcpp::elf_r_sym<size>(reloc.get_r_info()),
- reloc.get_r_addend());
+ {
+ unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
+ target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(),
+ r_type, r_sym, reloc.get_r_addend());
+ }
break;
case elfcpp::R_PPC64_REL64:
break;
}
+ if (size == 64
+ && parameters->options().toc_optimize())
+ {
+ if (data_shndx == ppc_object->toc_shndx())
+ {
+ bool ok = true;
+ if (r_type != elfcpp::R_PPC64_ADDR64
+ || (is_ifunc && target->abiversion() < 2))
+ ok = false;
+ else if (parameters->options().output_is_position_independent())
+ {
+ if (is_ifunc)
+ ok = false;
+ else
+ {
+ unsigned int shndx = lsym.get_st_shndx();
+ if (shndx >= elfcpp::SHN_LORESERVE
+ && shndx != elfcpp::SHN_XINDEX)
+ ok = false;
+ }
+ }
+ if (!ok)
+ ppc_object->set_no_toc_opt(reloc.get_r_offset());
+ }
+
+ enum {no_check, check_lo, check_ha} insn_check;
+ switch (r_type)
+ {
+ default:
+ insn_check = no_check;
+ break;
+
+ case elfcpp::R_POWERPC_GOT_TLSLD16_HA:
+ case elfcpp::R_POWERPC_GOT_TLSGD16_HA:
+ case elfcpp::R_POWERPC_GOT_TPREL16_HA:
+ case elfcpp::R_POWERPC_GOT_DTPREL16_HA:
+ case elfcpp::R_POWERPC_GOT16_HA:
+ case elfcpp::R_PPC64_TOC16_HA:
+ insn_check = check_ha;
+ break;
+
+ case elfcpp::R_POWERPC_GOT_TLSLD16_LO:
+ case elfcpp::R_POWERPC_GOT_TLSGD16_LO:
+ case elfcpp::R_POWERPC_GOT_TPREL16_LO:
+ case elfcpp::R_POWERPC_GOT_DTPREL16_LO:
+ case elfcpp::R_POWERPC_GOT16_LO:
+ case elfcpp::R_PPC64_GOT16_LO_DS:
+ case elfcpp::R_PPC64_TOC16_LO:
+ case elfcpp::R_PPC64_TOC16_LO_DS:
+ insn_check = check_lo;
+ break;
+ }
+
+ section_size_type slen;
+ const unsigned char* view = NULL;
+ if (insn_check != no_check)
+ {
+ view = ppc_object->section_contents(data_shndx, &slen, false);
+ section_size_type off =
+ convert_to_section_size_type(reloc.get_r_offset()) & -4;
+ if (off < slen)
+ {
+ uint32_t insn = elfcpp::Swap<32, big_endian>::readval(view + off);
+ if (insn_check == check_lo
+ ? !ok_lo_toc_insn(insn, r_type)
+ : ((insn & ((0x3f << 26) | 0x1f << 16))
+ != ((15u << 26) | (2 << 16)) /* addis rt,2,imm */))
+ {
+ ppc_object->set_no_toc_opt();
+ gold_warning(_("%s: toc optimization is not supported "
+ "for %#08x instruction"),
+ ppc_object->name().c_str(), insn);
+ }
+ }
+ }
+
+ switch (r_type)
+ {
+ default:
+ break;
+ case elfcpp::R_PPC64_TOC16:
+ case elfcpp::R_PPC64_TOC16_LO:
+ case elfcpp::R_PPC64_TOC16_HI:
+ case elfcpp::R_PPC64_TOC16_HA:
+ case elfcpp::R_PPC64_TOC16_DS:
+ case elfcpp::R_PPC64_TOC16_LO_DS:
+ unsigned int shndx = lsym.get_st_shndx();
+ unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
+ bool is_ordinary;
+ shndx = ppc_object->adjust_sym_shndx(r_sym, shndx, &is_ordinary);
+ if (is_ordinary && shndx == ppc_object->toc_shndx())
+ {
+ Address dst_off = lsym.get_st_value() + reloc.get_r_offset();
+ if (dst_off < ppc_object->section_size(shndx))
+ {
+ bool ok = false;
+ if (r_type == elfcpp::R_PPC64_TOC16_HA)
+ ok = true;
+ else if (r_type == elfcpp::R_PPC64_TOC16_LO_DS)
+ {
+ // Need to check that the insn is a ld
+ if (!view)
+ view = ppc_object->section_contents(data_shndx,
+ &slen,
+ false);
+ section_size_type off =
+ (convert_to_section_size_type(reloc.get_r_offset())
+ + (big_endian ? -2 : 3));
+ if (off < slen
+ && (view[off] & (0x3f << 2)) == 58u << 2)
+ ok = true;
+ }
+ if (!ok)
+ ppc_object->set_no_toc_opt(dst_off);
+ }
+ }
+ break;
+ }
+ }
+
+ if (size == 32)
+ {
+ switch (r_type)
+ {
+ case elfcpp::R_POWERPC_REL32:
+ if (ppc_object->got2_shndx() != 0
+ && parameters->options().output_is_position_independent())
+ {
+ unsigned int shndx = lsym.get_st_shndx();
+ unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
+ bool is_ordinary;
+ shndx = ppc_object->adjust_sym_shndx(r_sym, shndx, &is_ordinary);
+ if (is_ordinary && shndx == ppc_object->got2_shndx()
+ && (ppc_object->section_flags(data_shndx)
+ & elfcpp::SHF_EXECINSTR) != 0)
+ gold_error(_("%s: unsupported -mbss-plt code"),
+ ppc_object->name().c_str());
+ }
+ break;
+ default:
+ break;
+ }
+ }
+
switch (r_type)
{
case elfcpp::R_POWERPC_GOT_TLSLD16:
bool pushed_ifunc = false;
if (is_ifunc && this->reloc_needs_plt_for_ifunc(target, object, r_type, true))
{
+ unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(),
- r_type, elfcpp::elf_r_sym<size>(reloc.get_r_info()),
- reloc.get_r_addend());
+ r_type, r_sym, reloc.get_r_addend());
target->make_plt_entry(symtab, layout, gsym);
pushed_ifunc = true;
}
}
if (!is_ifunc || (!pushed_ifunc && need_ifunc_plt))
{
+ unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
target->push_branch(ppc_object, data_shndx,
- reloc.get_r_offset(), r_type,
- elfcpp::elf_r_sym<size>(reloc.get_r_info()),
+ reloc.get_r_offset(), r_type, r_sym,
reloc.get_r_addend());
target->make_plt_entry(symtab, layout, gsym);
}
object, data_shndx,
reloc.get_r_offset(),
reloc.get_r_addend());
+
+ if (size == 64
+ && parameters->options().toc_optimize()
+ && data_shndx == ppc_object->toc_shndx())
+ ppc_object->set_no_toc_opt(reloc.get_r_offset());
}
}
}
case elfcpp::R_POWERPC_REL24:
if (!is_ifunc)
{
+ unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(),
- r_type,
- elfcpp::elf_r_sym<size>(reloc.get_r_info()),
- reloc.get_r_addend());
+ r_type, r_sym, reloc.get_r_addend());
if (gsym->needs_plt_entry()
|| (!gsym->final_value_is_known()
&& (gsym->is_undefined()
case elfcpp::R_POWERPC_REL14_BRTAKEN:
case elfcpp::R_POWERPC_REL14_BRNTAKEN:
if (!is_ifunc)
- target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(),
- r_type, elfcpp::elf_r_sym<size>(reloc.get_r_info()),
- reloc.get_r_addend());
+ {
+ unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
+ target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(),
+ r_type, r_sym, reloc.get_r_addend());
+ }
break;
case elfcpp::R_POWERPC_REL16:
break;
}
+ if (size == 64
+ && parameters->options().toc_optimize())
+ {
+ if (data_shndx == ppc_object->toc_shndx())
+ {
+ bool ok = true;
+ if (r_type != elfcpp::R_PPC64_ADDR64
+ || (is_ifunc && target->abiversion() < 2))
+ ok = false;
+ else if (parameters->options().output_is_position_independent()
+ && (is_ifunc || gsym->is_absolute() || gsym->is_undefined()))
+ ok = false;
+ if (!ok)
+ ppc_object->set_no_toc_opt(reloc.get_r_offset());
+ }
+
+ enum {no_check, check_lo, check_ha} insn_check;
+ switch (r_type)
+ {
+ default:
+ insn_check = no_check;
+ break;
+
+ case elfcpp::R_POWERPC_GOT_TLSLD16_HA:
+ case elfcpp::R_POWERPC_GOT_TLSGD16_HA:
+ case elfcpp::R_POWERPC_GOT_TPREL16_HA:
+ case elfcpp::R_POWERPC_GOT_DTPREL16_HA:
+ case elfcpp::R_POWERPC_GOT16_HA:
+ case elfcpp::R_PPC64_TOC16_HA:
+ insn_check = check_ha;
+ break;
+
+ case elfcpp::R_POWERPC_GOT_TLSLD16_LO:
+ case elfcpp::R_POWERPC_GOT_TLSGD16_LO:
+ case elfcpp::R_POWERPC_GOT_TPREL16_LO:
+ case elfcpp::R_POWERPC_GOT_DTPREL16_LO:
+ case elfcpp::R_POWERPC_GOT16_LO:
+ case elfcpp::R_PPC64_GOT16_LO_DS:
+ case elfcpp::R_PPC64_TOC16_LO:
+ case elfcpp::R_PPC64_TOC16_LO_DS:
+ insn_check = check_lo;
+ break;
+ }
+
+ section_size_type slen;
+ const unsigned char* view = NULL;
+ if (insn_check != no_check)
+ {
+ view = ppc_object->section_contents(data_shndx, &slen, false);
+ section_size_type off =
+ convert_to_section_size_type(reloc.get_r_offset()) & -4;
+ if (off < slen)
+ {
+ uint32_t insn = elfcpp::Swap<32, big_endian>::readval(view + off);
+ if (insn_check == check_lo
+ ? !ok_lo_toc_insn(insn, r_type)
+ : ((insn & ((0x3f << 26) | 0x1f << 16))
+ != ((15u << 26) | (2 << 16)) /* addis rt,2,imm */))
+ {
+ ppc_object->set_no_toc_opt();
+ gold_warning(_("%s: toc optimization is not supported "
+ "for %#08x instruction"),
+ ppc_object->name().c_str(), insn);
+ }
+ }
+ }
+
+ switch (r_type)
+ {
+ default:
+ break;
+ case elfcpp::R_PPC64_TOC16:
+ case elfcpp::R_PPC64_TOC16_LO:
+ case elfcpp::R_PPC64_TOC16_HI:
+ case elfcpp::R_PPC64_TOC16_HA:
+ case elfcpp::R_PPC64_TOC16_DS:
+ case elfcpp::R_PPC64_TOC16_LO_DS:
+ if (gsym->source() == Symbol::FROM_OBJECT
+ && !gsym->object()->is_dynamic())
+ {
+ Powerpc_relobj<size, big_endian>* sym_object
+ = static_cast<Powerpc_relobj<size, big_endian>*>(gsym->object());
+ bool is_ordinary;
+ unsigned int shndx = gsym->shndx(&is_ordinary);
+ if (shndx == sym_object->toc_shndx())
+ {
+ Sized_symbol<size>* sym = symtab->get_sized_symbol<size>(gsym);
+ Address dst_off = sym->value() + reloc.get_r_offset();
+ if (dst_off < sym_object->section_size(shndx))
+ {
+ bool ok = false;
+ if (r_type == elfcpp::R_PPC64_TOC16_HA)
+ ok = true;
+ else if (r_type == elfcpp::R_PPC64_TOC16_LO_DS)
+ {
+ // Need to check that the insn is a ld
+ if (!view)
+ view = ppc_object->section_contents(data_shndx,
+ &slen,
+ false);
+ section_size_type off =
+ (convert_to_section_size_type(reloc.get_r_offset())
+ + (big_endian ? -2 : 3));
+ if (off < slen
+ && (view[off] & (0x3f << 2)) == (58u << 2))
+ ok = true;
+ }
+ if (!ok)
+ sym_object->set_no_toc_opt(dst_off);
+ }
+ }
+ }
+ break;
+ }
+ }
+
+ if (size == 32)
+ {
+ switch (r_type)
+ {
+ case elfcpp::R_PPC_LOCAL24PC:
+ if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
+ gold_error(_("%s: unsupported -mbss-plt code"),
+ ppc_object->name().c_str());
+ break;
+ default:
+ break;
+ }
+ }
+
switch (r_type)
{
case elfcpp::R_POWERPC_GOT_TLSLD16:
this->copy_relocs_.emit(this->rela_dyn_section(layout));
}
-// Return TRUE iff INSN is one we expect on a _LO variety toc/got
-// reloc.
+// Emit any saved relocs, and mark toc entries using any of these
+// relocs as not optimizable.
-static bool
-ok_lo_toc_insn(uint32_t insn)
+template<int sh_type, int size, bool big_endian>
+void
+Powerpc_copy_relocs<sh_type, size, big_endian>::emit(
+ Output_data_reloc<sh_type, true, size, big_endian>* reloc_section)
{
- return ((insn & (0x3f << 26)) == 14u << 26 /* addi */
- || (insn & (0x3f << 26)) == 32u << 26 /* lwz */
- || (insn & (0x3f << 26)) == 34u << 26 /* lbz */
- || (insn & (0x3f << 26)) == 36u << 26 /* stw */
- || (insn & (0x3f << 26)) == 38u << 26 /* stb */
- || (insn & (0x3f << 26)) == 40u << 26 /* lhz */
- || (insn & (0x3f << 26)) == 42u << 26 /* lha */
- || (insn & (0x3f << 26)) == 44u << 26 /* sth */
- || (insn & (0x3f << 26)) == 46u << 26 /* lmw */
- || (insn & (0x3f << 26)) == 47u << 26 /* stmw */
- || (insn & (0x3f << 26)) == 48u << 26 /* lfs */
- || (insn & (0x3f << 26)) == 50u << 26 /* lfd */
- || (insn & (0x3f << 26)) == 52u << 26 /* stfs */
- || (insn & (0x3f << 26)) == 54u << 26 /* stfd */
- || ((insn & (0x3f << 26)) == 58u << 26 /* lwa,ld,lmd */
- && (insn & 3) != 1)
- || ((insn & (0x3f << 26)) == 62u << 26 /* std, stmd */
- && ((insn & 3) == 0 || (insn & 3) == 3))
- || (insn & (0x3f << 26)) == 12u << 26 /* addic */);
+ if (size == 64
+ && parameters->options().toc_optimize())
+ {
+ for (typename Copy_relocs<sh_type, size, big_endian>::
+ Copy_reloc_entries::iterator p = this->entries_.begin();
+ p != this->entries_.end();
+ ++p)
+ {
+ typename Copy_relocs<sh_type, size, big_endian>::Copy_reloc_entry&
+ entry = *p;
+
+ // If the symbol is no longer defined in a dynamic object,
+ // then we emitted a COPY relocation. If it is still
+ // dynamic then we'll need dynamic relocations and thus
+ // can't optimize toc entries.
+ if (entry.sym_->is_from_dynobj())
+ {
+ Powerpc_relobj<size, big_endian>* ppc_object
+ = static_cast<Powerpc_relobj<size, big_endian>*>(entry.relobj_);
+ if (entry.shndx_ == ppc_object->toc_shndx())
+ ppc_object->set_no_toc_opt(entry.address_);
+ }
+ }
+ }
+
+ Copy_relocs<sh_type, size, big_endian>::emit(reloc_section);
}
// Return the value to use for a branch relocation.
// descriptor, use the function descriptor code entry address
Powerpc_relobj<size, big_endian>* symobj = object;
if (gsym != NULL
- && gsym->source() != Symbol::FROM_OBJECT)
+ && (gsym->source() != Symbol::FROM_OBJECT
+ || gsym->object()->is_dynamic()))
return true;
if (gsym != NULL)
symobj = static_cast<Powerpc_relobj<size, big_endian>*>(gsym->object());
typedef Powerpc_relocate_functions<size, big_endian> Reloc;
typedef typename elfcpp::Swap<32, big_endian>::Valtype Insn;
- typedef typename Reloc_types<elfcpp::SHT_RELA,
- size, big_endian>::Reloc Reltype;
+ typedef typename elfcpp::Rela<size, big_endian> Reltype;
// Offset from start of insn to d-field reloc.
const int d_offset = big_endian ? 2 : 0;
}
else
{
- unsigned int r_sym = elfcpp::elf_r_sym<size>(rela.get_r_info());
gold_assert(object->local_has_got_offset(r_sym, GOT_TYPE_STANDARD));
value = object->local_got_offset(r_sym, GOT_TYPE_STANDARD);
}
}
else
{
- unsigned int r_sym = elfcpp::elf_r_sym<size>(rela.get_r_info());
gold_assert(object->local_has_got_offset(r_sym, got_type));
value = object->local_got_offset(r_sym, got_type);
}
}
else
{
- unsigned int r_sym = elfcpp::elf_r_sym<size>(rela.get_r_info());
gold_assert(object->local_has_got_offset(r_sym, GOT_TYPE_DTPREL));
value = object->local_got_offset(r_sym, GOT_TYPE_DTPREL);
}
}
else
{
- unsigned int r_sym = elfcpp::elf_r_sym<size>(rela.get_r_info());
gold_assert(object->local_has_got_offset(r_sym, GOT_TYPE_TPREL));
value = object->local_got_offset(r_sym, GOT_TYPE_TPREL);
}
if (size == 64)
{
- // Multi-instruction sequences that access the TOC can be
- // optimized, eg. addis ra,r2,0; addi rb,ra,x;
- // to nop; addi rb,r2,x;
switch (r_type)
{
default:
break;
+ // Multi-instruction sequences that access the GOT/TOC can
+ // be optimized, eg.
+ // addis ra,r2,x@got@ha; ld rb,x@got@l(ra);
+ // to addis ra,r2,x@toc@ha; addi rb,ra,x@toc@l;
+ // and
+ // addis ra,r2,0; addi rb,ra,x@toc@l;
+ // to nop; addi rb,r2,x@toc;
+ // FIXME: the @got sequence shown above is not yet
+ // optimized. Note that gcc as of 2017-01-07 doesn't use
+ // the ELF @got relocs except for TLS, instead using the
+ // PowerOpen variant of a compiler managed GOT (called TOC).
+ // The PowerOpen TOC sequence equivalent to the first
+ // example is optimized.
case elfcpp::R_POWERPC_GOT_TLSLD16_HA:
case elfcpp::R_POWERPC_GOT_TLSGD16_HA:
case elfcpp::R_POWERPC_GOT_TPREL16_HA:
{
Insn* iview = reinterpret_cast<Insn*>(view - d_offset);
Insn insn = elfcpp::Swap<32, big_endian>::readval(iview);
- if ((insn & ((0x3f << 26) | 0x1f << 16))
- != ((15u << 26) | (2 << 16)) /* addis rt,2,imm */)
- gold_error_at_location(relinfo, relnum, rela.get_r_offset(),
- _("toc optimization is not supported "
- "for %#08x instruction"), insn);
- else if (value + 0x8000 < 0x10000)
+ if (r_type == elfcpp::R_PPC64_TOC16_HA
+ && object->make_toc_relative(target, &value))
+ {
+ gold_assert((insn & ((0x3f << 26) | 0x1f << 16))
+ == ((15u << 26) | (2 << 16)));
+ }
+ if (((insn & ((0x3f << 26) | 0x1f << 16))
+ == ((15u << 26) | (2 << 16)) /* addis rt,2,imm */)
+ && value + 0x8000 < 0x10000)
{
elfcpp::Swap<32, big_endian>::writeval(iview, nop);
return true;
{
Insn* iview = reinterpret_cast<Insn*>(view - d_offset);
Insn insn = elfcpp::Swap<32, big_endian>::readval(iview);
- if (!ok_lo_toc_insn(insn))
- gold_error_at_location(relinfo, relnum, rela.get_r_offset(),
- _("toc optimization is not supported "
- "for %#08x instruction"), insn);
- else if (value + 0x8000 < 0x10000)
+ bool changed = false;
+ if (r_type == elfcpp::R_PPC64_TOC16_LO_DS
+ && object->make_toc_relative(target, &value))
+ {
+ gold_assert ((insn & (0x3f << 26)) == 58u << 26 /* ld */);
+ insn ^= (14u << 26) ^ (58u << 26);
+ r_type = elfcpp::R_PPC64_TOC16_LO;
+ changed = true;
+ }
+ if (ok_lo_toc_insn(insn, r_type)
+ && value + 0x8000 < 0x10000)
{
if ((insn & (0x3f << 26)) == 12u << 26 /* addic */)
{
insn &= ~(0x1f << 16);
insn |= 2 << 16;
}
- elfcpp::Swap<32, big_endian>::writeval(iview, insn);
+ changed = true;
}
+ if (changed)
+ elfcpp::Swap<32, big_endian>::writeval(iview, insn);
}
break;
&& gsym != NULL
&& strcmp(gsym->name(), ".TOC.") == 0)
{
- const int reloc_size
- = Reloc_types<elfcpp::SHT_RELA, size, big_endian>::reloc_size;
+ const int reloc_size = elfcpp::Elf_sizes<size>::rela_size;
Reltype prev_rela(preloc - reloc_size);
if ((prev_rela.get_r_info()
== elfcpp::elf_r_info<size>(r_sym,
class Powerpc_scan_relocatable_reloc
{
public:
- typedef typename Reloc_types<elfcpp::SHT_RELA, size, big_endian>::Reloc
- Reltype;
- static const int reloc_size =
- Reloc_types<elfcpp::SHT_RELA, size, big_endian>::reloc_size;
+ typedef typename elfcpp::Rela<size, big_endian> Reltype;
+ static const int reloc_size = elfcpp::Elf_sizes<size>::rela_size;
static const int sh_type = elfcpp::SHT_RELA;
// Return the symbol referred to by the relocation.
{
gold_assert(sh_type == elfcpp::SHT_RELA);
- typedef typename Reloc_types<elfcpp::SHT_RELA, size, big_endian>::Reloc
- Reltype;
- typedef typename Reloc_types<elfcpp::SHT_RELA, size, big_endian>::Reloc_write
- Reltype_write;
- const int reloc_size
- = Reloc_types<elfcpp::SHT_RELA, size, big_endian>::reloc_size;
+ typedef typename elfcpp::Rela<size, big_endian> Reltype;
+ typedef typename elfcpp::Rela_write<size, big_endian> Reltype_write;
+ const int reloc_size = elfcpp::Elf_sizes<size>::rela_size;
// Offset from start of insn to d-field reloc.
const int d_offset = big_endian ? 2 : 0;