[AArch64] Additional SVE instructions

[deliverable/binutils-gdb.git] / include / ChangeLog

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@@ -1,3 +1,22 @@
+2017-02-24  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4x16)
+       (AARCH64_OPND_SVE_IMM_ROT1, AARCH64_OPND_SVE_IMM_ROT2)
+       (AARCH64_OPND_SVE_Zm3_INDEX, AARCH64_OPND_SVE_Zm3_22_INDEX)
+       (AARCH64_OPND_SVE_Zm4_INDEX): New aarch64_opnds.
+
+2017-02-24  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * opcode/aarch64.h (AARCH64_FEATURE_COMPNUM): New macro.
+       (AARCH64_ARCH_V8_3): Include AARCH64_FEATURE_COMPNUM.
+
+2017-02-22  Andrew Waterman  <andrew@sifive.com>
+
+       * opcode/riscv-opc.h (CSR_SCOUNTEREN): New define.
+       (CSR_MCOUNTEREN): Likewise.
+       (scounteren): Declare register.
+       (mcounteren): Likewise.
+
 2017-02-14  Andrew Waterman  <andrew@sifive.com>
 
        * opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define.