x86-64: always use unsigned 32-bit reloc for 32-bit addressing w/o base reg

[deliverable/binutils-gdb.git] / include / ChangeLog

diff --git a/include/ChangeLog b/include/ChangeLog
index 869d87862f7ffda982854d203f00113c6c3412a1..670456cecea92027368dd4b7bcbaecca23756f89 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,75 @@
+2017-11-16  Tamar Christina  <tamar.christina@arm.com>
+
+       * opcode/aarch64.h: (AARCH64_FEATURE_F16_FML): New.
+       (AARCH64_ARCH_V8_4): Enable AARCH64_FEATURE_F16_FML by default.
+
+2017-11-15  Tamar Christina  <tamar.christina@arm.com>
+
+       * opcode/arm.h: (ARM_EXT2_FP16_FML): New.
+       (ARM_AEXT2_V8_4A): Add ARM_EXT2_FP16_FML.
+
+2017-11-13  Jan Beulich  <jbeulich@suse.com>
+
+       * coff/pe.h (COFF_ENCODE_ALIGNMENT): Cap value to maximum one
+       representable.
+       (COFF_DECODE_ALIGNMENT): Define.
+
+2017-11-09  Tamar Christina  <tamar.christina@arm.com>
+
+       * opcode/aarch64.h (AARCH64_ARCH_V8_4): Enable DOTPROD.
+
+2017-11-09  Tamar Christina  <tamar.christina@arm.com>
+
+       * opcode/aarch64.h:
+       (aarch64_opnd): Add AARCH64_OPND_Va, AARCH64_OPND_MASK,
+       AARCH64_OPND_IMM_2, AARCH64_OPND_ADDR_OFFSET
+       and AARCH64_OPND_SM3_IMM2. 
+       (aarch64_insn_class): Add cryptosm3 and cryptosm4.
+       (arch64_feature_set): Make uint64_t.
+
+2017-11-09  Tamar Christina  <tamar.christina@arm.com>
+
+       * opcode/aarch64.h:
+       (AARCH64_FEATURE_V8_4, AARCH64_FEATURE_SM4): New.
+       (AARCH64_ARCH_V8_4, AARCH64_FEATURE_SHA3): New.
+
+2017-11-09  Nick Clifton  <nickc@redhat.com>
+
+       * opcode/aarch64.h (aarch64_feature_set): Change type to unsigned
+       long long.
+
+2017-11-08  Tamar Christina  <tamar.christina@arm.com>
+
+       * opcode/aarch64.h:
+       (AARCH64_FEATURE_SHA2, AARCH64_FEATURE_AES): New.
+
+2017-11-08  Jiong Wang  <jiong.wang@arm.com>
+
+       * opcode/arm.h (ARM_AEXT2_V8_4A): Include Dot Product feature.
+       (ARM_EXT2_V8_4A): New macro.
+       (ARM_AEXT2_V8_4A): Likewise.
+       (ARM_ARCH_V8_4A): Likewise.
+
+2017-11-07  Palmer Dabbelt  <palmer@dabbelt.com>
+
+       * opcode/riscv-opc.h (sptbr): Rename to satp.
+       (CSR_SPTBR): Rename to CSR_SATP.
+       (sptbr): Alias to CSR_SATP.
+
+2017-11-07  Tamar Christina  <tamar.christina@arm.com>
+
+       * opcode/arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD):
+       New macro.
+
+2017-11-02  Siddhesh Poyarekar  <siddhesh@sourceware.org>
+
+       * include/opcode/aarch64.h (AARCH64_ARCH_V8_2): Drop
+       AARCH64_FEATURE_F16.
+
+2017-11-01  James Bowman  <james.bowman@ftdichip.com>
+
+       * elf/ft32.h: Add R_FT32_RELAX, SC0, SC1, DIFF32.
+
 2017-10-25  Alan Modra  <amodra@gmail.com>
 
        PR 22348