+2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
+
+ * elf/xtensa.h (xtensa_abi_choice): New declaration.
+
+2020-06-12 Roland McGrath <mcgrathr@google.com>
+
+ * bfdlink.h (struct bfd_link_info): New field start_stop_visibility.
+
+2020-06-12 Nelson Chu <nelson.chu@sifive.com>
+
+ * opcode/riscv-opc.h: Update the defined versions of CSR from
+ PRIV_SPEC_CLASS_1P9 to PRIV_SPEC_CLASS_1P9P1. Also, drop the
+ MISA DECLARE_CSR_ALIAS since it's aborted version is v1.9.
+ * opcode/riscv.h (enum riscv_priv_spec_class): Remove
+ PRIV_SPEC_CLASS_1P9.
+
+2020-06-11 Alex Coplan <alex.coplan@arm.com>
+
+ * opcode/aarch64.h (aarch64_sys_reg): Add required features to struct
+ describing system registers.
+
+2020-06-11 Alan Modra <amodra@gmail.com>
+
+ * elf/mips.h (Elf32_RegInfo): Use fixed width integer types.
+ (Elf64_Internal_RegInfo, Elf_Internal_Options): Likewise.
+
+2020-06-06 Alan Modra <amodra@gmail.com>
+
+ * elf/ppc64.h (elf_ppc64_reloc_type): Rename
+ R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
+ R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
+ R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
+ R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
+
+2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * opcode/cgen.h: Get an `endian' argument in both
+ cgen_get_insn_value and cgen_put_insn_value.
+
+2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
+
+ * opcode/cgen.h (enum cgen_cpu_open_arg): New value
+ CGEN_CPU_OPEN_INSN_ENDIAN.
+
+2020-06-03 Nelson Chu <nelson.chu@sifive.com>
+
+ * opcode/riscv.h: Remove #include "bfd.h". And change the return
+ types of riscv_get_isa_spec_class and riscv_get_priv_spec_class
+ from bfd_boolean to int.
+
+2020-05-28 Alan Modra <amodra@gmail.com>
+
+ PR 26044
+ * opcode/tilepro.h (TILEPRO_NUM_PIPELINE_ENCODINGS): Move to
+ tilepro_pipeline enum.
+
+2020-05-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/22909
+ * bfdlink.h (textrel_check_method): New enum.
+ (bfd_link_textrel_check): New.
+ (bfd_link_info): Replace warn_shared_textrel and error_textrel
+ with textrel_check.
+
+2020-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf/common.h: Update comments for ET_EXEC and ET_DYN.
+
+2020-05-20 Nelson Chu <nelson.chu@sifive.com>
+
+ * opcode/riscv.h: Include "bfd.h" to support bfd_boolean.
+ (enum riscv_isa_spec_class): New enum class. All supported ISA spec
+ belong to one of the class
+ (struct riscv_ext_version): New structure holds version information
+ for the specific ISA.
+ * opcode/riscv-opc.h (DECLARE_CSR): There are two version information,
+ define_version and abort_version. The define_version means which
+ privilege spec is started to define the CSR, and the abort_version
+ means which privilege spec is started to abort the CSR. If the CSR is
+ valid for the newest spec, then the abort_version should be
+ PRIV_SPEC_CLASS_DRAFT.
+ (DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR.
+ * opcode/riscv.h (enum riscv_priv_spec_class): New enum class. Define
+ the current supported privilege spec versions.
+ (struct riscv_csr_extra): Add new fields to store more information
+ about the CSR. We use these information to find the suitable CSR
+ address when user choosing a specific privilege spec.
+
+2020-05-19 Alexander Fedotov <alfedotov@gmail.com>
+
+ PR 25992
+ * opcode/arm.h (ARM_EXT2_V8R): Define. Modified ARM_AEXT2_V8R.
+
2020-05-11 Alan Modra <amodra@gmail.com>
* opcode/ppc.h (PPC_OPERAND_ACC): Define. Renumber following
projects / deliverable / binutils-gdb.git / blobdiff