MIPS/GAS: Use non-zero frag offset directly in PIC branch relaxation

[deliverable/binutils-gdb.git] / include / ChangeLog

diff --git a/include/ChangeLog b/include/ChangeLog
index 4858699a7ee5b6adfcdaff6b4d02c46288d7c3ea..9400f16c9a6daad55915297a9f48342884251e6c 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,71 @@
+2017-06-30  Georg-Johann Lay  <avr@gjlay.de>
+
+       PR gas/21683
+       * opcode/avr.h (AVR_INSN): Add one for __gcc_isr.
+
+2017-06-30  Maciej W. Rozycki  <macro@imgtec.com>
+           Andrew Bennett  <andrew.bennett@imgtec.com>
+
+       * opcode/mips.h (ASE_XPA_VIRT): New macro.
+
+2017-06-29  Andreas Arnez  <arnez@linux.vnet.ibm.com>
+
+       * elf/common.h (NT_S390_GS_CB): New macro.
+       (NT_S390_GS_BC): Likewise.
+
+2017-06-28  Tamar Christina  <tamar.christina@arm.com>
+
+       * opcode/aarch64.h: (AARCH64_FEATURE_DOTPROD): New.
+       (aarch64_insn_class): Added dotprod.
+
+2017-06-28  Jiong Wang  <jiong.wang@arm.com>
+
+       * opcode/arm.h (FPU_NEON_EXT_DOTPROD): New macro.
+       (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): New macro.
+
+2017-06-28  Maciej W. Rozycki  <macro@imgtec.com>
+           Matthew Fortune  <matthew.fortune@imgtec.com>
+
+       * elf/mips.h (E_MIPS_MACH_IAMR2): New macro.
+       (AFL_EXT_INTERAPTIV_MR2): Likewise.
+       * opcode/mips.h: Document new operand codes defined.
+       (INSN_INTERAPTIV_MR2): New macro.
+       (INSN_CHIP_MASK): Adjust accordingly.
+       (CPU_INTERAPTIV_MR2): New macro.
+       (cpu_is_member) <CPU_INTERAPTIV_MR2>: New case.
+       (MIPS16_ALL_ARGS): Rename to...
+       (MIPS_SVRS_ALL_ARGS): ... this.
+       (MIPS16_ALL_STATICS): Rename to...
+       (MIPS_SVRS_ALL_STATICS): ... this.
+
+2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>
+
+       * elf/riscv.h (R_RISCV_32_PCREL): New.
+
+2017-06-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * elf/arm.h (TAG_CPU_ARCH_V8R): New macro.
+       * opcode/arm.h (ARM_EXT2_V8A): New macro.
+       (ARM_AEXT2_V8A): Rename into ...
+       (ARM_AEXT2_V8AR): This.
+       (ARM_AEXT2_V8A): New macro.
+       (ARM_AEXT_V8R): New macro.
+       (ARM_AEXT2_V8R): New macro.
+       (ARM_ARCH_V8R): New macro.
+
+2017-06-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * opcode/arm.h (ARM_AEXT_V4TxM): Add ARM_EXT_OS bit to the set.
+       (ARM_AEXT_V4T): Likewise.
+       (ARM_AEXT_V5TxM): Likewise.
+       (ARM_AEXT_V5T): Likewise.
+       (ARM_AEXT_V6M): Mask off ARM_EXT_OS bit.
+
+2017-06-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * bfdlink.h (bfd_link_info): Add shstk.
+       * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_SHSTK): New.
+
 2017-06-22  H.J. Lu  <hongjiu.lu@intel.com>
 
        * bfdlink.h (bfd_link_info): Add ibtplt and ibt.
@@ -8,6 +76,10 @@
 
        * opcode/arm.h (FPU_ANY): New macro.
 
+2017-06-20  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+       * elf/s390.h (PT_S390_PGSTE): Define macro.
+
 2017-06-16  Alan Modra  <amodra@gmail.com>
 
        PR ld/20022