+2016-07-27 Graham Markall <graham.markall@embecosm.com>
+
+ * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
+ ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
+ ARC_NUM_ADDRTYPES.
+ * opcode/arc.h: Add BMU to insn_class_t enum.
+ * opcode/arc.h: Add PMU to insn_class_t enum.
+
+2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * dis-asm.h: Declare print_arc_disassembler_options.
+
+2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
+ out_implib_bfd fields.
+
+2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
+
+2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
+
+ * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
+ (SHF_ARM_PURECODE): ... this.
+
+2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
+ (AARCH64_CPU_HAS_ANY_FEATURES): New.
+ (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
+ (AARCH64_OPCODE_HAS_FEATURE): Remove.
+
+2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
+
+ * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
+ of enabled FPU features.
+
+2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * opcode/sparc.h (enum sparc_opcode_arch_val): Move
+ SPARC_OPCODE_ARCH_MAX into the enum.
+
+2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
+
+ * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
+
+2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
+
+ * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
+
+2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * elf/xtensa.h (xtensa_make_property_section): New prototype.
+
+2016-06-24 John Baldwin <jhb@FreeBSD.org>
+
+ * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
+ (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
+ (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
+ (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
+
+2016-06-23 Graham Markall <graham.markall@embecosm.com>
+
+ * opcode/arc.h: Make insn_class_t alphabetical again.
+
+2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * elf/dlx.h: Wrap in extern C.
+ * elf/xtensa.h: Likewise.
+ * opcode/arc.h: Likewise.
+
+2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
+ tilegx_pipeline.
+
+2016-06-21 Graham Markall <graham.markall@embecosm.com>
+
+ * opcode/arc.h: Add nps400 extension and instruction
+ subclass.
+ Remove ARC_OPCODE_NPS400
+ * elf/arc.h: Remove E_ARC_MACH_NPS400
+
+2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * opcode/sparc.h (enum sparc_opcode_arch_val): Add
+ SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
+ SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
+ SPARC_OPCODE_ARCH_V9M.
+
+2016-06-14 John Baldwin <jhb@FreeBSD.org>
+
+ * opcode/msp430-decode.h (MSP430_Size): Remove.
+ (Msp430_Opcode_Decoded): Change type of size to int.
+
+2016-06-11 Alan Modra <amodra@gmail.com>
+
+ * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
+
+2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * opcode/sparc.h: Add missing documentation for hyperprivileged
+ registers in rd (%) and rs1 ($).
+
+2016-06-07 Alan Modra <amodra@gmail.com>
+
+ * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
+ PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
+ PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
+ PPC_APUINFO_VLE: Define.
+
+2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
+
+ * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
+ entries.
+ (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
+
+2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
+ (struct arc_long_opcode): New structure.
+ (arc_long_opcodes): Declare.
+ (arc_num_long_opcodes): Declare.
+
+2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * elf/mips.h: Add extern "C".
+ * elf/sh.h: Likewise.
+ * opcode/d10v.h: Likewise.
+ * opcode/d30v.h: Likewise.
+ * opcode/ia64.h: Likewise.
+ * opcode/mips.h: Likewise.
+ * opcode/ppc.h: Likewise.
+ * opcode/sparc.h: Likewise.
+ * opcode/tic6x.h: Likewise.
+ * opcode/v850.h: Likewise.
+
+2016-05-28 Alan Modra <amodra@gmail.com>
+
+ * bfdlink.h (struct bfd_link_callbacks): Update comments.
+ Return void from multiple_definition, multiple_common,
+ add_to_set, constructor, warning, undefined_symbol,
+ reloc_overflow, reloc_dangerous and unattached_reloc.
+
+2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * opcode/metag.h: wrap declarations in extern "C".
+
+2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * opcode/arc.h (insn_subclass_t): Add COND.
+ (flag_class_t): Add F_CLASS_EXTEND.
+
+2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
+
+ * opcode/arc.h (struct arc_opcode): Renamed attribute class to
+ insn_class.
+ (struct arc_flag_class): Renamed attribute class to flag_class.
+
+2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
+ plain symbol.
+
+2016-04-29 Tom Tromey <tom@tromey.com>
+
+ * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
+ DW_LANG_Rust_old>: New constants.
+
+2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * elf/mips.h (AFL_ASE_DSPR3): New macro.
+ (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
+ * opcode/mips.h (ASE_DSPR3): New macro.
+
+2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
+ Nick Clifton <nickc@redhat.com>
+
+ * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
+ enumerator.
+ (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
+ (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
+ (ARM_SYM_BRANCH_TYPE): Replace by ...
+ (ARM_GET_SYM_BRANCH_TYPE): This and ...
+ (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
+ BFD_ASSERT is defined or not.
+
+2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * elf/arm.h (Tag_DSP_extension): Define.
+
+2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
+
+2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
+ (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
+ (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
+ for the high core bits.
+
+2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * opcode/arc.h (ARC_SYNTAX_1OP): Declare
+ (ARC_SYNTAX_NOP): Likewsie.
+ (ARC_OP1_MUST_BE_IMM): Update defined value.
+ (ARC_OP1_IMM_IMPLIED): Likewise.
+ (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
+
2016-04-28 Nick Clifton <nickc@redhat.com>
PR target/19722
projects / deliverable / binutils-gdb.git / blobdiff