* include/opcode/tic6x.h: add tic6x_coding_dreg_(msb|lsb) field coding type in

[deliverable/binutils-gdb.git] / include / opcode / ChangeLog

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index df85b9fb969621506212fc57ed0b03c34e6c2480..69d0859e12bbca0f50336621f845512081e0090c 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,79 @@
+2013-03-20  Alexis Deruelle  <alexis.deruelle@gmail.com>
+
+       PR gas/15095
+       * tic6x.h (enum tic6x_coding_method): Add
+       tic6x_coding_dreg_(msb|lsb) field coding type in order to encode
+       separately the msb and lsb of a register pair.  This is needed to
+       encode the opcodes in the same way as TI assembler does.
+       * tic6x-opcode-table.h: Modify absdp, dpint, dpsp, dptrunc, rcpdp
+       and rsqrdp opcodes to use the new field coding types.
+
+2013-03-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * arm.h (CRC_EXT_ARMV8): New constant.
+       (ARCH_CRC_ARMV8): New macro.
+
+2013-02-28  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * aarch64.h (AARCH64_FEATURE_CRC): New macro.
+
+2013-02-06  Sandra Loosemore  <sandra@codesourcery.com>
+            Andrew Jenner <andrew@codesourcery.com>
+
+       Based on patches from Altera Corporation.
+
+       * nios2.h: New file.
+
+2013-01-30  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * aarch64.h (aarch64_op): Add OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2.
+
+2013-01-28  Alexis Deruelle  <alexis.deruelle@gmail.com>
+
+       PR gas/15069
+       * tic6x-opcode-table.h: Fix encoding of BNOP instruction.
+
+2013-01-24  Nick Clifton  <nickc@redhat.com>
+
+       * v850.h: Add e3v5 support.
+
+2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * aarch64.h (aarch64_op): Remove OP_V_MOVI_B.
+
+2013-01-10  Peter Bergner <bergner@vnet.ibm.com>
+
+       * ppc.h (PPC_OPCODE_POWER8): New define.
+       (PPC_OPCODE_HTM): Likewise.
+
+2013-01-10  Will Newton <will.newton@imgtec.com>
+
+       * metag.h: New file.
+
+2013-01-07  Kaushik Phatak  <kaushik.phatak@kpitcummins.com>
+
+       * cr16.h (make_instruction): Rename to cr16_make_instruction.
+       (match_opcode): Rename to cr16_match_opcode.
+
+2013-01-04  Juergen Urban <JuergenUrban@gmx.de>
+
+       * mips.h: Add support for r5900 instructions including lq and sq.
+
+2013-01-02  Kaushik Phatak  <kaushik.phatak@kpitcummins.com>
+
+       * cr16.h (dwordU,wordU): Moved typedefs from cr16-dis.c
+       (make_instruction,match_opcode): Added function prototypes.
+       (cr16_words,cr16_allWords,cr16_currInsn): Declare as extern.
+
+2012-11-23  Alan Modra  <amodra@gmail.com>
+
+       * ppc.h (ppc_parse_cpu): Update prototype.
+
+2012-10-14  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+       * hppa.h (pa_opcodes): Use "cX" completer instead of "cx" in fstqx
+       opcodes.  Likewise, use "cM" instead of "cm" in fstqs opcodes.
+
 2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 
        * s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
@@ -1578,6 +1654,12 @@
 
 For older changes see ChangeLog-9103
 \f
+Copyright (C) 2004-2012 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
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