+2000-12-01 Chris Demetriou <cgd@sibyte.com>
+
+ mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
+ (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
+ OP_*_SYSCALL definitions.
+ (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
+ 19 bit wait codes.
+ (MIPS operand specifier comments): Remove 'm', add 'U' and
+ 'J', and update the meaning of 'B' so that it's more general.
+
+ * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
+ INSN_ISA5): Renumber, redefine to mean the ISA at which the
+ instruction was added.
+ (INSN_ISA32): New constant.
+ (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
+ Renumber to avoid new and/or renumbered INSN_* constants.
+ (INSN_MIPS32): Delete.
+ (ISA_UNKNOWN): New constant to indicate unknown ISA.
+ (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
+ ISA_MIPS32): New constants, defined to be the mask of INSN_*
+ constants available at that ISA level.
+ (CPU_UNKNOWN): New constant to indicate unknown CPU.
+ (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
+ define it with a unique value.
+ (OPCODE_IS_MEMBER): Update for new ISA membership-related
+ constant meanings.
+
+ * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
+ definitions.
+
+2000-10-20 Jakub Jelinek <jakub@redhat.com>
+
+ * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
+ Note that '3' is used for siam operand.
+
+2000-09-22 Jim Wilson <wilson@cygnus.com>
+
+ * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
+
+2000-09-13 Anders Norlander <anorland@acc.umu.se>
+
+ * mips.h: Use defines instead of hard-coded processor numbers.
+ (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
+ CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
+ CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
+ CPU_4KC, CPU_4KM, CPU_4KP): Define..
+ (OPCODE_IS_MEMBER): Use new defines.
+ (OP_MASK_SEL, OP_SH_SEL): Define.
+ (OP_MASK_CODE20, OP_SH_CODE20): Define.
+ Add 'P' to used characters.
+ Use 'H' for coprocessor select field.
+ Use 'm' for 20 bit breakpoint code.
+ Document new arg characters and add to used characters.
+ (INSN_MIPS32): New define for MIPS32 extensions.
+ (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
+
+2000-09-05 Alan Modra <alan@linuxcare.com.au>
+
+ * hppa.h: Mention cz completer.
+
+2000-08-16 Jim Wilson <wilson@cygnus.com>
+
+ * ia64.h (IA64_OPCODE_POSTINC): New.
+
+2000-08-15 H.J. Lu <hjl@gnu.org>
+
+ * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
+ IgnoreSize change.
+
+2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
+
+ * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
+ Move related opcodes closer to each other.
+ Minor changes in comments, list undefined opcodes.
+
+2000-07-26 Dave Brolley <brolley@redhat.com>
+
+ * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
+
+2000-07-20 Hans-Peter Nilsson <hp@axis.com>
+
+ cris.h: New file.
+
+2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
+
+ * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
+ (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
+ (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
+ (AVR_ISA_M83): Define for ATmega83, ATmega85.
+ (espm): Remove, because ESPM removed in databook update.
+ (eicall, eijmp): Move to the end of opcode table.
+
+2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
+
+ * m68hc11.h: New file for support of Motorola 68hc11.
+
+Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
+
+ * avr.h: clr,lsl,rol, ... moved after add,adc, ...
+
+Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
+
+ * avr.h: New file with AVR opcodes.
+
+Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
+
+ * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
+
+2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
+
+ * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
+
+2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
+
+ * i386.h: Use sl_FP, not sl_Suf for fild.
+
+2000-05-16 Frank Ch. Eigler <fche@redhat.com>
+
+ * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
+ it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
+ (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
+ CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
+
+2000-05-13 Alan Modra <alan@linuxcare.com.au>,
+
+ * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
+
+2000-05-13 Alan Modra <alan@linuxcare.com.au>,
+ Alexander Sokolov <robocop@netlink.ru>
+
+ * i386.h (i386_optab): Add cpu_flags for all instructions.
+
+2000-05-13 Alan Modra <alan@linuxcare.com.au>
+
+ From Gavin Romig-Koch <gavin@cygnus.com>
+ * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
+
+2000-05-04 Timothy Wall <twall@cygnus.com>
+
+ * tic54x.h: New.
+
+2000-05-03 J.T. Conklin <jtc@redback.com>
+
+ * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
+ (PPC_OPERAND_VR): New operand flag for vector registers.
+
+2000-05-01 Kazu Hirata <kazu@hxi.com>
+
+ * h8300.h (EOP): Add missing initializer.
+
+Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
+
+ * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
+ forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
+ New operand types l,y,&,fe,fE,fx added to support above forms.
+ (pa_opcodes): Replaced usage of 'x' as source/target for
+ floating point double-word loads/stores with 'fx'.
+
+Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
+ David Mosberger <davidm@hpl.hp.com>
+ Timothy Wall <twall@cygnus.com>
+ Jim Wilson <wilson@cygnus.com>
+
+ * ia64.h: New file.
+
+2000-03-27 Nick Clifton <nickc@cygnus.com>
+
+ * d30v.h (SHORT_A1): Fix value.
+ (SHORT_AR): Renumber so that it is at the end of the list of short
+ instructions, not the end of the list of long instructions.
+
+2000-03-26 Alan Modra <alan@linuxcare.com>
+
+ * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
+ problem isn't really specific to Unixware.
+ (OLDGCC_COMPAT): Define.
+ (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
+ destination %st(0).
+ Fix lots of comments.
+
+2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * d30v.h:
+ (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
+ (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
+ (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
+ (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
+ (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
+ (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
+ (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
+
+2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h (fild, fistp): Change intel d_Suf form to fildd and
+ fistpd without suffix.
+
+2000-02-24 Nick Clifton <nickc@cygnus.com>
+
+ * cgen.h (cgen_cpu_desc): Rename field 'flags' to
+ 'signed_overflow_ok_p'.
+ Delete prototypes for cgen_set_flags() and cgen_get_flags().
+
+2000-02-24 Andrew Haley <aph@cygnus.com>
+
+ * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
+ (CGEN_CPU_TABLE): flags: new field.
+ Add prototypes for new functions.
+
+2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386.h: Add some more UNIXWARE_COMPAT comments.
+
+2000-02-23 Linas Vepstas <linas@linas.org>
+
+ * i370.h: New file.
+
2000-02-22 Andrew Haley <aph@cygnus.com>
* mips.h: (OPCODE_IS_MEMBER): Add comment.
projects / deliverable / binutils-gdb.git / blobdiff