+Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * sparc.h (enum sparc_architecture): Add v9a.
+
+Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
+
+ * i386.h: Added Pentium Pro instructions.
+
+Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k.h: Document new 'W' operand place.
+
+Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
+
+ * hppa.h: Add lci and syncdma instructions.
+
+Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
+
+ * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
+ instructions.
+
+Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
+ assembler's -mcom and -many switches.
+
+Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
+
+ * i386.h: Fix cmpxchg8b extension opcode description.
+
+Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
+
+ * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
+ and register cr4.
+
+Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k.h: Change comment: split type P into types 0, 1 and 2.
+
+Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc.h (sparc_{encode,decode}_prefetch): Declare.
+
+Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
+
+Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68kmri.h: Remove.
+
+ * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
+ declarations. Remove F_ALIAS and flag field of struct
+ m68k_opcode. Change arch field of struct m68k_opcode to unsigned
+ int. Make name and args fields of struct m68k_opcode const.
+
+Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc.h (F_NOTV9): Define.
+
+Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
+
+ * mips.h (INSN_4010): Define.
+
+Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * m68k.h (TBL1): Reverse sense of "round" argument in result.
+
+ Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
+ * m68k.h: Fix argument descriptions of coprocessor
+ instructions to allow only alterable operands where appropriate.
+ [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
+ (m68k_opcode_aliases): Add more aliases.
+
+start-sanitize-arc
+Sat Apr 29 23:17:03 1995 Doug Evans <dje@chestnut.cygnus.com>
+
+ * arc.h (struct arc_opcode): New flag value ARC_OPCODE_COND_BRANCH.
+ (ARC_DELAY_{NONE,NORMAL,JUMP): Define delay slot types.
+end-sanitize-arc
+
+Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * m68k.h: Added explcitly short-sized conditional branches, and a
+ bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
+ svr4-based configurations.
+
+start-sanitize-arc
+Wed Apr 12 08:54:32 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * arc.h (struct arc_opcode): New members next_asm, next_dis.
+ (ARC_HASH_OPCODE, ARC_HASH_ICODE): Define.
+ (ARC_OPCODE_NEXT_ASM, ARC_OPCODE_NEXT_DIS): Define.
+ (arc_opcode_lookup_asm, arc_opcode_lookup_dis): Add prototypes.
+
+Thu Apr 6 20:36:55 1995 Doug Evans <dje@chestnut.cygnus.com>
+
+ * arc.h (arc_get_opcode_mach): Define prototype.
+end-sanitize-arc
+
+Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
+ * i386.h: added missing Data16/Data32 flags to a few instructions.
+
+Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (OP_MASK_FR, OP_SH_FR): Define.
+ (OP_MASK_BCC, OP_SH_BCC): Define.
+ (OP_MASK_PREFX, OP_SH_PREFX): Define.
+ (OP_MASK_CCC, OP_SH_CCC): Define.
+ (INSN_READ_FPR_R): Define.
+ (INSN_RFE): Delete.
+
+Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * m68k.h (enum m68k_architecture): Deleted.
+ (struct m68k_opcode_alias): New type.
+ (m68k_opcodes): Now const. Deleted opcode aliases with exactly
+ matching constraints, values and flags. As a side effect of this,
+ the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
+ as I know were never used, now may need re-examining.
+ (numopcodes): Now const.
+ (m68k_opcode_aliases, numaliases): New variables.
+ (endop): Deleted.
+ [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
+ m68k_opcode_aliases; update declaration of m68k_opcodes.
+
+start-sanitize-arc
+Tue Mar 7 21:03:26 1995 Doug Evans <dje@chestnut.cygnus.com>
+
+ * arc.h (ARC_MACH_BIG): Define.
+ (ARC_MACH_MASK): Update.
+ (ARC_MACH_CPU_MASK): Define.
+ (ARC_OPCODE_CPU, ARC_OPVAL_CPU, ARC_HAVE_CPU): Likewise.
+end-sanitize-arc
+
+Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
+
+ * hppa.h (delay_type): Delete unused enumeration.
+ (pa_opcode): Replace unused delayed field with an architecture
+ field.
+ (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
+
+Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (INSN_ISA4): Define.
+
+Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (M_DLA_AB, M_DLI): Define.
+
+Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
+
+ * hppa.h (fstwx): Fix single-bit error.
+
+Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
+
+start-sanitize-arc
+Mon Feb 13 11:05:00 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * arc.h (ARC_OPERAND_LIMM): New flag.
+ (ARC_OPERAND_ADDRESS): Likewise.
+
+Thu Feb 9 18:55:59 1995 Doug Evans <dje@canuck.cygnus.com>
+
+ * arc.h (ARC_MACH_{BASE,HOST,GRAPHICS,AUDIO}): Define.
+ (ARC_MACH_MASK, ARC_OPCODE_MACH, ARC_OPVAL_MACH): Define.
+ (ARC_HAVE_MULT_SHIFT): Delete.
+ (ARC_HAVE_MACH): Define.
+ (struct arc_opcode): New field `flags'.
+ (struct arc_operand_value): Ditto.
+ (arc_opcode_supported): New function.
+ (arc_opval_supported): Ditto.
+end-sanitize-arc
+
+Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * i386.h: added cpuid instruction , and dr[0-7] aliases for the
+ debug registers. From Charles Hannum (mycroft@netbsd.org).
+
+Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
+ i386 support:
+ * i386.h (MOV_AX_DISP32): New macro.
+ (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
+ of several call/return instructions.
+ (ADDR_PREFIX_OPCODE): New macro.
+
+Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
+
+ * ../include/opcode/vax.h (struct vot_wot, field `args'): make
+ it pointer to const char;
+ (struct vot, field `name'): ditto.
+
+Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
+
+ * vax.h: Supply and properly group all values in end sentinel.
+
+Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
+
+ * mips.h (INSN_ISA, INSN_4650): Define.
+
+start-sanitize-arc
+Mon Dec 19 12:15:52 1994 Doug Evans <dje@canuck.cygnus.com>
+
+ * arc.h: Misc. cleanup. Merge "modifiers" into flags field.
+ Support multiply/shift insns.
+end-sanitize-arc
+
+start-sanitize-arc
+Tue Nov 29 17:52:41 1994 Doug Evans <dje@canuck.cygnus.com>
+
+ * arc.h: New file.
+end-sanitize-arc
+
+Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
+
+ * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
+ systems with a separate instruction and data cache, such as the
+ 29040, these instructions take an optional argument.
+
+Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
+
+ * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
+ INSN_TRAP.
+
+Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
+
+ * mips.h (INSN_STORE_MEMORY): Define.
+
+Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * sparc.h: Document new operand type 'x'.
+
+Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * i960.h (I_CX2): New instruction category.
+ start-sanitize-i960xl
+ It includes instructions available on Cx and XL processors.
+ (I_XL): New instruction category, for XL-only instructions.
+ end-sanitize-i960xl
+ (i960_opcodes): Put eshro and sysctl in I_CX2 category.
+ start-sanitize-i960xl
+ Added i960XL-only instructions, in I_XL category.
+ end-sanitize-i960xl
+
+Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * ns32k.h (endop): Made pointer const too.
+
+Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
+
+ * ns32k.h: Drop Q operand type as there is no correct use
+ for it. Add I and Z operand types which allow better checking.
+
+Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
+
+ * h8300.h (xor.l) :fix bit pattern.
+ (L_2): New size of operand.
+ (trapa): Use it.
+
+Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * m68k.h: Move "trap" before "tpcc" to change disassembly.
+
+Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * sparc.h: Include v9 definitions.
+
+Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * m68k.h (m68060): Defined.
+ (m68040up, mfloat, mmmu): Include it.
+ (struct m68k_opcode): Widen `arch' field.
+ (m68k_opcodes): Updated for M68060. Removed comments that were
+ instructions commented out by "JF" years ago.
+
+Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
+ add a one-bit `flags' field.
+ (F_ALIAS): New macro.
+
+Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
+
+ * h8300.h (dec, inc): Get encoding right.
+
+Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ppc.h (struct powerpc_operand): Removed signedp field; just use
+ a flag instead.
+ (PPC_OPERAND_SIGNED): Define.
+ (PPC_OPERAND_SIGNOPT): Define.
+
+Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
+ prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
+
+Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * i386.h: Reverse last change. It'll be handled in gas instead.
+
+Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
+
+ * i386.h (sar): Disabled the two-operand Imm1 form, since it was
+ slower on the 486 and used the implicit shift count despite the
+ explicit operand. The one-operand form is still available to get
+ the shorter form with the implicit shift count.
+
+Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
+
+ * hppa.h: Fix typo in fstws arg string.
+
+Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ppc.h (struct powerpc_opcode): Make operands field unsigned.
+
+Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
+
+ * ppc.h (PPC_OPCODE_601): Define.
+
Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
* hppa.h (addb): Use '@' for addb and addib pseudo ops.
m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
vax.h, ChangeLog: renamed from ../<foo>-opcode.h
-
-
-
-
+\f
+Local Variables:
+version-control: never
+End: