[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions

[deliverable/binutils-gdb.git] / include / opcode / aarch64.h

diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index f8ae42fca8e6cba3328a777fa66ebc2e73a39614..b4987ded4508e5f5fcce3cbfbff1d05287081cf7 100644 (file)
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -64,6 +64,19 @@ typedef uint32_t aarch64_insn;
 #define AARCH64_FEATURE_F16_FML        0x1000000000ULL /* v8.2 FP16FML ins.  */
 #define AARCH64_FEATURE_V8_5   0x2000000000ULL /* ARMv8.5 processors.  */
 
+/* Flag Manipulation insns.  */
+#define AARCH64_FEATURE_FLAGMANIP      0x4000000000ULL
+/* FRINT[32,64][Z,X] insns.  */
+#define AARCH64_FEATURE_FRINTTS                0x8000000000ULL
+/* SB instruction.  */
+#define AARCH64_FEATURE_SB             0x10000000000ULL
+/* Execution and Data Prediction Restriction instructions.  */
+#define AARCH64_FEATURE_PREDRES                0x20000000000ULL
+/* DC CVADP.  */
+#define AARCH64_FEATURE_CVADP          0x40000000000ULL
+/* Random Number instructions.  */
+#define AARCH64_FEATURE_RNG            0x80000000000ULL
+
 /* Architectures are the sum of the base and extensions.  */
 #define AARCH64_ARCH_V8                AARCH64_FEATURE (AARCH64_FEATURE_V8, \
                                                 AARCH64_FEATURE_FP  \
@@ -87,7 +100,12 @@ typedef uint32_t aarch64_insn;
                                                 | AARCH64_FEATURE_DOTPROD \
                                                 | AARCH64_FEATURE_F16_FML)
 #define AARCH64_ARCH_V8_5      AARCH64_FEATURE (AARCH64_ARCH_V8_4,     \
-                                                AARCH64_FEATURE_V8_5)
+                                                AARCH64_FEATURE_V8_5   \
+                                                | AARCH64_FEATURE_FLAGMANIP \
+                                                | AARCH64_FEATURE_FRINTTS \
+                                                | AARCH64_FEATURE_SB   \
+                                                | AARCH64_FEATURE_PREDRES \
+                                                | AARCH64_FEATURE_CVADP)
 
 
 #define AARCH64_ARCH_NONE      AARCH64_FEATURE (0, 0)
@@ -262,6 +280,7 @@ enum aarch64_opnd
   AARCH64_OPND_SYSREG_DC,      /* System register <dc_op> operand.  */
   AARCH64_OPND_SYSREG_IC,      /* System register <ic_op> operand.  */
   AARCH64_OPND_SYSREG_TLBI,    /* System register <tlbi_op> operand.  */
+  AARCH64_OPND_SYSREG_SR,      /* System register RCTX operand.  */
   AARCH64_OPND_BARRIER,                /* Barrier operand.  */
   AARCH64_OPND_BARRIER_ISB,    /* Barrier operand for ISB.  */
   AARCH64_OPND_PRFOP,          /* Prefetch operation.  */
@@ -905,6 +924,7 @@ extern const aarch64_sys_ins_reg aarch64_sys_regs_ic [];
 extern const aarch64_sys_ins_reg aarch64_sys_regs_dc [];
 extern const aarch64_sys_ins_reg aarch64_sys_regs_at [];
 extern const aarch64_sys_ins_reg aarch64_sys_regs_tlbi [];
+extern const aarch64_sys_ins_reg aarch64_sys_regs_sr [];
 
 /* Shift/extending operator kinds.
    N.B. order is important; keep aarch64_operand_modifiers synced.  */